xref: /freebsd/sys/dev/sfxge/common/efx_mon.c (revision 685dc743)
1e948693eSPhilip Paeps /*-
24d846d26SWarner Losh  * SPDX-License-Identifier: BSD-2-Clause
3718cf2ccSPedro F. Giffuni  *
4929c7febSAndrew Rybchenko  * Copyright (c) 2007-2016 Solarflare Communications Inc.
53c838a9fSAndrew Rybchenko  * All rights reserved.
6e948693eSPhilip Paeps  *
7e948693eSPhilip Paeps  * Redistribution and use in source and binary forms, with or without
83c838a9fSAndrew Rybchenko  * modification, are permitted provided that the following conditions are met:
9e948693eSPhilip Paeps  *
103c838a9fSAndrew Rybchenko  * 1. Redistributions of source code must retain the above copyright notice,
113c838a9fSAndrew Rybchenko  *    this list of conditions and the following disclaimer.
123c838a9fSAndrew Rybchenko  * 2. Redistributions in binary form must reproduce the above copyright notice,
133c838a9fSAndrew Rybchenko  *    this list of conditions and the following disclaimer in the documentation
143c838a9fSAndrew Rybchenko  *    and/or other materials provided with the distribution.
153c838a9fSAndrew Rybchenko  *
163c838a9fSAndrew Rybchenko  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
173c838a9fSAndrew Rybchenko  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
183c838a9fSAndrew Rybchenko  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
193c838a9fSAndrew Rybchenko  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
203c838a9fSAndrew Rybchenko  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
213c838a9fSAndrew Rybchenko  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
223c838a9fSAndrew Rybchenko  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
233c838a9fSAndrew Rybchenko  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
243c838a9fSAndrew Rybchenko  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
253c838a9fSAndrew Rybchenko  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
263c838a9fSAndrew Rybchenko  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
273c838a9fSAndrew Rybchenko  *
283c838a9fSAndrew Rybchenko  * The views and conclusions contained in the software and documentation are
293c838a9fSAndrew Rybchenko  * those of the authors and should not be interpreted as representing official
303c838a9fSAndrew Rybchenko  * policies, either expressed or implied, of the FreeBSD Project.
31e948693eSPhilip Paeps  */
32e948693eSPhilip Paeps 
335dee87d7SPhilip Paeps #include <sys/cdefs.h>
34e948693eSPhilip Paeps #include "efx.h"
35e948693eSPhilip Paeps #include "efx_impl.h"
36e948693eSPhilip Paeps 
373c838a9fSAndrew Rybchenko #if EFSYS_OPT_MON_MCDI
383c838a9fSAndrew Rybchenko #include "mcdi_mon.h"
393c838a9fSAndrew Rybchenko #endif
403c838a9fSAndrew Rybchenko 
41e948693eSPhilip Paeps #if EFSYS_OPT_NAMES
42e948693eSPhilip Paeps 
4309b3e655SAndrew Rybchenko static const char * const __efx_mon_name[] = {
44e948693eSPhilip Paeps 	"",
453c838a9fSAndrew Rybchenko 	"sfx90x0",
46c34e3d68SAndrew Rybchenko 	"sfx91x0",
47b13ad4deSAndrew Rybchenko 	"sfx92x0"
48e948693eSPhilip Paeps };
49e948693eSPhilip Paeps 
503c838a9fSAndrew Rybchenko 		const char *
efx_mon_name(__in efx_nic_t * enp)51e948693eSPhilip Paeps efx_mon_name(
52e948693eSPhilip Paeps 	__in	efx_nic_t *enp)
53e948693eSPhilip Paeps {
54e948693eSPhilip Paeps 	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
55e948693eSPhilip Paeps 
56e948693eSPhilip Paeps 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
57e948693eSPhilip Paeps 
58e948693eSPhilip Paeps 	EFSYS_ASSERT(encp->enc_mon_type != EFX_MON_INVALID);
59e948693eSPhilip Paeps 	EFSYS_ASSERT3U(encp->enc_mon_type, <, EFX_MON_NTYPES);
60e948693eSPhilip Paeps 	return (__efx_mon_name[encp->enc_mon_type]);
61e948693eSPhilip Paeps }
62e948693eSPhilip Paeps 
63e948693eSPhilip Paeps #endif	/* EFSYS_OPT_NAMES */
64e948693eSPhilip Paeps 
653c838a9fSAndrew Rybchenko #if EFSYS_OPT_MON_MCDI
66ec831f7fSAndrew Rybchenko static const efx_mon_ops_t	__efx_mon_mcdi_ops = {
67e948693eSPhilip Paeps #if EFSYS_OPT_MON_STATS
68b4d3f02eSAndrew Rybchenko 	mcdi_mon_stats_update,		/* emo_stats_update */
69b4d3f02eSAndrew Rybchenko 	mcdi_mon_limits_update,		/* emo_limits_update */
70e948693eSPhilip Paeps #endif	/* EFSYS_OPT_MON_STATS */
71e948693eSPhilip Paeps };
72e948693eSPhilip Paeps #endif
73e948693eSPhilip Paeps 
74460cb568SAndrew Rybchenko 	__checkReturn	efx_rc_t
efx_mon_init(__in efx_nic_t * enp)75e948693eSPhilip Paeps efx_mon_init(
76e948693eSPhilip Paeps 	__in		efx_nic_t *enp)
77e948693eSPhilip Paeps {
78e948693eSPhilip Paeps 	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
79e948693eSPhilip Paeps 	efx_mon_t *emp = &(enp->en_mon);
80ec831f7fSAndrew Rybchenko 	const efx_mon_ops_t *emop;
81460cb568SAndrew Rybchenko 	efx_rc_t rc;
82e948693eSPhilip Paeps 
83e948693eSPhilip Paeps 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
84e948693eSPhilip Paeps 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
85e948693eSPhilip Paeps 
86e948693eSPhilip Paeps 	if (enp->en_mod_flags & EFX_MOD_MON) {
87e948693eSPhilip Paeps 		rc = EINVAL;
88e948693eSPhilip Paeps 		goto fail1;
89e948693eSPhilip Paeps 	}
90e948693eSPhilip Paeps 
91e948693eSPhilip Paeps 	enp->en_mod_flags |= EFX_MOD_MON;
92e948693eSPhilip Paeps 
93e948693eSPhilip Paeps 	emp->em_type = encp->enc_mon_type;
94e948693eSPhilip Paeps 
95e948693eSPhilip Paeps 	EFSYS_ASSERT(encp->enc_mon_type != EFX_MON_INVALID);
96b13ad4deSAndrew Rybchenko 	switch (emp->em_type) {
97b13ad4deSAndrew Rybchenko #if EFSYS_OPT_MON_MCDI
98b13ad4deSAndrew Rybchenko 	case EFX_MON_SFC90X0:
99b13ad4deSAndrew Rybchenko 	case EFX_MON_SFC91X0:
100b13ad4deSAndrew Rybchenko 	case EFX_MON_SFC92X0:
101b13ad4deSAndrew Rybchenko 		emop = &__efx_mon_mcdi_ops;
102b13ad4deSAndrew Rybchenko 		break;
103b13ad4deSAndrew Rybchenko #endif
104b13ad4deSAndrew Rybchenko 	default:
105e948693eSPhilip Paeps 		rc = ENOTSUP;
106e948693eSPhilip Paeps 		goto fail2;
107e948693eSPhilip Paeps 	}
108e948693eSPhilip Paeps 
109e948693eSPhilip Paeps 	emp->em_emop = emop;
110e948693eSPhilip Paeps 	return (0);
111e948693eSPhilip Paeps 
1126faddc34SAndrew Rybchenko fail2:
1136faddc34SAndrew Rybchenko 	EFSYS_PROBE(fail2);
114e948693eSPhilip Paeps 
115e948693eSPhilip Paeps 	emp->em_type = EFX_MON_INVALID;
116e948693eSPhilip Paeps 
117e948693eSPhilip Paeps 	enp->en_mod_flags &= ~EFX_MOD_MON;
118e948693eSPhilip Paeps 
119e948693eSPhilip Paeps fail1:
120460cb568SAndrew Rybchenko 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
121e948693eSPhilip Paeps 
122e948693eSPhilip Paeps 	return (rc);
123e948693eSPhilip Paeps }
124e948693eSPhilip Paeps 
125e948693eSPhilip Paeps #if EFSYS_OPT_MON_STATS
126e948693eSPhilip Paeps 
127e948693eSPhilip Paeps #if EFSYS_OPT_NAMES
128e948693eSPhilip Paeps 
12921b72677SAndrew Rybchenko /* START MKCONFIG GENERATED MonitorStatNamesBlock 277c17eda1a6d1a4 */
130a260bd77SAndrew Rybchenko static const char * const __mon_stat_name[] = {
13121b72677SAndrew Rybchenko 	"controller_temp",
13221b72677SAndrew Rybchenko 	"phy_common_temp",
133e948693eSPhilip Paeps 	"controller_cooling",
13421b72677SAndrew Rybchenko 	"phy0_temp",
13521b72677SAndrew Rybchenko 	"phy0_cooling",
13621b72677SAndrew Rybchenko 	"phy1_temp",
13721b72677SAndrew Rybchenko 	"phy1_cooling",
13821b72677SAndrew Rybchenko 	"in_1v0",
13921b72677SAndrew Rybchenko 	"in_1v2",
14021b72677SAndrew Rybchenko 	"in_1v8",
14121b72677SAndrew Rybchenko 	"in_2v5",
14221b72677SAndrew Rybchenko 	"in_3v3",
14321b72677SAndrew Rybchenko 	"in_12v0",
14421b72677SAndrew Rybchenko 	"in_1v2a",
14521b72677SAndrew Rybchenko 	"in_vref",
14621b72677SAndrew Rybchenko 	"out_vaoe",
14721b72677SAndrew Rybchenko 	"aoe_temp",
14821b72677SAndrew Rybchenko 	"psu_aoe_temp",
14921b72677SAndrew Rybchenko 	"psu_temp",
15021b72677SAndrew Rybchenko 	"fan_0",
15121b72677SAndrew Rybchenko 	"fan_1",
15221b72677SAndrew Rybchenko 	"fan_2",
15321b72677SAndrew Rybchenko 	"fan_3",
15421b72677SAndrew Rybchenko 	"fan_4",
15521b72677SAndrew Rybchenko 	"in_vaoe",
15621b72677SAndrew Rybchenko 	"out_iaoe",
15721b72677SAndrew Rybchenko 	"in_iaoe",
1583c838a9fSAndrew Rybchenko 	"nic_power",
15921b72677SAndrew Rybchenko 	"in_0v9",
16021b72677SAndrew Rybchenko 	"in_i0v9",
16121b72677SAndrew Rybchenko 	"in_i1v2",
16221b72677SAndrew Rybchenko 	"in_0v9_adc",
16321b72677SAndrew Rybchenko 	"controller_2_temp",
16421b72677SAndrew Rybchenko 	"vreg_internal_temp",
16521b72677SAndrew Rybchenko 	"vreg_0v9_temp",
16621b72677SAndrew Rybchenko 	"vreg_1v2_temp",
16721b72677SAndrew Rybchenko 	"controller_vptat",
16821b72677SAndrew Rybchenko 	"controller_internal_temp",
16921b72677SAndrew Rybchenko 	"controller_vptat_extadc",
17021b72677SAndrew Rybchenko 	"controller_internal_temp_extadc",
17121b72677SAndrew Rybchenko 	"ambient_temp",
1723c838a9fSAndrew Rybchenko 	"airflow",
1733c838a9fSAndrew Rybchenko 	"vdd08d_vss08d_csr",
1743c838a9fSAndrew Rybchenko 	"vdd08d_vss08d_csr_extadc",
17521b72677SAndrew Rybchenko 	"hotpoint_temp",
17621b72677SAndrew Rybchenko 	"phy_power_port0",
17721b72677SAndrew Rybchenko 	"phy_power_port1",
1783c838a9fSAndrew Rybchenko 	"mum_vcc",
17921b72677SAndrew Rybchenko 	"in_0v9_a",
18021b72677SAndrew Rybchenko 	"in_i0v9_a",
18121b72677SAndrew Rybchenko 	"vreg_0v9_a_temp",
18221b72677SAndrew Rybchenko 	"in_0v9_b",
18321b72677SAndrew Rybchenko 	"in_i0v9_b",
18421b72677SAndrew Rybchenko 	"vreg_0v9_b_temp",
1853c838a9fSAndrew Rybchenko 	"ccom_avreg_1v2_supply",
18621b72677SAndrew Rybchenko 	"ccom_avreg_1v2_supply_extadc",
1873c838a9fSAndrew Rybchenko 	"ccom_avreg_1v8_supply",
18821b72677SAndrew Rybchenko 	"ccom_avreg_1v8_supply_extadc",
1893c838a9fSAndrew Rybchenko 	"controller_master_vptat",
1903c838a9fSAndrew Rybchenko 	"controller_master_internal_temp",
19121b72677SAndrew Rybchenko 	"controller_master_vptat_extadc",
19221b72677SAndrew Rybchenko 	"controller_master_internal_temp_extadc",
1933c838a9fSAndrew Rybchenko 	"controller_slave_vptat",
1943c838a9fSAndrew Rybchenko 	"controller_slave_internal_temp",
19521b72677SAndrew Rybchenko 	"controller_slave_vptat_extadc",
19621b72677SAndrew Rybchenko 	"controller_slave_internal_temp_extadc",
197435c2014SAndrew Rybchenko 	"sodimm_vout",
198435c2014SAndrew Rybchenko 	"sodimm_0_temp",
199435c2014SAndrew Rybchenko 	"sodimm_1_temp",
200435c2014SAndrew Rybchenko 	"phy0_vcc",
201435c2014SAndrew Rybchenko 	"phy1_vcc",
202435c2014SAndrew Rybchenko 	"controller_tdiode_temp",
203f634dfdaSAndrew Rybchenko 	"board_front_temp",
204f634dfdaSAndrew Rybchenko 	"board_back_temp",
20521b72677SAndrew Rybchenko 	"in_i1v8",
20621b72677SAndrew Rybchenko 	"in_i2v5",
20721b72677SAndrew Rybchenko 	"in_i3v3",
20821b72677SAndrew Rybchenko 	"in_i12v0",
20921b72677SAndrew Rybchenko 	"in_1v3",
21021b72677SAndrew Rybchenko 	"in_i1v3",
211e948693eSPhilip Paeps };
212e948693eSPhilip Paeps 
213e948693eSPhilip Paeps /* END MKCONFIG GENERATED MonitorStatNamesBlock */
214e948693eSPhilip Paeps 
215d515a203SAndrew Rybchenko 					const char *
efx_mon_stat_name(__in efx_nic_t * enp,__in efx_mon_stat_t id)216d515a203SAndrew Rybchenko efx_mon_stat_name(
217d515a203SAndrew Rybchenko 	__in				efx_nic_t *enp,
218d515a203SAndrew Rybchenko 	__in				efx_mon_stat_t id)
219d515a203SAndrew Rybchenko {
220d515a203SAndrew Rybchenko 	_NOTE(ARGUNUSED(enp))
221d515a203SAndrew Rybchenko 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
222d515a203SAndrew Rybchenko 
223d515a203SAndrew Rybchenko 	EFSYS_ASSERT3U(id, <, EFX_MON_NSTATS);
224d515a203SAndrew Rybchenko 	return (__mon_stat_name[id]);
225d515a203SAndrew Rybchenko }
226d515a203SAndrew Rybchenko 
227d515a203SAndrew Rybchenko typedef struct _stat_description_t {
228d515a203SAndrew Rybchenko 	efx_mon_stat_t	stat;
229d515a203SAndrew Rybchenko 	const char	*desc;
230d515a203SAndrew Rybchenko } stat_description_t;
231d515a203SAndrew Rybchenko 
232d515a203SAndrew Rybchenko /* START MKCONFIG GENERATED MonitorStatDescriptionsBlock f072138f16d2e1f8 */
233d515a203SAndrew Rybchenko static const char *__mon_stat_description[] = {
234d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_TEMP_ENUM_STR,
235d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_PHY_COMMON_TEMP_ENUM_STR,
236d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_COOLING_ENUM_STR,
237d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_PHY0_TEMP_ENUM_STR,
238d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_PHY0_COOLING_ENUM_STR,
239d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_PHY1_TEMP_ENUM_STR,
240d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_PHY1_COOLING_ENUM_STR,
241d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_1V0_ENUM_STR,
242d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_1V2_ENUM_STR,
243d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_1V8_ENUM_STR,
244d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_2V5_ENUM_STR,
245d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_3V3_ENUM_STR,
246d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_12V0_ENUM_STR,
247d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_1V2A_ENUM_STR,
248d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_VREF_ENUM_STR,
249d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_OUT_VAOE_ENUM_STR,
250d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_AOE_TEMP_ENUM_STR,
251d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_PSU_AOE_TEMP_ENUM_STR,
252d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_PSU_TEMP_ENUM_STR,
253d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_FAN_0_ENUM_STR,
254d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_FAN_1_ENUM_STR,
255d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_FAN_2_ENUM_STR,
256d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_FAN_3_ENUM_STR,
257d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_FAN_4_ENUM_STR,
258d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_VAOE_ENUM_STR,
259d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_OUT_IAOE_ENUM_STR,
260d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_IAOE_ENUM_STR,
261d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_NIC_POWER_ENUM_STR,
262d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_0V9_ENUM_STR,
263d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_I0V9_ENUM_STR,
264d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_I1V2_ENUM_STR,
265d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_0V9_ADC_ENUM_STR,
266d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_2_TEMP_ENUM_STR,
267d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_VREG_INTERNAL_TEMP_ENUM_STR,
268d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_VREG_0V9_TEMP_ENUM_STR,
269d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_VREG_1V2_TEMP_ENUM_STR,
270d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_VPTAT_ENUM_STR,
271d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_INTERNAL_TEMP_ENUM_STR,
272d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_VPTAT_EXTADC_ENUM_STR,
273d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_INTERNAL_TEMP_EXTADC_ENUM_STR,
274d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_AMBIENT_TEMP_ENUM_STR,
275d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_AIRFLOW_ENUM_STR,
276d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_VDD08D_VSS08D_CSR_ENUM_STR,
277d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_VDD08D_VSS08D_CSR_EXTADC_ENUM_STR,
278d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_HOTPOINT_TEMP_ENUM_STR,
279d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_PHY_POWER_PORT0_ENUM_STR,
280d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_PHY_POWER_PORT1_ENUM_STR,
281d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_MUM_VCC_ENUM_STR,
282d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_0V9_A_ENUM_STR,
283d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_I0V9_A_ENUM_STR,
284d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_VREG_0V9_A_TEMP_ENUM_STR,
285d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_0V9_B_ENUM_STR,
286d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_I0V9_B_ENUM_STR,
287d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_VREG_0V9_B_TEMP_ENUM_STR,
288d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CCOM_AVREG_1V2_SUPPLY_ENUM_STR,
289d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CCOM_AVREG_1V2_SUPPLY_EXTADC_ENUM_STR,
290d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CCOM_AVREG_1V8_SUPPLY_ENUM_STR,
291d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CCOM_AVREG_1V8_SUPPLY_EXTADC_ENUM_STR,
292d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_MASTER_VPTAT_ENUM_STR,
293d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_MASTER_INTERNAL_TEMP_ENUM_STR,
294d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_MASTER_VPTAT_EXTADC_ENUM_STR,
295d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_MASTER_INTERNAL_TEMP_EXTADC_ENUM_STR,
296d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_SLAVE_VPTAT_ENUM_STR,
297d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_SLAVE_INTERNAL_TEMP_ENUM_STR,
298d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_SLAVE_VPTAT_EXTADC_ENUM_STR,
299d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_SLAVE_INTERNAL_TEMP_EXTADC_ENUM_STR,
300d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_SODIMM_VOUT_ENUM_STR,
301d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_SODIMM_0_TEMP_ENUM_STR,
302d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_SODIMM_1_TEMP_ENUM_STR,
303d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_PHY0_VCC_ENUM_STR,
304d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_PHY1_VCC_ENUM_STR,
305d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_CONTROLLER_TDIODE_TEMP_ENUM_STR,
306d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_BOARD_FRONT_TEMP_ENUM_STR,
307d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_BOARD_BACK_TEMP_ENUM_STR,
308d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_I1V8_ENUM_STR,
309d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_I2V5_ENUM_STR,
310d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_I3V3_ENUM_STR,
311d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_I12V0_ENUM_STR,
312d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_1V3_ENUM_STR,
313d515a203SAndrew Rybchenko 	MC_CMD_SENSOR_IN_I1V3_ENUM_STR,
314d515a203SAndrew Rybchenko };
315d515a203SAndrew Rybchenko 
316d515a203SAndrew Rybchenko /* END MKCONFIG GENERATED MonitorStatDescriptionsBlock */
317d515a203SAndrew Rybchenko 
318d515a203SAndrew Rybchenko 					const char *
efx_mon_stat_description(__in efx_nic_t * enp,__in efx_mon_stat_t id)319d515a203SAndrew Rybchenko efx_mon_stat_description(
320d515a203SAndrew Rybchenko 	__in				efx_nic_t *enp,
321d515a203SAndrew Rybchenko 	__in				efx_mon_stat_t id)
322d515a203SAndrew Rybchenko {
323d515a203SAndrew Rybchenko 	_NOTE(ARGUNUSED(enp))
324d515a203SAndrew Rybchenko 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
325d515a203SAndrew Rybchenko 
326d515a203SAndrew Rybchenko 	EFSYS_ASSERT3U(id, <, EFX_MON_NSTATS);
327d515a203SAndrew Rybchenko 	return (__mon_stat_description[id]);
328d515a203SAndrew Rybchenko }
329d515a203SAndrew Rybchenko 
330d515a203SAndrew Rybchenko #endif	/* EFSYS_OPT_NAMES */
331d515a203SAndrew Rybchenko 
332d515a203SAndrew Rybchenko /* START MKCONFIG GENERATED MonitorMcdiMappingBlock 173eee0a5599996a */
33321b72677SAndrew Rybchenko 	__checkReturn			boolean_t
efx_mon_mcdi_to_efx_stat(__in int mcdi_index,__out efx_mon_stat_t * statp)33421b72677SAndrew Rybchenko efx_mon_mcdi_to_efx_stat(
33521b72677SAndrew Rybchenko 	__in				int mcdi_index,
33621b72677SAndrew Rybchenko 	__out				efx_mon_stat_t *statp)
33721b72677SAndrew Rybchenko {
33821b72677SAndrew Rybchenko 
33921b72677SAndrew Rybchenko 	if ((mcdi_index % (MC_CMD_SENSOR_PAGE0_NEXT + 1)) ==
34021b72677SAndrew Rybchenko 	    MC_CMD_SENSOR_PAGE0_NEXT) {
34121b72677SAndrew Rybchenko 		*statp = EFX_MON_NSTATS;
34221b72677SAndrew Rybchenko 		return (B_FALSE);
34321b72677SAndrew Rybchenko 	}
34421b72677SAndrew Rybchenko 
34521b72677SAndrew Rybchenko 	switch (mcdi_index) {
34621b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_I0V9:
34721b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_I0V9;
34821b72677SAndrew Rybchenko 		break;
34921b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_SLAVE_VPTAT_EXTADC:
35021b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_SLAVE_VPTAT_EXTADC;
35121b72677SAndrew Rybchenko 		break;
35221b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_SLAVE_VPTAT:
35321b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_SLAVE_VPTAT;
35421b72677SAndrew Rybchenko 		break;
35521b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_PSU_TEMP:
35621b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_PSU_TEMP;
35721b72677SAndrew Rybchenko 		break;
35821b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_FAN_2:
35921b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_FAN_2;
36021b72677SAndrew Rybchenko 		break;
36121b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_INTERNAL_TEMP_EXTADC:
36221b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_INTERNAL_TEMP_EXTADC;
36321b72677SAndrew Rybchenko 		break;
36421b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_BOARD_BACK_TEMP:
36521b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_BOARD_BACK_TEMP;
36621b72677SAndrew Rybchenko 		break;
36721b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_1V3:
36821b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_1V3;
36921b72677SAndrew Rybchenko 		break;
37021b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_TDIODE_TEMP:
37121b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_TDIODE_TEMP;
37221b72677SAndrew Rybchenko 		break;
37321b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_2V5:
37421b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_2V5;
37521b72677SAndrew Rybchenko 		break;
37621b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_PHY_COMMON_TEMP:
37721b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_PHY_COMMON_TEMP;
37821b72677SAndrew Rybchenko 		break;
37921b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_PHY1_TEMP:
38021b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_PHY1_TEMP;
38121b72677SAndrew Rybchenko 		break;
38221b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_VREG_INTERNAL_TEMP:
38321b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_VREG_INTERNAL_TEMP;
38421b72677SAndrew Rybchenko 		break;
38521b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_1V0:
38621b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_1V0;
38721b72677SAndrew Rybchenko 		break;
38821b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_FAN_1:
38921b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_FAN_1;
39021b72677SAndrew Rybchenko 		break;
39121b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_1V2:
39221b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_1V2;
39321b72677SAndrew Rybchenko 		break;
39421b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_FAN_3:
39521b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_FAN_3;
39621b72677SAndrew Rybchenko 		break;
39721b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_1V2A:
39821b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_1V2A;
39921b72677SAndrew Rybchenko 		break;
40021b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_SODIMM_0_TEMP:
40121b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_SODIMM_0_TEMP;
40221b72677SAndrew Rybchenko 		break;
40321b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_1V8:
40421b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_1V8;
40521b72677SAndrew Rybchenko 		break;
40621b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_VREF:
40721b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_VREF;
40821b72677SAndrew Rybchenko 		break;
40921b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_SODIMM_VOUT:
41021b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_SODIMM_VOUT;
41121b72677SAndrew Rybchenko 		break;
41221b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CCOM_AVREG_1V2_SUPPLY:
41321b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CCOM_AVREG_1V2_SUPPLY;
41421b72677SAndrew Rybchenko 		break;
41521b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_I1V2:
41621b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_I1V2;
41721b72677SAndrew Rybchenko 		break;
41821b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_I1V3:
41921b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_I1V3;
42021b72677SAndrew Rybchenko 		break;
42121b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_AIRFLOW:
42221b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_AIRFLOW;
42321b72677SAndrew Rybchenko 		break;
42421b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_HOTPOINT_TEMP:
42521b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_HOTPOINT_TEMP;
42621b72677SAndrew Rybchenko 		break;
42721b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_VDD08D_VSS08D_CSR:
42821b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_VDD08D_VSS08D_CSR;
42921b72677SAndrew Rybchenko 		break;
43021b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_AOE_TEMP:
43121b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_AOE_TEMP;
43221b72677SAndrew Rybchenko 		break;
43321b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_I1V8:
43421b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_I1V8;
43521b72677SAndrew Rybchenko 		break;
43621b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_I2V5:
43721b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_I2V5;
43821b72677SAndrew Rybchenko 		break;
43921b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_PHY1_COOLING:
44021b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_PHY1_COOLING;
44121b72677SAndrew Rybchenko 		break;
44221b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CCOM_AVREG_1V8_SUPPLY_EXTADC:
44321b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CCOM_AVREG_1V8_SUPPLY_EXTADC;
44421b72677SAndrew Rybchenko 		break;
44521b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_0V9_ADC:
44621b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_0V9_ADC;
44721b72677SAndrew Rybchenko 		break;
44821b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_VREG_0V9_A_TEMP:
44921b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_VREG_0V9_A_TEMP;
45021b72677SAndrew Rybchenko 		break;
45121b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_MASTER_VPTAT:
45221b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_MASTER_VPTAT;
45321b72677SAndrew Rybchenko 		break;
45421b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_PHY0_VCC:
45521b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_PHY0_VCC;
45621b72677SAndrew Rybchenko 		break;
45721b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_PHY0_COOLING:
45821b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_PHY0_COOLING;
45921b72677SAndrew Rybchenko 		break;
46021b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_PSU_AOE_TEMP:
46121b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_PSU_AOE_TEMP;
46221b72677SAndrew Rybchenko 		break;
46321b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_VREG_0V9_TEMP:
46421b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_VREG_0V9_TEMP;
46521b72677SAndrew Rybchenko 		break;
46621b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_I0V9_A:
46721b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_I0V9_A;
46821b72677SAndrew Rybchenko 		break;
46921b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_I3V3:
47021b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_I3V3;
47121b72677SAndrew Rybchenko 		break;
47221b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_BOARD_FRONT_TEMP:
47321b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_BOARD_FRONT_TEMP;
47421b72677SAndrew Rybchenko 		break;
47521b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_OUT_VAOE:
47621b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_OUT_VAOE;
47721b72677SAndrew Rybchenko 		break;
47821b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_VDD08D_VSS08D_CSR_EXTADC:
47921b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_VDD08D_VSS08D_CSR_EXTADC;
48021b72677SAndrew Rybchenko 		break;
48121b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_I12V0:
48221b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_I12V0;
48321b72677SAndrew Rybchenko 		break;
48421b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_PHY_POWER_PORT1:
48521b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_PHY_POWER_PORT1;
48621b72677SAndrew Rybchenko 		break;
48721b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_PHY_POWER_PORT0:
48821b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_PHY_POWER_PORT0;
48921b72677SAndrew Rybchenko 		break;
49021b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_SLAVE_INTERNAL_TEMP_EXTADC:
49121b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_SLAVE_INTERNAL_TEMP_EXTADC;
49221b72677SAndrew Rybchenko 		break;
49321b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_MASTER_INTERNAL_TEMP:
49421b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_MASTER_INTERNAL_TEMP;
49521b72677SAndrew Rybchenko 		break;
49621b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_TEMP:
49721b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_TEMP;
49821b72677SAndrew Rybchenko 		break;
49921b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_IAOE:
50021b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_IAOE;
50121b72677SAndrew Rybchenko 		break;
50221b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_VAOE:
50321b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_VAOE;
50421b72677SAndrew Rybchenko 		break;
50521b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_MASTER_VPTAT_EXTADC:
50621b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_MASTER_VPTAT_EXTADC;
50721b72677SAndrew Rybchenko 		break;
50821b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CCOM_AVREG_1V8_SUPPLY:
50921b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CCOM_AVREG_1V8_SUPPLY;
51021b72677SAndrew Rybchenko 		break;
51121b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_PHY1_VCC:
51221b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_PHY1_VCC;
51321b72677SAndrew Rybchenko 		break;
51421b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_COOLING:
51521b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_COOLING;
51621b72677SAndrew Rybchenko 		break;
51721b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_AMBIENT_TEMP:
51821b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_AMBIENT_TEMP;
51921b72677SAndrew Rybchenko 		break;
52021b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_3V3:
52121b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_3V3;
52221b72677SAndrew Rybchenko 		break;
52321b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_PHY0_TEMP:
52421b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_PHY0_TEMP;
52521b72677SAndrew Rybchenko 		break;
52621b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_SODIMM_1_TEMP:
52721b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_SODIMM_1_TEMP;
52821b72677SAndrew Rybchenko 		break;
52921b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_MUM_VCC:
53021b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_MUM_VCC;
53121b72677SAndrew Rybchenko 		break;
53221b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_VREG_0V9_B_TEMP:
53321b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_VREG_0V9_B_TEMP;
53421b72677SAndrew Rybchenko 		break;
53521b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_SLAVE_INTERNAL_TEMP:
53621b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_SLAVE_INTERNAL_TEMP;
53721b72677SAndrew Rybchenko 		break;
53821b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_FAN_4:
53921b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_FAN_4;
54021b72677SAndrew Rybchenko 		break;
54121b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_2_TEMP:
54221b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_2_TEMP;
54321b72677SAndrew Rybchenko 		break;
54421b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CCOM_AVREG_1V2_SUPPLY_EXTADC:
54521b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CCOM_AVREG_1V2_SUPPLY_EXTADC;
54621b72677SAndrew Rybchenko 		break;
54721b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_0V9_A:
54821b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_0V9_A;
54921b72677SAndrew Rybchenko 		break;
55021b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_VPTAT_EXTADC:
55121b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_VPTAT_EXTADC;
55221b72677SAndrew Rybchenko 		break;
55321b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_0V9:
55421b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_0V9;
55521b72677SAndrew Rybchenko 		break;
55621b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_I0V9_B:
55721b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_I0V9_B;
55821b72677SAndrew Rybchenko 		break;
55921b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_NIC_POWER:
56021b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_NIC_POWER;
56121b72677SAndrew Rybchenko 		break;
56221b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_12V0:
56321b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_12V0;
56421b72677SAndrew Rybchenko 		break;
56521b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_OUT_IAOE:
56621b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_OUT_IAOE;
56721b72677SAndrew Rybchenko 		break;
56821b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_VPTAT:
56921b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_VPTAT;
57021b72677SAndrew Rybchenko 		break;
57121b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_MASTER_INTERNAL_TEMP_EXTADC:
57221b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_MASTER_INTERNAL_TEMP_EXTADC;
57321b72677SAndrew Rybchenko 		break;
57421b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_CONTROLLER_INTERNAL_TEMP:
57521b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_CONTROLLER_INTERNAL_TEMP;
57621b72677SAndrew Rybchenko 		break;
57721b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_FAN_0:
57821b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_FAN_0;
57921b72677SAndrew Rybchenko 		break;
58021b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_VREG_1V2_TEMP:
58121b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_VREG_1V2_TEMP;
58221b72677SAndrew Rybchenko 		break;
58321b72677SAndrew Rybchenko 	case MC_CMD_SENSOR_IN_0V9_B:
58421b72677SAndrew Rybchenko 		*statp = EFX_MON_STAT_IN_0V9_B;
58521b72677SAndrew Rybchenko 		break;
58621b72677SAndrew Rybchenko 	default:
58721b72677SAndrew Rybchenko 		*statp = EFX_MON_NSTATS;
58821b72677SAndrew Rybchenko 		break;
58921b72677SAndrew Rybchenko 	};
59021b72677SAndrew Rybchenko 
59121b72677SAndrew Rybchenko 	if (*statp == EFX_MON_NSTATS)
59221b72677SAndrew Rybchenko 		goto fail1;
59321b72677SAndrew Rybchenko 
59421b72677SAndrew Rybchenko 	return (B_TRUE);
59521b72677SAndrew Rybchenko 
59621b72677SAndrew Rybchenko fail1:
59721b72677SAndrew Rybchenko 	EFSYS_PROBE1(fail1, boolean_t, B_TRUE);
59821b72677SAndrew Rybchenko 	return (B_FALSE);
59921b72677SAndrew Rybchenko };
60021b72677SAndrew Rybchenko 
60121b72677SAndrew Rybchenko /* END MKCONFIG GENERATED MonitorMcdiMappingBlock */
60221b72677SAndrew Rybchenko 
60321b72677SAndrew Rybchenko /* START MKCONFIG GENERATED MonitorStatisticUnitsBlock 2d447c656cc2d01d */
60421b72677SAndrew Rybchenko 	__checkReturn			boolean_t
efx_mon_get_stat_unit(__in efx_mon_stat_t stat,__out efx_mon_stat_unit_t * unitp)60521b72677SAndrew Rybchenko efx_mon_get_stat_unit(
60621b72677SAndrew Rybchenko 	__in				efx_mon_stat_t stat,
60721b72677SAndrew Rybchenko 	__out				efx_mon_stat_unit_t *unitp)
60821b72677SAndrew Rybchenko {
60921b72677SAndrew Rybchenko 	switch (stat) {
61021b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_1V0:
61121b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_1V2:
61221b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_1V8:
61321b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_2V5:
61421b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_3V3:
61521b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_12V0:
61621b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_1V2A:
61721b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_VREF:
61821b72677SAndrew Rybchenko 	case EFX_MON_STAT_OUT_VAOE:
61921b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_VAOE:
62021b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_0V9:
62121b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_0V9_ADC:
62221b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_VPTAT_EXTADC:
62321b72677SAndrew Rybchenko 	case EFX_MON_STAT_VDD08D_VSS08D_CSR:
62421b72677SAndrew Rybchenko 	case EFX_MON_STAT_VDD08D_VSS08D_CSR_EXTADC:
62521b72677SAndrew Rybchenko 	case EFX_MON_STAT_MUM_VCC:
62621b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_0V9_A:
62721b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_0V9_B:
62821b72677SAndrew Rybchenko 	case EFX_MON_STAT_CCOM_AVREG_1V2_SUPPLY:
62921b72677SAndrew Rybchenko 	case EFX_MON_STAT_CCOM_AVREG_1V2_SUPPLY_EXTADC:
63021b72677SAndrew Rybchenko 	case EFX_MON_STAT_CCOM_AVREG_1V8_SUPPLY:
63121b72677SAndrew Rybchenko 	case EFX_MON_STAT_CCOM_AVREG_1V8_SUPPLY_EXTADC:
63221b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_MASTER_VPTAT:
63321b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_MASTER_VPTAT_EXTADC:
63421b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_SLAVE_VPTAT:
63521b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_SLAVE_VPTAT_EXTADC:
63621b72677SAndrew Rybchenko 	case EFX_MON_STAT_SODIMM_VOUT:
63721b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY0_VCC:
63821b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY1_VCC:
63921b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_1V3:
64021b72677SAndrew Rybchenko 		*unitp = EFX_MON_STAT_UNIT_VOLTAGE_MV;
64121b72677SAndrew Rybchenko 		break;
64221b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_TEMP:
64321b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY_COMMON_TEMP:
64421b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY0_TEMP:
64521b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY1_TEMP:
64621b72677SAndrew Rybchenko 	case EFX_MON_STAT_AOE_TEMP:
64721b72677SAndrew Rybchenko 	case EFX_MON_STAT_PSU_AOE_TEMP:
64821b72677SAndrew Rybchenko 	case EFX_MON_STAT_PSU_TEMP:
64921b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_2_TEMP:
65021b72677SAndrew Rybchenko 	case EFX_MON_STAT_VREG_INTERNAL_TEMP:
65121b72677SAndrew Rybchenko 	case EFX_MON_STAT_VREG_0V9_TEMP:
65221b72677SAndrew Rybchenko 	case EFX_MON_STAT_VREG_1V2_TEMP:
65321b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_VPTAT:
65421b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_INTERNAL_TEMP:
65521b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_INTERNAL_TEMP_EXTADC:
65621b72677SAndrew Rybchenko 	case EFX_MON_STAT_AMBIENT_TEMP:
65721b72677SAndrew Rybchenko 	case EFX_MON_STAT_HOTPOINT_TEMP:
65821b72677SAndrew Rybchenko 	case EFX_MON_STAT_VREG_0V9_A_TEMP:
65921b72677SAndrew Rybchenko 	case EFX_MON_STAT_VREG_0V9_B_TEMP:
66021b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_MASTER_INTERNAL_TEMP:
66121b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_MASTER_INTERNAL_TEMP_EXTADC:
66221b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_SLAVE_INTERNAL_TEMP:
66321b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_SLAVE_INTERNAL_TEMP_EXTADC:
66421b72677SAndrew Rybchenko 	case EFX_MON_STAT_SODIMM_0_TEMP:
66521b72677SAndrew Rybchenko 	case EFX_MON_STAT_SODIMM_1_TEMP:
66621b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_TDIODE_TEMP:
66721b72677SAndrew Rybchenko 	case EFX_MON_STAT_BOARD_FRONT_TEMP:
66821b72677SAndrew Rybchenko 	case EFX_MON_STAT_BOARD_BACK_TEMP:
66921b72677SAndrew Rybchenko 		*unitp = EFX_MON_STAT_UNIT_TEMP_C;
67021b72677SAndrew Rybchenko 		break;
67121b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_COOLING:
67221b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY0_COOLING:
67321b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY1_COOLING:
67421b72677SAndrew Rybchenko 	case EFX_MON_STAT_AIRFLOW:
67521b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY_POWER_PORT0:
67621b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY_POWER_PORT1:
67721b72677SAndrew Rybchenko 		*unitp = EFX_MON_STAT_UNIT_BOOL;
67821b72677SAndrew Rybchenko 		break;
67921b72677SAndrew Rybchenko 	case EFX_MON_STAT_NIC_POWER:
68021b72677SAndrew Rybchenko 		*unitp = EFX_MON_STAT_UNIT_POWER_W;
68121b72677SAndrew Rybchenko 		break;
68221b72677SAndrew Rybchenko 	case EFX_MON_STAT_OUT_IAOE:
68321b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_IAOE:
68421b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I0V9:
68521b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I1V2:
68621b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I0V9_A:
68721b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I0V9_B:
68821b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I1V8:
68921b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I2V5:
69021b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I3V3:
69121b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I12V0:
69221b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I1V3:
69321b72677SAndrew Rybchenko 		*unitp = EFX_MON_STAT_UNIT_CURRENT_MA;
69421b72677SAndrew Rybchenko 		break;
69521b72677SAndrew Rybchenko 	case EFX_MON_STAT_FAN_0:
69621b72677SAndrew Rybchenko 	case EFX_MON_STAT_FAN_1:
69721b72677SAndrew Rybchenko 	case EFX_MON_STAT_FAN_2:
69821b72677SAndrew Rybchenko 	case EFX_MON_STAT_FAN_3:
69921b72677SAndrew Rybchenko 	case EFX_MON_STAT_FAN_4:
70021b72677SAndrew Rybchenko 		*unitp = EFX_MON_STAT_UNIT_RPM;
70121b72677SAndrew Rybchenko 		break;
70221b72677SAndrew Rybchenko 	default:
70321b72677SAndrew Rybchenko 		*unitp = EFX_MON_STAT_UNIT_UNKNOWN;
70421b72677SAndrew Rybchenko 		break;
70521b72677SAndrew Rybchenko 	};
70621b72677SAndrew Rybchenko 
70721b72677SAndrew Rybchenko 	if (*unitp == EFX_MON_STAT_UNIT_UNKNOWN)
70821b72677SAndrew Rybchenko 		goto fail1;
70921b72677SAndrew Rybchenko 
71021b72677SAndrew Rybchenko 	return (B_TRUE);
71121b72677SAndrew Rybchenko 
71221b72677SAndrew Rybchenko fail1:
71321b72677SAndrew Rybchenko 	EFSYS_PROBE1(fail1, boolean_t, B_TRUE);
71421b72677SAndrew Rybchenko 	return (B_FALSE);
71521b72677SAndrew Rybchenko };
71621b72677SAndrew Rybchenko 
71721b72677SAndrew Rybchenko /* END MKCONFIG GENERATED MonitorStatisticUnitsBlock */
71821b72677SAndrew Rybchenko 
71921b72677SAndrew Rybchenko /* START MKCONFIG GENERATED MonitorStatisticPortsBlock 1719b751d842534f */
72021b72677SAndrew Rybchenko 	__checkReturn			boolean_t
efx_mon_get_stat_portmap(__in efx_mon_stat_t stat,__out efx_mon_stat_portmask_t * maskp)72121b72677SAndrew Rybchenko efx_mon_get_stat_portmap(
72221b72677SAndrew Rybchenko 	__in				efx_mon_stat_t stat,
72321b72677SAndrew Rybchenko 	__out				efx_mon_stat_portmask_t *maskp)
72421b72677SAndrew Rybchenko {
72521b72677SAndrew Rybchenko 
72621b72677SAndrew Rybchenko 	switch (stat) {
72721b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY1_TEMP:
72821b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY1_COOLING:
72921b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY_POWER_PORT1:
73021b72677SAndrew Rybchenko 		*maskp = EFX_MON_STAT_PORTMAP_PORT1;
73121b72677SAndrew Rybchenko 		break;
73221b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_TEMP:
73321b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY_COMMON_TEMP:
73421b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_COOLING:
73521b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_1V0:
73621b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_1V2:
73721b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_1V8:
73821b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_2V5:
73921b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_3V3:
74021b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_12V0:
74121b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_1V2A:
74221b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_VREF:
74321b72677SAndrew Rybchenko 	case EFX_MON_STAT_OUT_VAOE:
74421b72677SAndrew Rybchenko 	case EFX_MON_STAT_AOE_TEMP:
74521b72677SAndrew Rybchenko 	case EFX_MON_STAT_PSU_AOE_TEMP:
74621b72677SAndrew Rybchenko 	case EFX_MON_STAT_PSU_TEMP:
74721b72677SAndrew Rybchenko 	case EFX_MON_STAT_FAN_0:
74821b72677SAndrew Rybchenko 	case EFX_MON_STAT_FAN_1:
74921b72677SAndrew Rybchenko 	case EFX_MON_STAT_FAN_2:
75021b72677SAndrew Rybchenko 	case EFX_MON_STAT_FAN_3:
75121b72677SAndrew Rybchenko 	case EFX_MON_STAT_FAN_4:
75221b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_VAOE:
75321b72677SAndrew Rybchenko 	case EFX_MON_STAT_OUT_IAOE:
75421b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_IAOE:
75521b72677SAndrew Rybchenko 	case EFX_MON_STAT_NIC_POWER:
75621b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_0V9:
75721b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I0V9:
75821b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I1V2:
75921b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_0V9_ADC:
76021b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_2_TEMP:
76121b72677SAndrew Rybchenko 	case EFX_MON_STAT_VREG_INTERNAL_TEMP:
76221b72677SAndrew Rybchenko 	case EFX_MON_STAT_VREG_0V9_TEMP:
76321b72677SAndrew Rybchenko 	case EFX_MON_STAT_VREG_1V2_TEMP:
76421b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_VPTAT:
76521b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_INTERNAL_TEMP:
76621b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_VPTAT_EXTADC:
76721b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_INTERNAL_TEMP_EXTADC:
76821b72677SAndrew Rybchenko 	case EFX_MON_STAT_AMBIENT_TEMP:
76921b72677SAndrew Rybchenko 	case EFX_MON_STAT_AIRFLOW:
77021b72677SAndrew Rybchenko 	case EFX_MON_STAT_VDD08D_VSS08D_CSR:
77121b72677SAndrew Rybchenko 	case EFX_MON_STAT_VDD08D_VSS08D_CSR_EXTADC:
77221b72677SAndrew Rybchenko 	case EFX_MON_STAT_HOTPOINT_TEMP:
77321b72677SAndrew Rybchenko 	case EFX_MON_STAT_MUM_VCC:
77421b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_0V9_A:
77521b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I0V9_A:
77621b72677SAndrew Rybchenko 	case EFX_MON_STAT_VREG_0V9_A_TEMP:
77721b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_0V9_B:
77821b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I0V9_B:
77921b72677SAndrew Rybchenko 	case EFX_MON_STAT_VREG_0V9_B_TEMP:
78021b72677SAndrew Rybchenko 	case EFX_MON_STAT_CCOM_AVREG_1V2_SUPPLY:
78121b72677SAndrew Rybchenko 	case EFX_MON_STAT_CCOM_AVREG_1V2_SUPPLY_EXTADC:
78221b72677SAndrew Rybchenko 	case EFX_MON_STAT_CCOM_AVREG_1V8_SUPPLY:
78321b72677SAndrew Rybchenko 	case EFX_MON_STAT_CCOM_AVREG_1V8_SUPPLY_EXTADC:
78421b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_MASTER_VPTAT:
78521b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_MASTER_INTERNAL_TEMP:
78621b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_MASTER_VPTAT_EXTADC:
78721b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_MASTER_INTERNAL_TEMP_EXTADC:
78821b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_SLAVE_VPTAT:
78921b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_SLAVE_INTERNAL_TEMP:
79021b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_SLAVE_VPTAT_EXTADC:
79121b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_SLAVE_INTERNAL_TEMP_EXTADC:
79221b72677SAndrew Rybchenko 	case EFX_MON_STAT_SODIMM_VOUT:
79321b72677SAndrew Rybchenko 	case EFX_MON_STAT_SODIMM_0_TEMP:
79421b72677SAndrew Rybchenko 	case EFX_MON_STAT_SODIMM_1_TEMP:
79521b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY0_VCC:
79621b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY1_VCC:
79721b72677SAndrew Rybchenko 	case EFX_MON_STAT_CONTROLLER_TDIODE_TEMP:
79821b72677SAndrew Rybchenko 	case EFX_MON_STAT_BOARD_FRONT_TEMP:
79921b72677SAndrew Rybchenko 	case EFX_MON_STAT_BOARD_BACK_TEMP:
80021b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I1V8:
80121b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I2V5:
80221b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I3V3:
80321b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I12V0:
80421b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_1V3:
80521b72677SAndrew Rybchenko 	case EFX_MON_STAT_IN_I1V3:
80621b72677SAndrew Rybchenko 		*maskp = EFX_MON_STAT_PORTMAP_ALL;
80721b72677SAndrew Rybchenko 		break;
80821b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY0_TEMP:
80921b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY0_COOLING:
81021b72677SAndrew Rybchenko 	case EFX_MON_STAT_PHY_POWER_PORT0:
81121b72677SAndrew Rybchenko 		*maskp = EFX_MON_STAT_PORTMAP_PORT0;
81221b72677SAndrew Rybchenko 		break;
81321b72677SAndrew Rybchenko 	default:
81421b72677SAndrew Rybchenko 		*maskp = EFX_MON_STAT_PORTMAP_UNKNOWN;
81521b72677SAndrew Rybchenko 		break;
81621b72677SAndrew Rybchenko 	};
81721b72677SAndrew Rybchenko 
81821b72677SAndrew Rybchenko 	if (*maskp == EFX_MON_STAT_PORTMAP_UNKNOWN)
81921b72677SAndrew Rybchenko 		goto fail1;
82021b72677SAndrew Rybchenko 
82121b72677SAndrew Rybchenko 	return (B_TRUE);
82221b72677SAndrew Rybchenko 
82321b72677SAndrew Rybchenko fail1:
82421b72677SAndrew Rybchenko 	EFSYS_PROBE1(fail1, boolean_t, B_TRUE);
82521b72677SAndrew Rybchenko 	return (B_FALSE);
82621b72677SAndrew Rybchenko };
82721b72677SAndrew Rybchenko 
82821b72677SAndrew Rybchenko /* END MKCONFIG GENERATED MonitorStatisticPortsBlock */
82921b72677SAndrew Rybchenko 
830460cb568SAndrew Rybchenko 	__checkReturn			efx_rc_t
efx_mon_stats_update(__in efx_nic_t * enp,__in efsys_mem_t * esmp,__inout_ecount (EFX_MON_NSTATS)efx_mon_stat_value_t * values)831e948693eSPhilip Paeps efx_mon_stats_update(
832e948693eSPhilip Paeps 	__in				efx_nic_t *enp,
833e948693eSPhilip Paeps 	__in				efsys_mem_t *esmp,
834536c03c2SAndrew Rybchenko 	__inout_ecount(EFX_MON_NSTATS)	efx_mon_stat_value_t *values)
835e948693eSPhilip Paeps {
836e948693eSPhilip Paeps 	efx_mon_t *emp = &(enp->en_mon);
837ec831f7fSAndrew Rybchenko 	const efx_mon_ops_t *emop = emp->em_emop;
838e948693eSPhilip Paeps 
839e948693eSPhilip Paeps 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
840e948693eSPhilip Paeps 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MON);
841e948693eSPhilip Paeps 
842e948693eSPhilip Paeps 	return (emop->emo_stats_update(enp, esmp, values));
843e948693eSPhilip Paeps }
844e948693eSPhilip Paeps 
845b4d3f02eSAndrew Rybchenko 	__checkReturn			efx_rc_t
efx_mon_limits_update(__in efx_nic_t * enp,__inout_ecount (EFX_MON_NSTATS)efx_mon_stat_limits_t * values)846b4d3f02eSAndrew Rybchenko efx_mon_limits_update(
847b4d3f02eSAndrew Rybchenko 	__in				efx_nic_t *enp,
848b4d3f02eSAndrew Rybchenko 	__inout_ecount(EFX_MON_NSTATS)	efx_mon_stat_limits_t *values)
849b4d3f02eSAndrew Rybchenko {
850b4d3f02eSAndrew Rybchenko 	efx_mon_t *emp = &(enp->en_mon);
851b4d3f02eSAndrew Rybchenko 	const efx_mon_ops_t *emop = emp->em_emop;
852b4d3f02eSAndrew Rybchenko 
853b4d3f02eSAndrew Rybchenko 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
854b4d3f02eSAndrew Rybchenko 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MON);
855b4d3f02eSAndrew Rybchenko 
856b4d3f02eSAndrew Rybchenko 	return (emop->emo_limits_update(enp, values));
857b4d3f02eSAndrew Rybchenko }
858b4d3f02eSAndrew Rybchenko 
859e948693eSPhilip Paeps #endif	/* EFSYS_OPT_MON_STATS */
860e948693eSPhilip Paeps 
861e948693eSPhilip Paeps 		void
efx_mon_fini(__in efx_nic_t * enp)862e948693eSPhilip Paeps efx_mon_fini(
863e948693eSPhilip Paeps 	__in	efx_nic_t *enp)
864e948693eSPhilip Paeps {
865e948693eSPhilip Paeps 	efx_mon_t *emp = &(enp->en_mon);
866e948693eSPhilip Paeps 
867e948693eSPhilip Paeps 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
868e948693eSPhilip Paeps 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
869e948693eSPhilip Paeps 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MON);
870e948693eSPhilip Paeps 
871e948693eSPhilip Paeps 	emp->em_emop = NULL;
872e948693eSPhilip Paeps 
873e948693eSPhilip Paeps 	emp->em_type = EFX_MON_INVALID;
874e948693eSPhilip Paeps 
875e948693eSPhilip Paeps 	enp->en_mod_flags &= ~EFX_MOD_MON;
876e948693eSPhilip Paeps }
877