1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2009-2016 Solarflare Communications Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright notice, 11 * this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 20 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * The views and conclusions contained in the software and documentation are 29 * those of the authors and should not be interpreted as representing official 30 * policies, either expressed or implied, of the FreeBSD Project. 31 * 32 * $FreeBSD$ 33 */ 34 35 #ifndef _SYS_SIENA_IMPL_H 36 #define _SYS_SIENA_IMPL_H 37 38 #include "efx.h" 39 #include "efx_regs.h" 40 #include "efx_mcdi.h" 41 #include "siena_flash.h" 42 43 #ifdef __cplusplus 44 extern "C" { 45 #endif 46 47 #ifndef EFX_TXQ_DC_SIZE 48 #define EFX_TXQ_DC_SIZE 1 /* 16 descriptors */ 49 #endif 50 #ifndef EFX_RXQ_DC_SIZE 51 #define EFX_RXQ_DC_SIZE 3 /* 64 descriptors */ 52 #endif 53 #define EFX_TXQ_DC_NDESCS(_dcsize) (8 << (_dcsize)) 54 55 #define SIENA_NVRAM_CHUNK 0x80 56 57 extern __checkReturn efx_rc_t 58 siena_nic_probe( 59 __in efx_nic_t *enp); 60 61 extern __checkReturn efx_rc_t 62 siena_nic_reset( 63 __in efx_nic_t *enp); 64 65 extern __checkReturn efx_rc_t 66 siena_nic_init( 67 __in efx_nic_t *enp); 68 69 #if EFSYS_OPT_DIAG 70 71 extern efx_sram_pattern_fn_t __efx_sram_pattern_fns[]; 72 73 typedef struct siena_register_set_s { 74 unsigned int address; 75 unsigned int step; 76 unsigned int rows; 77 efx_oword_t mask; 78 } siena_register_set_t; 79 80 extern __checkReturn efx_rc_t 81 siena_nic_register_test( 82 __in efx_nic_t *enp); 83 84 #endif /* EFSYS_OPT_DIAG */ 85 86 extern void 87 siena_nic_fini( 88 __in efx_nic_t *enp); 89 90 extern void 91 siena_nic_unprobe( 92 __in efx_nic_t *enp); 93 94 #define SIENA_SRAM_ROWS 0x12000 95 96 extern void 97 siena_sram_init( 98 __in efx_nic_t *enp); 99 100 #if EFSYS_OPT_DIAG 101 102 extern __checkReturn efx_rc_t 103 siena_sram_test( 104 __in efx_nic_t *enp, 105 __in efx_sram_pattern_fn_t func); 106 107 #endif /* EFSYS_OPT_DIAG */ 108 109 #if EFSYS_OPT_MCDI 110 111 extern __checkReturn efx_rc_t 112 siena_mcdi_init( 113 __in efx_nic_t *enp, 114 __in const efx_mcdi_transport_t *mtp); 115 116 extern void 117 siena_mcdi_send_request( 118 __in efx_nic_t *enp, 119 __in_bcount(hdr_len) void *hdrp, 120 __in size_t hdr_len, 121 __in_bcount(sdu_len) void *sdup, 122 __in size_t sdu_len); 123 124 extern __checkReturn boolean_t 125 siena_mcdi_poll_response( 126 __in efx_nic_t *enp); 127 128 extern void 129 siena_mcdi_read_response( 130 __in efx_nic_t *enp, 131 __out_bcount(length) void *bufferp, 132 __in size_t offset, 133 __in size_t length); 134 135 extern efx_rc_t 136 siena_mcdi_poll_reboot( 137 __in efx_nic_t *enp); 138 139 extern void 140 siena_mcdi_fini( 141 __in efx_nic_t *enp); 142 143 extern __checkReturn efx_rc_t 144 siena_mcdi_feature_supported( 145 __in efx_nic_t *enp, 146 __in efx_mcdi_feature_id_t id, 147 __out boolean_t *supportedp); 148 149 extern void 150 siena_mcdi_get_timeout( 151 __in efx_nic_t *enp, 152 __in efx_mcdi_req_t *emrp, 153 __out uint32_t *timeoutp); 154 155 #endif /* EFSYS_OPT_MCDI */ 156 157 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD 158 159 extern __checkReturn efx_rc_t 160 siena_nvram_partn_lock( 161 __in efx_nic_t *enp, 162 __in uint32_t partn); 163 164 extern __checkReturn efx_rc_t 165 siena_nvram_partn_unlock( 166 __in efx_nic_t *enp, 167 __in uint32_t partn, 168 __out_opt uint32_t *verify_resultp); 169 170 extern __checkReturn efx_rc_t 171 siena_nvram_get_dynamic_cfg( 172 __in efx_nic_t *enp, 173 __in uint32_t partn, 174 __in boolean_t vpd, 175 __out siena_mc_dynamic_config_hdr_t **dcfgp, 176 __out size_t *sizep); 177 178 #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */ 179 180 #if EFSYS_OPT_NVRAM 181 182 #if EFSYS_OPT_DIAG 183 184 extern __checkReturn efx_rc_t 185 siena_nvram_test( 186 __in efx_nic_t *enp); 187 188 #endif /* EFSYS_OPT_DIAG */ 189 190 extern __checkReturn efx_rc_t 191 siena_nvram_get_subtype( 192 __in efx_nic_t *enp, 193 __in uint32_t partn, 194 __out uint32_t *subtypep); 195 196 extern __checkReturn efx_rc_t 197 siena_nvram_type_to_partn( 198 __in efx_nic_t *enp, 199 __in efx_nvram_type_t type, 200 __out uint32_t *partnp); 201 202 extern __checkReturn efx_rc_t 203 siena_nvram_partn_size( 204 __in efx_nic_t *enp, 205 __in uint32_t partn, 206 __out size_t *sizep); 207 208 extern __checkReturn efx_rc_t 209 siena_nvram_partn_rw_start( 210 __in efx_nic_t *enp, 211 __in uint32_t partn, 212 __out size_t *chunk_sizep); 213 214 extern __checkReturn efx_rc_t 215 siena_nvram_partn_read( 216 __in efx_nic_t *enp, 217 __in uint32_t partn, 218 __in unsigned int offset, 219 __out_bcount(size) caddr_t data, 220 __in size_t size); 221 222 extern __checkReturn efx_rc_t 223 siena_nvram_partn_erase( 224 __in efx_nic_t *enp, 225 __in uint32_t partn, 226 __in unsigned int offset, 227 __in size_t size); 228 229 extern __checkReturn efx_rc_t 230 siena_nvram_partn_write( 231 __in efx_nic_t *enp, 232 __in uint32_t partn, 233 __in unsigned int offset, 234 __out_bcount(size) caddr_t data, 235 __in size_t size); 236 237 extern __checkReturn efx_rc_t 238 siena_nvram_partn_rw_finish( 239 __in efx_nic_t *enp, 240 __in uint32_t partn, 241 __out_opt uint32_t *verify_resultp); 242 243 extern __checkReturn efx_rc_t 244 siena_nvram_partn_get_version( 245 __in efx_nic_t *enp, 246 __in uint32_t partn, 247 __out uint32_t *subtypep, 248 __out_ecount(4) uint16_t version[4]); 249 250 extern __checkReturn efx_rc_t 251 siena_nvram_partn_set_version( 252 __in efx_nic_t *enp, 253 __in uint32_t partn, 254 __in_ecount(4) uint16_t version[4]); 255 256 #endif /* EFSYS_OPT_NVRAM */ 257 258 #if EFSYS_OPT_VPD 259 260 extern __checkReturn efx_rc_t 261 siena_vpd_init( 262 __in efx_nic_t *enp); 263 264 extern __checkReturn efx_rc_t 265 siena_vpd_size( 266 __in efx_nic_t *enp, 267 __out size_t *sizep); 268 269 extern __checkReturn efx_rc_t 270 siena_vpd_read( 271 __in efx_nic_t *enp, 272 __out_bcount(size) caddr_t data, 273 __in size_t size); 274 275 extern __checkReturn efx_rc_t 276 siena_vpd_verify( 277 __in efx_nic_t *enp, 278 __in_bcount(size) caddr_t data, 279 __in size_t size); 280 281 extern __checkReturn efx_rc_t 282 siena_vpd_reinit( 283 __in efx_nic_t *enp, 284 __in_bcount(size) caddr_t data, 285 __in size_t size); 286 287 extern __checkReturn efx_rc_t 288 siena_vpd_get( 289 __in efx_nic_t *enp, 290 __in_bcount(size) caddr_t data, 291 __in size_t size, 292 __inout efx_vpd_value_t *evvp); 293 294 extern __checkReturn efx_rc_t 295 siena_vpd_set( 296 __in efx_nic_t *enp, 297 __in_bcount(size) caddr_t data, 298 __in size_t size, 299 __in efx_vpd_value_t *evvp); 300 301 extern __checkReturn efx_rc_t 302 siena_vpd_next( 303 __in efx_nic_t *enp, 304 __in_bcount(size) caddr_t data, 305 __in size_t size, 306 __out efx_vpd_value_t *evvp, 307 __inout unsigned int *contp); 308 309 extern __checkReturn efx_rc_t 310 siena_vpd_write( 311 __in efx_nic_t *enp, 312 __in_bcount(size) caddr_t data, 313 __in size_t size); 314 315 extern void 316 siena_vpd_fini( 317 __in efx_nic_t *enp); 318 319 #endif /* EFSYS_OPT_VPD */ 320 321 typedef struct siena_link_state_s { 322 uint32_t sls_adv_cap_mask; 323 uint32_t sls_lp_cap_mask; 324 unsigned int sls_fcntl; 325 efx_link_mode_t sls_link_mode; 326 #if EFSYS_OPT_LOOPBACK 327 efx_loopback_type_t sls_loopback; 328 #endif 329 boolean_t sls_mac_up; 330 } siena_link_state_t; 331 332 extern void 333 siena_phy_link_ev( 334 __in efx_nic_t *enp, 335 __in efx_qword_t *eqp, 336 __out efx_link_mode_t *link_modep); 337 338 extern __checkReturn efx_rc_t 339 siena_phy_get_link( 340 __in efx_nic_t *enp, 341 __out siena_link_state_t *slsp); 342 343 extern __checkReturn efx_rc_t 344 siena_phy_power( 345 __in efx_nic_t *enp, 346 __in boolean_t on); 347 348 extern __checkReturn efx_rc_t 349 siena_phy_reconfigure( 350 __in efx_nic_t *enp); 351 352 extern __checkReturn efx_rc_t 353 siena_phy_verify( 354 __in efx_nic_t *enp); 355 356 extern __checkReturn efx_rc_t 357 siena_phy_oui_get( 358 __in efx_nic_t *enp, 359 __out uint32_t *ouip); 360 361 #if EFSYS_OPT_PHY_STATS 362 363 extern void 364 siena_phy_decode_stats( 365 __in efx_nic_t *enp, 366 __in uint32_t vmask, 367 __in_opt efsys_mem_t *esmp, 368 __out_opt uint64_t *smaskp, 369 __inout_ecount_opt(EFX_PHY_NSTATS) uint32_t *stat); 370 371 extern __checkReturn efx_rc_t 372 siena_phy_stats_update( 373 __in efx_nic_t *enp, 374 __in efsys_mem_t *esmp, 375 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat); 376 377 #endif /* EFSYS_OPT_PHY_STATS */ 378 379 #if EFSYS_OPT_BIST 380 381 extern __checkReturn efx_rc_t 382 siena_phy_bist_start( 383 __in efx_nic_t *enp, 384 __in efx_bist_type_t type); 385 386 extern __checkReturn efx_rc_t 387 siena_phy_bist_poll( 388 __in efx_nic_t *enp, 389 __in efx_bist_type_t type, 390 __out efx_bist_result_t *resultp, 391 __out_opt __drv_when(count > 0, __notnull) 392 uint32_t *value_maskp, 393 __out_ecount_opt(count) __drv_when(count > 0, __notnull) 394 unsigned long *valuesp, 395 __in size_t count); 396 397 extern void 398 siena_phy_bist_stop( 399 __in efx_nic_t *enp, 400 __in efx_bist_type_t type); 401 402 #endif /* EFSYS_OPT_BIST */ 403 404 extern __checkReturn efx_rc_t 405 siena_mac_poll( 406 __in efx_nic_t *enp, 407 __out efx_link_mode_t *link_modep); 408 409 extern __checkReturn efx_rc_t 410 siena_mac_up( 411 __in efx_nic_t *enp, 412 __out boolean_t *mac_upp); 413 414 extern __checkReturn efx_rc_t 415 siena_mac_reconfigure( 416 __in efx_nic_t *enp); 417 418 extern __checkReturn efx_rc_t 419 siena_mac_pdu_get( 420 __in efx_nic_t *enp, 421 __out size_t *pdu); 422 423 #if EFSYS_OPT_LOOPBACK 424 425 extern __checkReturn efx_rc_t 426 siena_mac_loopback_set( 427 __in efx_nic_t *enp, 428 __in efx_link_mode_t link_mode, 429 __in efx_loopback_type_t loopback_type); 430 431 #endif /* EFSYS_OPT_LOOPBACK */ 432 433 #if EFSYS_OPT_MAC_STATS 434 435 extern __checkReturn efx_rc_t 436 siena_mac_stats_get_mask( 437 __in efx_nic_t *enp, 438 __inout_bcount(mask_size) uint32_t *maskp, 439 __in size_t mask_size); 440 441 extern __checkReturn efx_rc_t 442 siena_mac_stats_update( 443 __in efx_nic_t *enp, 444 __in efsys_mem_t *esmp, 445 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat, 446 __inout_opt uint32_t *generationp); 447 448 #endif /* EFSYS_OPT_MAC_STATS */ 449 450 #ifdef __cplusplus 451 } 452 #endif 453 454 #endif /* _SYS_SIENA_IMPL_H */ 455