xref: /freebsd/sys/dev/usb/controller/xhci_pci.c (revision d184218c)
1 /*-
2  * Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  * 1. Redistributions of source code must retain the above copyright
8  *    notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  *    notice, this list of conditions and the following disclaimer in the
11  *    documentation and/or other materials provided with the distribution.
12  *
13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23  * SUCH DAMAGE.
24  */
25 
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
28 
29 #include <sys/stdint.h>
30 #include <sys/stddef.h>
31 #include <sys/param.h>
32 #include <sys/queue.h>
33 #include <sys/types.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/bus.h>
37 #include <sys/module.h>
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 #include <sys/condvar.h>
41 #include <sys/sysctl.h>
42 #include <sys/sx.h>
43 #include <sys/unistd.h>
44 #include <sys/callout.h>
45 #include <sys/malloc.h>
46 #include <sys/priv.h>
47 
48 #include <dev/usb/usb.h>
49 #include <dev/usb/usbdi.h>
50 
51 #include <dev/usb/usb_core.h>
52 #include <dev/usb/usb_busdma.h>
53 #include <dev/usb/usb_process.h>
54 #include <dev/usb/usb_util.h>
55 
56 #include <dev/usb/usb_controller.h>
57 #include <dev/usb/usb_bus.h>
58 #include <dev/usb/usb_pci.h>
59 #include <dev/usb/controller/xhci.h>
60 #include <dev/usb/controller/xhcireg.h>
61 #include "usb_if.h"
62 
63 static device_probe_t xhci_pci_probe;
64 static device_attach_t xhci_pci_attach;
65 static device_detach_t xhci_pci_detach;
66 static usb_take_controller_t xhci_pci_take_controller;
67 
68 static device_method_t xhci_device_methods[] = {
69 	/* device interface */
70 	DEVMETHOD(device_probe, xhci_pci_probe),
71 	DEVMETHOD(device_attach, xhci_pci_attach),
72 	DEVMETHOD(device_detach, xhci_pci_detach),
73 	DEVMETHOD(device_suspend, bus_generic_suspend),
74 	DEVMETHOD(device_resume, bus_generic_resume),
75 	DEVMETHOD(device_shutdown, bus_generic_shutdown),
76 	DEVMETHOD(usb_take_controller, xhci_pci_take_controller),
77 
78 	DEVMETHOD_END
79 };
80 
81 static driver_t xhci_driver = {
82 	.name = "xhci",
83 	.methods = xhci_device_methods,
84 	.size = sizeof(struct xhci_softc),
85 };
86 
87 static devclass_t xhci_devclass;
88 
89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, 0, 0);
90 MODULE_DEPEND(xhci, usb, 1, 1, 1);
91 
92 
93 static const char *
94 xhci_pci_match(device_t self)
95 {
96 	uint32_t device_id = pci_get_devid(self);
97 
98 	switch (device_id) {
99 	case 0x01941033:
100 		return ("NEC uPD720200 USB 3.0 controller");
101 
102 	case 0x10421b21:
103 		return ("ASMedia ASM1042 USB 3.0 controller");
104 
105 	case 0x1e318086:
106 		return ("Intel Panther Point USB 3.0 controller");
107 	case 0x8c318086:
108 		return ("Intel Lynx Point USB 3.0 controller");
109 
110 	default:
111 		break;
112 	}
113 
114 	if ((pci_get_class(self) == PCIC_SERIALBUS)
115 	    && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
116 	    && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) {
117 		return ("XHCI (generic) USB 3.0 controller");
118 	}
119 	return (NULL);			/* dunno */
120 }
121 
122 static int
123 xhci_pci_probe(device_t self)
124 {
125 	const char *desc = xhci_pci_match(self);
126 
127 	if (desc) {
128 		device_set_desc(self, desc);
129 		return (0);
130 	} else {
131 		return (ENXIO);
132 	}
133 }
134 
135 static int
136 xhci_pci_attach(device_t self)
137 {
138 	struct xhci_softc *sc = device_get_softc(self);
139 	int err;
140 	int rid;
141 
142 	/* XXX check for 64-bit capability */
143 
144 	if (xhci_init(sc, self)) {
145 		device_printf(self, "Could not initialize softc\n");
146 		goto error;
147 	}
148 
149 	pci_enable_busmaster(self);
150 
151 	rid = PCI_XHCI_CBMEM;
152 	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
153 	    RF_ACTIVE);
154 	if (!sc->sc_io_res) {
155 		device_printf(self, "Could not map memory\n");
156 		goto error;
157 	}
158 	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
159 	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
160 	sc->sc_io_size = rman_get_size(sc->sc_io_res);
161 
162 	rid = 0;
163 	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
164 	    RF_SHAREABLE | RF_ACTIVE);
165 	if (sc->sc_irq_res == NULL) {
166 		device_printf(self, "Could not allocate IRQ\n");
167 		goto error;
168 	}
169 	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
170 	if (sc->sc_bus.bdev == NULL) {
171 		device_printf(self, "Could not add USB device\n");
172 		goto error;
173 	}
174 	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
175 
176 	sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self));
177 
178 #if (__FreeBSD_version >= 700031)
179 	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
180 	    NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
181 #else
182 	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
183 	    (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
184 #endif
185 	if (err) {
186 		device_printf(self, "Could not setup IRQ, err=%d\n", err);
187 		sc->sc_intr_hdl = NULL;
188 		goto error;
189 	}
190 	xhci_pci_take_controller(self);
191 
192 	err = xhci_halt_controller(sc);
193 
194 	if (err == 0)
195 		err = xhci_start_controller(sc);
196 
197 	if (err == 0)
198 		err = device_probe_and_attach(sc->sc_bus.bdev);
199 
200 	if (err) {
201 		device_printf(self, "XHCI halt/start/probe failed err=%d\n", err);
202 		goto error;
203 	}
204 	return (0);
205 
206 error:
207 	xhci_pci_detach(self);
208 	return (ENXIO);
209 }
210 
211 static int
212 xhci_pci_detach(device_t self)
213 {
214 	struct xhci_softc *sc = device_get_softc(self);
215 	device_t bdev;
216 
217 	if (sc->sc_bus.bdev != NULL) {
218 		bdev = sc->sc_bus.bdev;
219 		device_detach(bdev);
220 		device_delete_child(self, bdev);
221 	}
222 	/* during module unload there are lots of children leftover */
223 	device_delete_children(self);
224 
225 	pci_disable_busmaster(self);
226 
227 	if (sc->sc_irq_res && sc->sc_intr_hdl) {
228 
229 		xhci_halt_controller(sc);
230 
231 		bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
232 		sc->sc_intr_hdl = NULL;
233 	}
234 	if (sc->sc_irq_res) {
235 		bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
236 		sc->sc_irq_res = NULL;
237 	}
238 	if (sc->sc_io_res) {
239 		bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
240 		    sc->sc_io_res);
241 		sc->sc_io_res = NULL;
242 	}
243 
244 	xhci_uninit(sc);
245 
246 	return (0);
247 }
248 
249 static int
250 xhci_pci_take_controller(device_t self)
251 {
252 	struct xhci_softc *sc = device_get_softc(self);
253 	uint32_t device_id = pci_get_devid(self);
254 	uint32_t cparams;
255 	uint32_t eecp;
256 	uint32_t eec;
257 	uint16_t to;
258 	uint8_t bios_sem;
259 
260 	cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0);
261 
262 	eec = -1;
263 
264 	/* Synchronise with the BIOS if it owns the controller. */
265 	for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec);
266 	    eecp += XHCI_XECP_NEXT(eec) << 2) {
267 		eec = XREAD4(sc, capa, eecp);
268 
269 		if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY)
270 			continue;
271 		bios_sem = XREAD1(sc, capa, eecp +
272 		    XHCI_XECP_BIOS_SEM);
273 		if (bios_sem == 0)
274 			continue;
275 		device_printf(sc->sc_bus.bdev, "waiting for BIOS "
276 		    "to give up control\n");
277 		XWRITE1(sc, capa, eecp +
278 		    XHCI_XECP_OS_SEM, 1);
279 		to = 500;
280 		while (1) {
281 			bios_sem = XREAD1(sc, capa, eecp +
282 			    XHCI_XECP_BIOS_SEM);
283 			if (bios_sem == 0)
284 				break;
285 
286 			if (--to == 0) {
287 				device_printf(sc->sc_bus.bdev,
288 				    "timed out waiting for BIOS\n");
289 				break;
290 			}
291 			usb_pause_mtx(NULL, hz / 100);	/* wait 10ms */
292 		}
293 	}
294 
295 	/* On Intel chipsets reroute ports from EHCI to XHCI controller. */
296 	if (device_id == 0x1e318086 /* Panther Point */ ||
297 	    device_id == 0x8c318086 /* Lynx Point */) {
298 		uint32_t temp = xhci_get_port_route();
299 		pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp, 4);
300 		pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp, 4);
301 	}
302 	return (0);
303 }
304