1 /*- 2 * Copyright (c) 2012 3 * Ben Gray <bgray@freebsd.org>. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 /* 31 * SMSC LAN9xxx devices (http://www.smsc.com/) 32 * 33 * The LAN9500 & LAN9500A devices are stand-alone USB to Ethernet chips that 34 * support USB 2.0 and 10/100 Mbps Ethernet. 35 * 36 * The LAN951x devices are an integrated USB hub and USB to Ethernet adapter. 37 * The driver only covers the Ethernet part, the standard USB hub driver 38 * supports the hub part. 39 * 40 * This driver is closely modelled on the Linux driver written and copyrighted 41 * by SMSC. 42 * 43 * 44 * 45 * 46 * H/W TCP & UDP Checksum Offloading 47 * --------------------------------- 48 * The chip supports both tx and rx offloading of UDP & TCP checksums, this 49 * feature can be dynamically enabled/disabled. 50 * 51 * RX checksuming is performed across bytes after the IPv4 header to the end of 52 * the Ethernet frame, this means if the frame is padded with non-zero values 53 * the H/W checksum will be incorrect, however the rx code compensates for this. 54 * 55 * TX checksuming is more complicated, the device requires a special header to 56 * be prefixed onto the start of the frame which indicates the start and end 57 * positions of the UDP or TCP frame. This requires the driver to manually 58 * go through the packet data and decode the headers prior to sending. 59 * On Linux they generally provide cues to the location of the csum and the 60 * area to calculate it over, on FreeBSD we seem to have to do it all ourselves, 61 * hence this is not as optimal and therefore h/w tX checksum is currently not 62 * implemented. 63 * 64 */ 65 #include <sys/stdint.h> 66 #include <sys/stddef.h> 67 #include <sys/param.h> 68 #include <sys/queue.h> 69 #include <sys/types.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/bus.h> 73 #include <sys/module.h> 74 #include <sys/lock.h> 75 #include <sys/mutex.h> 76 #include <sys/condvar.h> 77 #include <sys/sysctl.h> 78 #include <sys/sx.h> 79 #include <sys/unistd.h> 80 #include <sys/callout.h> 81 #include <sys/malloc.h> 82 #include <sys/priv.h> 83 #include <sys/random.h> 84 85 #include "opt_platform.h" 86 87 #ifdef FDT 88 #include <dev/fdt/fdt_common.h> 89 #include <dev/ofw/ofw_bus.h> 90 #include <dev/ofw/ofw_bus_subr.h> 91 #endif 92 93 #include <dev/usb/usb.h> 94 #include <dev/usb/usbdi.h> 95 #include <dev/usb/usbdi_util.h> 96 #include "usbdevs.h" 97 98 #define USB_DEBUG_VAR smsc_debug 99 #include <dev/usb/usb_debug.h> 100 #include <dev/usb/usb_process.h> 101 102 #include <dev/usb/net/usb_ethernet.h> 103 104 #include <dev/usb/net/if_smscreg.h> 105 106 #ifdef USB_DEBUG 107 static int smsc_debug = 0; 108 109 SYSCTL_NODE(_hw_usb, OID_AUTO, smsc, CTLFLAG_RW, 0, "USB smsc"); 110 SYSCTL_INT(_hw_usb_smsc, OID_AUTO, debug, CTLFLAG_RW, &smsc_debug, 0, 111 "Debug level"); 112 #endif 113 114 /* 115 * Various supported device vendors/products. 116 */ 117 static const struct usb_device_id smsc_devs[] = { 118 #define SMSC_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) } 119 SMSC_DEV(LAN9514_ETH, 0), 120 #undef SMSC_DEV 121 }; 122 123 124 #ifdef USB_DEBUG 125 #define smsc_dbg_printf(sc, fmt, args...) \ 126 do { \ 127 if (smsc_debug > 0) \ 128 device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \ 129 } while(0) 130 #else 131 #define smsc_dbg_printf(sc, fmt, args...) 132 #endif 133 134 #define smsc_warn_printf(sc, fmt, args...) \ 135 device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args) 136 137 #define smsc_err_printf(sc, fmt, args...) \ 138 device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args) 139 140 141 #define ETHER_IS_ZERO(addr) \ 142 (!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5])) 143 144 #define ETHER_IS_VALID(addr) \ 145 (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr)) 146 147 static device_probe_t smsc_probe; 148 static device_attach_t smsc_attach; 149 static device_detach_t smsc_detach; 150 151 static usb_callback_t smsc_bulk_read_callback; 152 static usb_callback_t smsc_bulk_write_callback; 153 154 static miibus_readreg_t smsc_miibus_readreg; 155 static miibus_writereg_t smsc_miibus_writereg; 156 static miibus_statchg_t smsc_miibus_statchg; 157 158 #if __FreeBSD_version > 1000000 159 static int smsc_attach_post_sub(struct usb_ether *ue); 160 #endif 161 static uether_fn_t smsc_attach_post; 162 static uether_fn_t smsc_init; 163 static uether_fn_t smsc_stop; 164 static uether_fn_t smsc_start; 165 static uether_fn_t smsc_tick; 166 static uether_fn_t smsc_setmulti; 167 static uether_fn_t smsc_setpromisc; 168 169 static int smsc_ifmedia_upd(struct ifnet *); 170 static void smsc_ifmedia_sts(struct ifnet *, struct ifmediareq *); 171 172 static int smsc_chip_init(struct smsc_softc *sc); 173 static int smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 174 175 static const struct usb_config smsc_config[SMSC_N_TRANSFER] = { 176 177 [SMSC_BULK_DT_WR] = { 178 .type = UE_BULK, 179 .endpoint = UE_ADDR_ANY, 180 .direction = UE_DIR_OUT, 181 .frames = 16, 182 .bufsize = 16 * (MCLBYTES + 16), 183 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 184 .callback = smsc_bulk_write_callback, 185 .timeout = 10000, /* 10 seconds */ 186 }, 187 188 [SMSC_BULK_DT_RD] = { 189 .type = UE_BULK, 190 .endpoint = UE_ADDR_ANY, 191 .direction = UE_DIR_IN, 192 .bufsize = 20480, /* bytes */ 193 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 194 .callback = smsc_bulk_read_callback, 195 .timeout = 0, /* no timeout */ 196 }, 197 198 /* The SMSC chip supports an interrupt endpoints, however they aren't 199 * needed as we poll on the MII status. 200 */ 201 }; 202 203 static const struct usb_ether_methods smsc_ue_methods = { 204 .ue_attach_post = smsc_attach_post, 205 #if __FreeBSD_version > 1000000 206 .ue_attach_post_sub = smsc_attach_post_sub, 207 #endif 208 .ue_start = smsc_start, 209 .ue_ioctl = smsc_ioctl, 210 .ue_init = smsc_init, 211 .ue_stop = smsc_stop, 212 .ue_tick = smsc_tick, 213 .ue_setmulti = smsc_setmulti, 214 .ue_setpromisc = smsc_setpromisc, 215 .ue_mii_upd = smsc_ifmedia_upd, 216 .ue_mii_sts = smsc_ifmedia_sts, 217 }; 218 219 /** 220 * smsc_read_reg - Reads a 32-bit register on the device 221 * @sc: driver soft context 222 * @off: offset of the register 223 * @data: pointer a value that will be populated with the register value 224 * 225 * LOCKING: 226 * The device lock must be held before calling this function. 227 * 228 * RETURNS: 229 * 0 on success, a USB_ERR_?? error code on failure. 230 */ 231 static int 232 smsc_read_reg(struct smsc_softc *sc, uint32_t off, uint32_t *data) 233 { 234 struct usb_device_request req; 235 uint32_t buf; 236 usb_error_t err; 237 238 SMSC_LOCK_ASSERT(sc, MA_OWNED); 239 240 req.bmRequestType = UT_READ_VENDOR_DEVICE; 241 req.bRequest = SMSC_UR_READ_REG; 242 USETW(req.wValue, 0); 243 USETW(req.wIndex, off); 244 USETW(req.wLength, 4); 245 246 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 247 if (err != 0) 248 smsc_warn_printf(sc, "Failed to read register 0x%0x\n", off); 249 250 *data = le32toh(buf); 251 252 return (err); 253 } 254 255 /** 256 * smsc_write_reg - Writes a 32-bit register on the device 257 * @sc: driver soft context 258 * @off: offset of the register 259 * @data: the 32-bit value to write into the register 260 * 261 * LOCKING: 262 * The device lock must be held before calling this function. 263 * 264 * RETURNS: 265 * 0 on success, a USB_ERR_?? error code on failure. 266 */ 267 static int 268 smsc_write_reg(struct smsc_softc *sc, uint32_t off, uint32_t data) 269 { 270 struct usb_device_request req; 271 uint32_t buf; 272 usb_error_t err; 273 274 SMSC_LOCK_ASSERT(sc, MA_OWNED); 275 276 buf = htole32(data); 277 278 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 279 req.bRequest = SMSC_UR_WRITE_REG; 280 USETW(req.wValue, 0); 281 USETW(req.wIndex, off); 282 USETW(req.wLength, 4); 283 284 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 285 if (err != 0) 286 smsc_warn_printf(sc, "Failed to write register 0x%0x\n", off); 287 288 return (err); 289 } 290 291 /** 292 * smsc_wait_for_bits - Polls on a register value until bits are cleared 293 * @sc: soft context 294 * @reg: offset of the register 295 * @bits: if the bits are clear the function returns 296 * 297 * LOCKING: 298 * The device lock must be held before calling this function. 299 * 300 * RETURNS: 301 * 0 on success, or a USB_ERR_?? error code on failure. 302 */ 303 static int 304 smsc_wait_for_bits(struct smsc_softc *sc, uint32_t reg, uint32_t bits) 305 { 306 usb_ticks_t start_ticks; 307 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 308 uint32_t val; 309 int err; 310 311 SMSC_LOCK_ASSERT(sc, MA_OWNED); 312 313 start_ticks = (usb_ticks_t)ticks; 314 do { 315 if ((err = smsc_read_reg(sc, reg, &val)) != 0) 316 return (err); 317 if (!(val & bits)) 318 return (0); 319 320 uether_pause(&sc->sc_ue, hz / 100); 321 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 322 323 return (USB_ERR_TIMEOUT); 324 } 325 326 /** 327 * smsc_eeprom_read - Reads the attached EEPROM 328 * @sc: soft context 329 * @off: the eeprom address offset 330 * @buf: stores the bytes 331 * @buflen: the number of bytes to read 332 * 333 * Simply reads bytes from an attached eeprom. 334 * 335 * LOCKING: 336 * The function takes and releases the device lock if it is not already held. 337 * 338 * RETURNS: 339 * 0 on success, or a USB_ERR_?? error code on failure. 340 */ 341 static int 342 smsc_eeprom_read(struct smsc_softc *sc, uint16_t off, uint8_t *buf, uint16_t buflen) 343 { 344 usb_ticks_t start_ticks; 345 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 346 int err; 347 int locked; 348 uint32_t val; 349 uint16_t i; 350 351 locked = mtx_owned(&sc->sc_mtx); 352 if (!locked) 353 SMSC_LOCK(sc); 354 355 err = smsc_wait_for_bits(sc, SMSC_EEPROM_CMD, SMSC_EEPROM_CMD_BUSY); 356 if (err != 0) { 357 smsc_warn_printf(sc, "eeprom busy, failed to read data\n"); 358 goto done; 359 } 360 361 /* start reading the bytes, one at a time */ 362 for (i = 0; i < buflen; i++) { 363 364 val = SMSC_EEPROM_CMD_BUSY | (SMSC_EEPROM_CMD_ADDR_MASK & (off + i)); 365 if ((err = smsc_write_reg(sc, SMSC_EEPROM_CMD, val)) != 0) 366 goto done; 367 368 start_ticks = (usb_ticks_t)ticks; 369 do { 370 if ((err = smsc_read_reg(sc, SMSC_EEPROM_CMD, &val)) != 0) 371 goto done; 372 if (!(val & SMSC_EEPROM_CMD_BUSY) || (val & SMSC_EEPROM_CMD_TIMEOUT)) 373 break; 374 375 uether_pause(&sc->sc_ue, hz / 100); 376 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 377 378 if (val & (SMSC_EEPROM_CMD_BUSY | SMSC_EEPROM_CMD_TIMEOUT)) { 379 smsc_warn_printf(sc, "eeprom command failed\n"); 380 err = USB_ERR_IOERROR; 381 break; 382 } 383 384 if ((err = smsc_read_reg(sc, SMSC_EEPROM_DATA, &val)) != 0) 385 goto done; 386 387 buf[i] = (val & 0xff); 388 } 389 390 done: 391 if (!locked) 392 SMSC_UNLOCK(sc); 393 394 return (err); 395 } 396 397 /** 398 * smsc_miibus_readreg - Reads a MII/MDIO register 399 * @dev: usb ether device 400 * @phy: the number of phy reading from 401 * @reg: the register address 402 * 403 * Attempts to read a phy register over the MII bus. 404 * 405 * LOCKING: 406 * Takes and releases the device mutex lock if not already held. 407 * 408 * RETURNS: 409 * Returns the 16-bits read from the MII register, if this function fails 0 410 * is returned. 411 */ 412 static int 413 smsc_miibus_readreg(device_t dev, int phy, int reg) 414 { 415 struct smsc_softc *sc = device_get_softc(dev); 416 int locked; 417 uint32_t addr; 418 uint32_t val = 0; 419 420 locked = mtx_owned(&sc->sc_mtx); 421 if (!locked) 422 SMSC_LOCK(sc); 423 424 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) { 425 smsc_warn_printf(sc, "MII is busy\n"); 426 goto done; 427 } 428 429 addr = (phy << 11) | (reg << 6) | SMSC_MII_READ; 430 smsc_write_reg(sc, SMSC_MII_ADDR, addr); 431 432 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) 433 smsc_warn_printf(sc, "MII read timeout\n"); 434 435 smsc_read_reg(sc, SMSC_MII_DATA, &val); 436 val = le32toh(val); 437 438 done: 439 if (!locked) 440 SMSC_UNLOCK(sc); 441 442 return (val & 0xFFFF); 443 } 444 445 /** 446 * smsc_miibus_writereg - Writes a MII/MDIO register 447 * @dev: usb ether device 448 * @phy: the number of phy writing to 449 * @reg: the register address 450 * @val: the value to write 451 * 452 * Attempts to write a phy register over the MII bus. 453 * 454 * LOCKING: 455 * Takes and releases the device mutex lock if not already held. 456 * 457 * RETURNS: 458 * Always returns 0 regardless of success or failure. 459 */ 460 static int 461 smsc_miibus_writereg(device_t dev, int phy, int reg, int val) 462 { 463 struct smsc_softc *sc = device_get_softc(dev); 464 int locked; 465 uint32_t addr; 466 467 if (sc->sc_phyno != phy) 468 return (0); 469 470 locked = mtx_owned(&sc->sc_mtx); 471 if (!locked) 472 SMSC_LOCK(sc); 473 474 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) { 475 smsc_warn_printf(sc, "MII is busy\n"); 476 goto done; 477 } 478 479 val = htole32(val); 480 smsc_write_reg(sc, SMSC_MII_DATA, val); 481 482 addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE; 483 smsc_write_reg(sc, SMSC_MII_ADDR, addr); 484 485 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) 486 smsc_warn_printf(sc, "MII write timeout\n"); 487 488 done: 489 if (!locked) 490 SMSC_UNLOCK(sc); 491 return (0); 492 } 493 494 495 496 /** 497 * smsc_miibus_statchg - Called to detect phy status change 498 * @dev: usb ether device 499 * 500 * This function is called periodically by the system to poll for status 501 * changes of the link. 502 * 503 * LOCKING: 504 * Takes and releases the device mutex lock if not already held. 505 */ 506 static void 507 smsc_miibus_statchg(device_t dev) 508 { 509 struct smsc_softc *sc = device_get_softc(dev); 510 struct mii_data *mii = uether_getmii(&sc->sc_ue); 511 struct ifnet *ifp; 512 int locked; 513 int err; 514 uint32_t flow; 515 uint32_t afc_cfg; 516 517 locked = mtx_owned(&sc->sc_mtx); 518 if (!locked) 519 SMSC_LOCK(sc); 520 521 ifp = uether_getifp(&sc->sc_ue); 522 if (mii == NULL || ifp == NULL || 523 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 524 goto done; 525 526 /* Use the MII status to determine link status */ 527 sc->sc_flags &= ~SMSC_FLAG_LINK; 528 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 529 (IFM_ACTIVE | IFM_AVALID)) { 530 switch (IFM_SUBTYPE(mii->mii_media_active)) { 531 case IFM_10_T: 532 case IFM_100_TX: 533 sc->sc_flags |= SMSC_FLAG_LINK; 534 break; 535 case IFM_1000_T: 536 /* Gigabit ethernet not supported by chipset */ 537 break; 538 default: 539 break; 540 } 541 } 542 543 /* Lost link, do nothing. */ 544 if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) { 545 smsc_dbg_printf(sc, "link flag not set\n"); 546 goto done; 547 } 548 549 err = smsc_read_reg(sc, SMSC_AFC_CFG, &afc_cfg); 550 if (err) { 551 smsc_warn_printf(sc, "failed to read initial AFC_CFG, error %d\n", err); 552 goto done; 553 } 554 555 /* Enable/disable full duplex operation and TX/RX pause */ 556 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 557 smsc_dbg_printf(sc, "full duplex operation\n"); 558 sc->sc_mac_csr &= ~SMSC_MAC_CSR_RCVOWN; 559 sc->sc_mac_csr |= SMSC_MAC_CSR_FDPX; 560 561 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0) 562 flow = 0xffff0002; 563 else 564 flow = 0; 565 566 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0) 567 afc_cfg |= 0xf; 568 else 569 afc_cfg &= ~0xf; 570 571 } else { 572 smsc_dbg_printf(sc, "half duplex operation\n"); 573 sc->sc_mac_csr &= ~SMSC_MAC_CSR_FDPX; 574 sc->sc_mac_csr |= SMSC_MAC_CSR_RCVOWN; 575 576 flow = 0; 577 afc_cfg |= 0xf; 578 } 579 580 err = smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 581 err += smsc_write_reg(sc, SMSC_FLOW, flow); 582 err += smsc_write_reg(sc, SMSC_AFC_CFG, afc_cfg); 583 if (err) 584 smsc_warn_printf(sc, "media change failed, error %d\n", err); 585 586 done: 587 if (!locked) 588 SMSC_UNLOCK(sc); 589 } 590 591 /** 592 * smsc_ifmedia_upd - Set media options 593 * @ifp: interface pointer 594 * 595 * Basically boilerplate code that simply calls the mii functions to set the 596 * media options. 597 * 598 * LOCKING: 599 * The device lock must be held before this function is called. 600 * 601 * RETURNS: 602 * Returns 0 on success or a negative error code. 603 */ 604 static int 605 smsc_ifmedia_upd(struct ifnet *ifp) 606 { 607 struct smsc_softc *sc = ifp->if_softc; 608 struct mii_data *mii = uether_getmii(&sc->sc_ue); 609 int err; 610 611 SMSC_LOCK_ASSERT(sc, MA_OWNED); 612 613 if (mii->mii_instance) { 614 struct mii_softc *miisc; 615 616 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 617 mii_phy_reset(miisc); 618 } 619 err = mii_mediachg(mii); 620 return (err); 621 } 622 623 /** 624 * smsc_ifmedia_sts - Report current media status 625 * @ifp: inet interface pointer 626 * @ifmr: interface media request 627 * 628 * Basically boilerplate code that simply calls the mii functions to get the 629 * media status. 630 * 631 * LOCKING: 632 * Internally takes and releases the device lock. 633 */ 634 static void 635 smsc_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 636 { 637 struct smsc_softc *sc = ifp->if_softc; 638 struct mii_data *mii = uether_getmii(&sc->sc_ue); 639 640 SMSC_LOCK(sc); 641 642 mii_pollstat(mii); 643 644 SMSC_UNLOCK(sc); 645 646 ifmr->ifm_active = mii->mii_media_active; 647 ifmr->ifm_status = mii->mii_media_status; 648 } 649 650 /** 651 * smsc_hash - Calculate the hash of a mac address 652 * @addr: The mac address to calculate the hash on 653 * 654 * This function is used when configuring a range of m'cast mac addresses to 655 * filter on. The hash of the mac address is put in the device's mac hash 656 * table. 657 * 658 * RETURNS: 659 * Returns a value from 0-63 value which is the hash of the mac address. 660 */ 661 static inline uint32_t 662 smsc_hash(uint8_t addr[ETHER_ADDR_LEN]) 663 { 664 return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 26) & 0x3f; 665 } 666 667 /** 668 * smsc_setmulti - Setup multicast 669 * @ue: usb ethernet device context 670 * 671 * Tells the device to either accept frames with a multicast mac address, a 672 * select group of m'cast mac addresses or just the devices mac address. 673 * 674 * LOCKING: 675 * Should be called with the SMSC lock held. 676 */ 677 static void 678 smsc_setmulti(struct usb_ether *ue) 679 { 680 struct smsc_softc *sc = uether_getsc(ue); 681 struct ifnet *ifp = uether_getifp(ue); 682 struct ifmultiaddr *ifma; 683 uint32_t hashtbl[2] = { 0, 0 }; 684 uint32_t hash; 685 686 SMSC_LOCK_ASSERT(sc, MA_OWNED); 687 688 if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) { 689 smsc_dbg_printf(sc, "receive all multicast enabled\n"); 690 sc->sc_mac_csr |= SMSC_MAC_CSR_MCPAS; 691 sc->sc_mac_csr &= ~SMSC_MAC_CSR_HPFILT; 692 693 } else { 694 /* Take the lock of the mac address list before hashing each of them */ 695 if_maddr_rlock(ifp); 696 697 if (!TAILQ_EMPTY(&ifp->if_multiaddrs)) { 698 /* We are filtering on a set of address so calculate hashes of each 699 * of the address and set the corresponding bits in the register. 700 */ 701 sc->sc_mac_csr |= SMSC_MAC_CSR_HPFILT; 702 sc->sc_mac_csr &= ~(SMSC_MAC_CSR_PRMS | SMSC_MAC_CSR_MCPAS); 703 704 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 705 if (ifma->ifma_addr->sa_family != AF_LINK) 706 continue; 707 708 hash = smsc_hash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); 709 hashtbl[hash >> 5] |= 1 << (hash & 0x1F); 710 } 711 } else { 712 /* Only receive packets with destination set to our mac address */ 713 sc->sc_mac_csr &= ~(SMSC_MAC_CSR_MCPAS | SMSC_MAC_CSR_HPFILT); 714 } 715 716 if_maddr_runlock(ifp); 717 718 /* Debug */ 719 if (sc->sc_mac_csr & SMSC_MAC_CSR_HPFILT) 720 smsc_dbg_printf(sc, "receive select group of macs\n"); 721 else 722 smsc_dbg_printf(sc, "receive own packets only\n"); 723 } 724 725 /* Write the hash table and mac control registers */ 726 smsc_write_reg(sc, SMSC_HASHH, hashtbl[1]); 727 smsc_write_reg(sc, SMSC_HASHL, hashtbl[0]); 728 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 729 } 730 731 732 /** 733 * smsc_setpromisc - Enables/disables promiscuous mode 734 * @ue: usb ethernet device context 735 * 736 * LOCKING: 737 * Should be called with the SMSC lock held. 738 */ 739 static void 740 smsc_setpromisc(struct usb_ether *ue) 741 { 742 struct smsc_softc *sc = uether_getsc(ue); 743 struct ifnet *ifp = uether_getifp(ue); 744 745 smsc_dbg_printf(sc, "promiscuous mode %sabled\n", 746 (ifp->if_flags & IFF_PROMISC) ? "en" : "dis"); 747 748 SMSC_LOCK_ASSERT(sc, MA_OWNED); 749 750 if (ifp->if_flags & IFF_PROMISC) 751 sc->sc_mac_csr |= SMSC_MAC_CSR_PRMS; 752 else 753 sc->sc_mac_csr &= ~SMSC_MAC_CSR_PRMS; 754 755 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 756 } 757 758 759 /** 760 * smsc_sethwcsum - Enable or disable H/W UDP and TCP checksumming 761 * @sc: driver soft context 762 * 763 * LOCKING: 764 * Should be called with the SMSC lock held. 765 * 766 * RETURNS: 767 * Returns 0 on success or a negative error code. 768 */ 769 static int smsc_sethwcsum(struct smsc_softc *sc) 770 { 771 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 772 uint32_t val; 773 int err; 774 775 if (!ifp) 776 return (-EIO); 777 778 SMSC_LOCK_ASSERT(sc, MA_OWNED); 779 780 err = smsc_read_reg(sc, SMSC_COE_CTRL, &val); 781 if (err != 0) { 782 smsc_warn_printf(sc, "failed to read SMSC_COE_CTRL (err=%d)\n", err); 783 return (err); 784 } 785 786 /* Enable/disable the Rx checksum */ 787 if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_RXCSUM) 788 val |= SMSC_COE_CTRL_RX_EN; 789 else 790 val &= ~SMSC_COE_CTRL_RX_EN; 791 792 /* Enable/disable the Tx checksum (currently not supported) */ 793 if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_TXCSUM) 794 val |= SMSC_COE_CTRL_TX_EN; 795 else 796 val &= ~SMSC_COE_CTRL_TX_EN; 797 798 err = smsc_write_reg(sc, SMSC_COE_CTRL, val); 799 if (err != 0) { 800 smsc_warn_printf(sc, "failed to write SMSC_COE_CTRL (err=%d)\n", err); 801 return (err); 802 } 803 804 return (0); 805 } 806 807 808 /** 809 * smsc_setmacaddress - Sets the mac address in the device 810 * @sc: driver soft context 811 * @addr: pointer to array contain at least 6 bytes of the mac 812 * 813 * Writes the MAC address into the device, usually the MAC is programmed with 814 * values from the EEPROM. 815 * 816 * LOCKING: 817 * Should be called with the SMSC lock held. 818 * 819 * RETURNS: 820 * Returns 0 on success or a negative error code. 821 */ 822 static int 823 smsc_setmacaddress(struct smsc_softc *sc, const uint8_t *addr) 824 { 825 int err; 826 uint32_t val; 827 828 smsc_dbg_printf(sc, "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n", 829 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); 830 831 SMSC_LOCK_ASSERT(sc, MA_OWNED); 832 833 val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; 834 if ((err = smsc_write_reg(sc, SMSC_MAC_ADDRL, val)) != 0) 835 goto done; 836 837 val = (addr[5] << 8) | addr[4]; 838 err = smsc_write_reg(sc, SMSC_MAC_ADDRH, val); 839 840 done: 841 return (err); 842 } 843 844 /** 845 * smsc_reset - Reset the SMSC chip 846 * @sc: device soft context 847 * 848 * LOCKING: 849 * Should be called with the SMSC lock held. 850 */ 851 static void 852 smsc_reset(struct smsc_softc *sc) 853 { 854 struct usb_config_descriptor *cd; 855 usb_error_t err; 856 857 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 858 859 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 860 cd->bConfigurationValue); 861 if (err) 862 smsc_warn_printf(sc, "reset failed (ignored)\n"); 863 864 /* Wait a little while for the chip to get its brains in order. */ 865 uether_pause(&sc->sc_ue, hz / 100); 866 867 /* Reinitialize controller to achieve full reset. */ 868 smsc_chip_init(sc); 869 } 870 871 872 /** 873 * smsc_init - Initialises the LAN95xx chip 874 * @ue: USB ether interface 875 * 876 * Called when the interface is brought up (i.e. ifconfig ue0 up), this 877 * initialise the interface and the rx/tx pipes. 878 * 879 * LOCKING: 880 * Should be called with the SMSC lock held. 881 */ 882 static void 883 smsc_init(struct usb_ether *ue) 884 { 885 struct smsc_softc *sc = uether_getsc(ue); 886 struct ifnet *ifp = uether_getifp(ue); 887 888 SMSC_LOCK_ASSERT(sc, MA_OWNED); 889 890 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 891 return; 892 893 /* Cancel pending I/O */ 894 smsc_stop(ue); 895 896 #if __FreeBSD_version <= 1000000 897 /* On earlier versions this was the first place we could tell the system 898 * that we supported h/w csuming, however this is only called after the 899 * the interface has been brought up - not ideal. 900 */ 901 if (!(ifp->if_capabilities & IFCAP_RXCSUM)) { 902 ifp->if_capabilities |= IFCAP_RXCSUM; 903 ifp->if_capenable |= IFCAP_RXCSUM; 904 ifp->if_hwassist = 0; 905 } 906 907 /* TX checksuming is disabled for now 908 ifp->if_capabilities |= IFCAP_TXCSUM; 909 ifp->if_capenable |= IFCAP_TXCSUM; 910 ifp->if_hwassist = CSUM_TCP | CSUM_UDP; 911 */ 912 #endif 913 914 /* Reset the ethernet interface. */ 915 smsc_reset(sc); 916 917 /* Load the multicast filter. */ 918 smsc_setmulti(ue); 919 920 /* TCP/UDP checksum offload engines. */ 921 smsc_sethwcsum(sc); 922 923 usbd_xfer_set_stall(sc->sc_xfer[SMSC_BULK_DT_WR]); 924 925 /* Indicate we are up and running. */ 926 ifp->if_drv_flags |= IFF_DRV_RUNNING; 927 928 /* Switch to selected media. */ 929 smsc_ifmedia_upd(ifp); 930 smsc_start(ue); 931 } 932 933 /** 934 * smsc_bulk_read_callback - Read callback used to process the USB URB 935 * @xfer: the USB transfer 936 * @error: 937 * 938 * Reads the URB data which can contain one or more ethernet frames, the 939 * frames are copyed into a mbuf and given to the system. 940 * 941 * LOCKING: 942 * No locking required, doesn't access internal driver settings. 943 */ 944 static void 945 smsc_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 946 { 947 struct smsc_softc *sc = usbd_xfer_softc(xfer); 948 struct usb_ether *ue = &sc->sc_ue; 949 struct ifnet *ifp = uether_getifp(ue); 950 struct mbuf *m; 951 struct usb_page_cache *pc; 952 uint32_t rxhdr; 953 uint16_t pktlen; 954 int off; 955 int actlen; 956 957 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 958 smsc_dbg_printf(sc, "rx : actlen %d\n", actlen); 959 960 switch (USB_GET_STATE(xfer)) { 961 case USB_ST_TRANSFERRED: 962 963 /* There is always a zero length frame after bringing the IF up */ 964 if (actlen < (sizeof(rxhdr) + ETHER_CRC_LEN)) 965 goto tr_setup; 966 967 /* There maybe multiple packets in the USB frame, each will have a 968 * header and each needs to have it's own mbuf allocated and populated 969 * for it. 970 */ 971 pc = usbd_xfer_get_frame(xfer, 0); 972 off = 0; 973 974 while (off < actlen) { 975 976 /* The frame header is always aligned on a 4 byte boundary */ 977 off = ((off + 0x3) & ~0x3); 978 979 usbd_copy_out(pc, off, &rxhdr, sizeof(rxhdr)); 980 off += (sizeof(rxhdr) + ETHER_ALIGN); 981 rxhdr = le32toh(rxhdr); 982 983 pktlen = (uint16_t)SMSC_RX_STAT_FRM_LENGTH(rxhdr); 984 985 smsc_dbg_printf(sc, "rx : rxhdr 0x%08x : pktlen %d : actlen %d : " 986 "off %d\n", rxhdr, pktlen, actlen, off); 987 988 989 if (rxhdr & SMSC_RX_STAT_ERROR) { 990 smsc_dbg_printf(sc, "rx error (hdr 0x%08x)\n", rxhdr); 991 ifp->if_ierrors++; 992 if (rxhdr & SMSC_RX_STAT_COLLISION) 993 ifp->if_collisions++; 994 } else { 995 996 /* Check if the ethernet frame is too big or too small */ 997 if ((pktlen < ETHER_HDR_LEN) || (pktlen > (actlen - off))) 998 goto tr_setup; 999 1000 /* Create a new mbuf to store the packet in */ 1001 m = uether_newbuf(); 1002 if (m == NULL) { 1003 smsc_warn_printf(sc, "failed to create new mbuf\n"); 1004 ifp->if_iqdrops++; 1005 goto tr_setup; 1006 } 1007 1008 usbd_copy_out(pc, off, mtod(m, uint8_t *), pktlen); 1009 1010 /* Check if RX TCP/UDP checksumming is being offloaded */ 1011 if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) { 1012 1013 struct ether_header *eh; 1014 1015 eh = mtod(m, struct ether_header *); 1016 1017 /* Remove the extra 2 bytes of the csum */ 1018 pktlen -= 2; 1019 1020 /* The checksum appears to be simplistically calculated 1021 * over the udp/tcp header and data up to the end of the 1022 * eth frame. Which means if the eth frame is padded 1023 * the csum calculation is incorrectly performed over 1024 * the padding bytes as well. Therefore to be safe we 1025 * ignore the H/W csum on frames less than or equal to 1026 * 64 bytes. 1027 * 1028 * Ignore H/W csum for non-IPv4 packets. 1029 */ 1030 if (be16toh(eh->ether_type) == ETHERTYPE_IP && pktlen > ETHER_MIN_LEN) { 1031 1032 /* Indicate the UDP/TCP csum has been calculated */ 1033 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1034 1035 /* Copy the TCP/UDP checksum from the last 2 bytes 1036 * of the transfer and put in the csum_data field. 1037 */ 1038 usbd_copy_out(pc, (off + pktlen), 1039 &m->m_pkthdr.csum_data, 2); 1040 1041 /* The data is copied in network order, but the 1042 * csum algorithm in the kernel expects it to be 1043 * in host network order. 1044 */ 1045 m->m_pkthdr.csum_data = ntohs(m->m_pkthdr.csum_data); 1046 1047 smsc_dbg_printf(sc, "RX checksum offloaded (0x%04x)\n", 1048 m->m_pkthdr.csum_data); 1049 } 1050 1051 /* Need to adjust the offset as well or we'll be off 1052 * by 2 because the csum is removed from the packet 1053 * length. 1054 */ 1055 off += 2; 1056 } 1057 1058 /* Finally enqueue the mbuf on the receive queue */ 1059 /* Remove 4 trailing bytes */ 1060 if (pktlen < (4 + ETHER_HDR_LEN)) { 1061 m_freem(m); 1062 goto tr_setup; 1063 } 1064 uether_rxmbuf(ue, m, pktlen - 4); 1065 } 1066 1067 /* Update the offset to move to the next potential packet */ 1068 off += pktlen; 1069 } 1070 1071 /* FALLTHROUGH */ 1072 1073 case USB_ST_SETUP: 1074 tr_setup: 1075 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 1076 usbd_transfer_submit(xfer); 1077 uether_rxflush(ue); 1078 return; 1079 1080 default: 1081 if (error != USB_ERR_CANCELLED) { 1082 smsc_warn_printf(sc, "bulk read error, %s\n", usbd_errstr(error)); 1083 usbd_xfer_set_stall(xfer); 1084 goto tr_setup; 1085 } 1086 return; 1087 } 1088 } 1089 1090 /** 1091 * smsc_bulk_write_callback - Write callback used to send ethernet frame(s) 1092 * @xfer: the USB transfer 1093 * @error: error code if the transfers is in an errored state 1094 * 1095 * The main write function that pulls ethernet frames off the queue and sends 1096 * them out. 1097 * 1098 * LOCKING: 1099 * 1100 */ 1101 static void 1102 smsc_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 1103 { 1104 struct smsc_softc *sc = usbd_xfer_softc(xfer); 1105 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1106 struct usb_page_cache *pc; 1107 struct mbuf *m; 1108 uint32_t txhdr; 1109 uint32_t frm_len = 0; 1110 int nframes; 1111 1112 switch (USB_GET_STATE(xfer)) { 1113 case USB_ST_TRANSFERRED: 1114 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1115 /* FALLTHROUGH */ 1116 1117 case USB_ST_SETUP: 1118 tr_setup: 1119 if ((sc->sc_flags & SMSC_FLAG_LINK) == 0 || 1120 (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) { 1121 /* Don't send anything if there is no link or controller is busy. */ 1122 return; 1123 } 1124 1125 for (nframes = 0; nframes < 16 && 1126 !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) { 1127 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1128 if (m == NULL) 1129 break; 1130 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, 1131 nframes); 1132 frm_len = 0; 1133 pc = usbd_xfer_get_frame(xfer, nframes); 1134 1135 /* Each frame is prefixed with two 32-bit values describing the 1136 * length of the packet and buffer. 1137 */ 1138 txhdr = SMSC_TX_CTRL_0_BUF_SIZE(m->m_pkthdr.len) | 1139 SMSC_TX_CTRL_0_FIRST_SEG | SMSC_TX_CTRL_0_LAST_SEG; 1140 txhdr = htole32(txhdr); 1141 usbd_copy_in(pc, 0, &txhdr, sizeof(txhdr)); 1142 1143 txhdr = SMSC_TX_CTRL_1_PKT_LENGTH(m->m_pkthdr.len); 1144 txhdr = htole32(txhdr); 1145 usbd_copy_in(pc, 4, &txhdr, sizeof(txhdr)); 1146 1147 frm_len += 8; 1148 1149 /* Next copy in the actual packet */ 1150 usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len); 1151 frm_len += m->m_pkthdr.len; 1152 1153 ifp->if_opackets++; 1154 1155 /* If there's a BPF listener, bounce a copy of this frame to him */ 1156 BPF_MTAP(ifp, m); 1157 1158 m_freem(m); 1159 1160 /* Set frame length. */ 1161 usbd_xfer_set_frame_len(xfer, nframes, frm_len); 1162 } 1163 if (nframes != 0) { 1164 usbd_xfer_set_frames(xfer, nframes); 1165 usbd_transfer_submit(xfer); 1166 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1167 } 1168 return; 1169 1170 default: 1171 ifp->if_oerrors++; 1172 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1173 1174 if (error != USB_ERR_CANCELLED) { 1175 smsc_err_printf(sc, "usb error on tx: %s\n", usbd_errstr(error)); 1176 usbd_xfer_set_stall(xfer); 1177 goto tr_setup; 1178 } 1179 return; 1180 } 1181 } 1182 1183 /** 1184 * smsc_tick - Called periodically to monitor the state of the LAN95xx chip 1185 * @ue: USB ether interface 1186 * 1187 * Simply calls the mii status functions to check the state of the link. 1188 * 1189 * LOCKING: 1190 * Should be called with the SMSC lock held. 1191 */ 1192 static void 1193 smsc_tick(struct usb_ether *ue) 1194 { 1195 struct smsc_softc *sc = uether_getsc(ue); 1196 struct mii_data *mii = uether_getmii(&sc->sc_ue); 1197 1198 SMSC_LOCK_ASSERT(sc, MA_OWNED); 1199 1200 mii_tick(mii); 1201 if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) { 1202 smsc_miibus_statchg(ue->ue_dev); 1203 if ((sc->sc_flags & SMSC_FLAG_LINK) != 0) 1204 smsc_start(ue); 1205 } 1206 } 1207 1208 /** 1209 * smsc_start - Starts communication with the LAN95xx chip 1210 * @ue: USB ether interface 1211 * 1212 * 1213 * 1214 */ 1215 static void 1216 smsc_start(struct usb_ether *ue) 1217 { 1218 struct smsc_softc *sc = uether_getsc(ue); 1219 1220 /* 1221 * start the USB transfers, if not already started: 1222 */ 1223 usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_RD]); 1224 usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_WR]); 1225 } 1226 1227 /** 1228 * smsc_stop - Stops communication with the LAN95xx chip 1229 * @ue: USB ether interface 1230 * 1231 * 1232 * 1233 */ 1234 static void 1235 smsc_stop(struct usb_ether *ue) 1236 { 1237 struct smsc_softc *sc = uether_getsc(ue); 1238 struct ifnet *ifp = uether_getifp(ue); 1239 1240 SMSC_LOCK_ASSERT(sc, MA_OWNED); 1241 1242 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1243 sc->sc_flags &= ~SMSC_FLAG_LINK; 1244 1245 /* 1246 * stop all the transfers, if not already stopped: 1247 */ 1248 usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_WR]); 1249 usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_RD]); 1250 } 1251 1252 /** 1253 * smsc_phy_init - Initialises the in-built SMSC phy 1254 * @sc: driver soft context 1255 * 1256 * Resets the PHY part of the chip and then initialises it to default 1257 * values. The 'link down' and 'auto-negotiation complete' interrupts 1258 * from the PHY are also enabled, however we don't monitor the interrupt 1259 * endpoints for the moment. 1260 * 1261 * RETURNS: 1262 * Returns 0 on success or EIO if failed to reset the PHY. 1263 */ 1264 static int 1265 smsc_phy_init(struct smsc_softc *sc) 1266 { 1267 int bmcr; 1268 usb_ticks_t start_ticks; 1269 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 1270 1271 SMSC_LOCK_ASSERT(sc, MA_OWNED); 1272 1273 /* Reset phy and wait for reset to complete */ 1274 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, BMCR_RESET); 1275 1276 start_ticks = ticks; 1277 do { 1278 uether_pause(&sc->sc_ue, hz / 100); 1279 bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 1280 } while ((bmcr & MII_BMCR) && ((ticks - start_ticks) < max_ticks)); 1281 1282 if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) { 1283 smsc_err_printf(sc, "PHY reset timed-out"); 1284 return (EIO); 1285 } 1286 1287 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR, 1288 ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD | /* all modes */ 1289 ANAR_CSMA | 1290 ANAR_FC | 1291 ANAR_PAUSE_ASYM); 1292 1293 /* Setup the phy to interrupt when the link goes down or autoneg completes */ 1294 smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_STAT); 1295 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_MASK, 1296 (SMSC_PHY_INTR_ANEG_COMP | SMSC_PHY_INTR_LINK_DOWN)); 1297 1298 /* Restart auto-negotation */ 1299 bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 1300 bmcr |= BMCR_STARTNEG; 1301 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr); 1302 1303 return (0); 1304 } 1305 1306 1307 /** 1308 * smsc_chip_init - Initialises the chip after power on 1309 * @sc: driver soft context 1310 * 1311 * This initialisation sequence is modelled on the procedure in the Linux 1312 * driver. 1313 * 1314 * RETURNS: 1315 * Returns 0 on success or an error code on failure. 1316 */ 1317 static int 1318 smsc_chip_init(struct smsc_softc *sc) 1319 { 1320 int err; 1321 int locked; 1322 uint32_t reg_val; 1323 int burst_cap; 1324 1325 locked = mtx_owned(&sc->sc_mtx); 1326 if (!locked) 1327 SMSC_LOCK(sc); 1328 1329 /* Enter H/W config mode */ 1330 smsc_write_reg(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST); 1331 1332 if ((err = smsc_wait_for_bits(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST)) != 0) { 1333 smsc_warn_printf(sc, "timed-out waiting for reset to complete\n"); 1334 goto init_failed; 1335 } 1336 1337 /* Reset the PHY */ 1338 smsc_write_reg(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST); 1339 1340 if ((err = smsc_wait_for_bits(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST) != 0)) { 1341 smsc_warn_printf(sc, "timed-out waiting for phy reset to complete\n"); 1342 goto init_failed; 1343 } 1344 1345 /* Set the mac address */ 1346 if ((err = smsc_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) { 1347 smsc_warn_printf(sc, "failed to set the MAC address\n"); 1348 goto init_failed; 1349 } 1350 1351 /* Don't know what the HW_CFG_BIR bit is, but following the reset sequence 1352 * as used in the Linux driver. 1353 */ 1354 if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) != 0) { 1355 smsc_warn_printf(sc, "failed to read HW_CFG: %d\n", err); 1356 goto init_failed; 1357 } 1358 reg_val |= SMSC_HW_CFG_BIR; 1359 smsc_write_reg(sc, SMSC_HW_CFG, reg_val); 1360 1361 /* There is a so called 'turbo mode' that the linux driver supports, it 1362 * seems to allow you to jam multiple frames per Rx transaction. By default 1363 * this driver supports that and therefore allows multiple frames per URB. 1364 * 1365 * The xfer buffer size needs to reflect this as well, therefore based on 1366 * the calculations in the Linux driver the RX bufsize is set to 18944, 1367 * bufsz = (16 * 1024 + 5 * 512) 1368 * 1369 * Burst capability is the number of URBs that can be in a burst of data/ 1370 * ethernet frames. 1371 */ 1372 if (usbd_get_speed(sc->sc_ue.ue_udev) == USB_SPEED_HIGH) 1373 burst_cap = 37; 1374 else 1375 burst_cap = 128; 1376 1377 smsc_write_reg(sc, SMSC_BURST_CAP, burst_cap); 1378 1379 /* Set the default bulk in delay (magic value from Linux driver) */ 1380 smsc_write_reg(sc, SMSC_BULK_IN_DLY, 0x00002000); 1381 1382 1383 1384 /* 1385 * Initialise the RX interface 1386 */ 1387 if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) < 0) { 1388 smsc_warn_printf(sc, "failed to read HW_CFG: (err = %d)\n", err); 1389 goto init_failed; 1390 } 1391 1392 /* Adjust the packet offset in the buffer (designed to try and align IP 1393 * header on 4 byte boundary) 1394 */ 1395 reg_val &= ~SMSC_HW_CFG_RXDOFF; 1396 reg_val |= (ETHER_ALIGN << 9) & SMSC_HW_CFG_RXDOFF; 1397 1398 /* The following setings are used for 'turbo mode', a.k.a multiple frames 1399 * per Rx transaction (again info taken form Linux driver). 1400 */ 1401 reg_val |= (SMSC_HW_CFG_MEF | SMSC_HW_CFG_BCE); 1402 1403 smsc_write_reg(sc, SMSC_HW_CFG, reg_val); 1404 1405 /* Clear the status register ? */ 1406 smsc_write_reg(sc, SMSC_INTR_STATUS, 0xffffffff); 1407 1408 /* Read and display the revision register */ 1409 if ((err = smsc_read_reg(sc, SMSC_ID_REV, &sc->sc_rev_id)) < 0) { 1410 smsc_warn_printf(sc, "failed to read ID_REV (err = %d)\n", err); 1411 goto init_failed; 1412 } 1413 1414 device_printf(sc->sc_ue.ue_dev, "chip 0x%04lx, rev. %04lx\n", 1415 (sc->sc_rev_id & SMSC_ID_REV_CHIP_ID_MASK) >> 16, 1416 (sc->sc_rev_id & SMSC_ID_REV_CHIP_REV_MASK)); 1417 1418 /* GPIO/LED setup */ 1419 reg_val = SMSC_LED_GPIO_CFG_SPD_LED | SMSC_LED_GPIO_CFG_LNK_LED | 1420 SMSC_LED_GPIO_CFG_FDX_LED; 1421 smsc_write_reg(sc, SMSC_LED_GPIO_CFG, reg_val); 1422 1423 /* 1424 * Initialise the TX interface 1425 */ 1426 smsc_write_reg(sc, SMSC_FLOW, 0); 1427 1428 smsc_write_reg(sc, SMSC_AFC_CFG, AFC_CFG_DEFAULT); 1429 1430 /* Read the current MAC configuration */ 1431 if ((err = smsc_read_reg(sc, SMSC_MAC_CSR, &sc->sc_mac_csr)) < 0) { 1432 smsc_warn_printf(sc, "failed to read MAC_CSR (err=%d)\n", err); 1433 goto init_failed; 1434 } 1435 1436 /* Vlan */ 1437 smsc_write_reg(sc, SMSC_VLAN1, (uint32_t)ETHERTYPE_VLAN); 1438 1439 /* 1440 * Initialise the PHY 1441 */ 1442 if ((err = smsc_phy_init(sc)) != 0) 1443 goto init_failed; 1444 1445 1446 /* 1447 * Start TX 1448 */ 1449 sc->sc_mac_csr |= SMSC_MAC_CSR_TXEN; 1450 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 1451 smsc_write_reg(sc, SMSC_TX_CFG, SMSC_TX_CFG_ON); 1452 1453 /* 1454 * Start RX 1455 */ 1456 sc->sc_mac_csr |= SMSC_MAC_CSR_RXEN; 1457 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 1458 1459 if (!locked) 1460 SMSC_UNLOCK(sc); 1461 1462 return (0); 1463 1464 init_failed: 1465 if (!locked) 1466 SMSC_UNLOCK(sc); 1467 1468 smsc_err_printf(sc, "smsc_chip_init failed (err=%d)\n", err); 1469 return (err); 1470 } 1471 1472 1473 /** 1474 * smsc_ioctl - ioctl function for the device 1475 * @ifp: interface pointer 1476 * @cmd: the ioctl command 1477 * @data: data passed in the ioctl call, typically a pointer to struct ifreq. 1478 * 1479 * The ioctl routine is overridden to detect change requests for the H/W 1480 * checksum capabilities. 1481 * 1482 * RETURNS: 1483 * 0 on success and an error code on failure. 1484 */ 1485 static int 1486 smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1487 { 1488 struct usb_ether *ue = ifp->if_softc; 1489 struct smsc_softc *sc; 1490 struct ifreq *ifr; 1491 int rc; 1492 int mask; 1493 int reinit; 1494 1495 if (cmd == SIOCSIFCAP) { 1496 1497 sc = uether_getsc(ue); 1498 ifr = (struct ifreq *)data; 1499 1500 SMSC_LOCK(sc); 1501 1502 rc = 0; 1503 reinit = 0; 1504 1505 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1506 1507 /* Modify the RX CSUM enable bits */ 1508 if ((mask & IFCAP_RXCSUM) != 0 && 1509 (ifp->if_capabilities & IFCAP_RXCSUM) != 0) { 1510 ifp->if_capenable ^= IFCAP_RXCSUM; 1511 1512 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1513 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1514 reinit = 1; 1515 } 1516 } 1517 1518 SMSC_UNLOCK(sc); 1519 if (reinit) 1520 #if __FreeBSD_version > 1000000 1521 uether_init(ue); 1522 #else 1523 ifp->if_init(ue); 1524 #endif 1525 1526 } else { 1527 rc = uether_ioctl(ifp, cmd, data); 1528 } 1529 1530 return (rc); 1531 } 1532 1533 #ifdef FDT 1534 /** 1535 * Get MAC address from FDT blob. Firmware or loader should fill 1536 * mac-address or local-mac-address property Returns 0 if MAC address 1537 * obtained, error code otherwise 1538 */ 1539 static int 1540 smsc_fdt_find_mac(unsigned char *mac) 1541 { 1542 phandle_t child, parent, root; 1543 int len; 1544 1545 root = OF_finddevice("/"); 1546 len = 0; 1547 parent = root; 1548 1549 /* Traverse through entire tree to find nodes usb ethernet nodes */ 1550 for (child = OF_child(parent); child != 0; child = OF_peer(child)) { 1551 1552 /* Find a 'leaf'. Start the search from this node. */ 1553 while (OF_child(child)) { 1554 parent = child; 1555 child = OF_child(child); 1556 } 1557 1558 if (fdt_is_compatible(child, "net,ethernet") && 1559 fdt_is_compatible(child, "usb,device")) { 1560 1561 /* Check if there is property */ 1562 if ((len = OF_getproplen(child, "local-mac-address")) > 0) { 1563 if (len != ETHER_ADDR_LEN) 1564 return (EINVAL); 1565 1566 OF_getprop(child, "local-mac-address", mac, 1567 ETHER_ADDR_LEN); 1568 return (0); 1569 } 1570 1571 if ((len = OF_getproplen(child, "mac-address")) > 0) { 1572 if (len != ETHER_ADDR_LEN) 1573 return (EINVAL); 1574 1575 OF_getprop(child, "mac-address", mac, 1576 ETHER_ADDR_LEN); 1577 return (0); 1578 } 1579 } 1580 1581 if (OF_peer(child) == 0) { 1582 /* No more siblings. */ 1583 child = parent; 1584 parent = OF_parent(child); 1585 } 1586 } 1587 1588 return (ENXIO); 1589 } 1590 #endif 1591 1592 /** 1593 * smsc_attach_post - Called after the driver attached to the USB interface 1594 * @ue: the USB ethernet device 1595 * 1596 * This is where the chip is intialised for the first time. This is different 1597 * from the smsc_init() function in that that one is designed to setup the 1598 * H/W to match the UE settings and can be called after a reset. 1599 * 1600 * 1601 */ 1602 static void 1603 smsc_attach_post(struct usb_ether *ue) 1604 { 1605 struct smsc_softc *sc = uether_getsc(ue); 1606 uint32_t mac_h, mac_l; 1607 int err; 1608 1609 smsc_dbg_printf(sc, "smsc_attach_post\n"); 1610 1611 /* Setup some of the basics */ 1612 sc->sc_phyno = 1; 1613 1614 1615 /* Attempt to get the mac address, if an EEPROM is not attached this 1616 * will just return FF:FF:FF:FF:FF:FF, so in such cases we invent a MAC 1617 * address based on urandom. 1618 */ 1619 memset(sc->sc_ue.ue_eaddr, 0xff, ETHER_ADDR_LEN); 1620 1621 /* Check if there is already a MAC address in the register */ 1622 if ((smsc_read_reg(sc, SMSC_MAC_ADDRL, &mac_l) == 0) && 1623 (smsc_read_reg(sc, SMSC_MAC_ADDRH, &mac_h) == 0)) { 1624 sc->sc_ue.ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff); 1625 sc->sc_ue.ue_eaddr[4] = (uint8_t)((mac_h) & 0xff); 1626 sc->sc_ue.ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff); 1627 sc->sc_ue.ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff); 1628 sc->sc_ue.ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff); 1629 sc->sc_ue.ue_eaddr[0] = (uint8_t)((mac_l) & 0xff); 1630 } 1631 1632 /* MAC address is not set so try to read from EEPROM, if that fails generate 1633 * a random MAC address. 1634 */ 1635 if (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr)) { 1636 1637 err = smsc_eeprom_read(sc, 0x01, sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN); 1638 #ifdef FDT 1639 if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr))) 1640 err = smsc_fdt_find_mac(sc->sc_ue.ue_eaddr); 1641 #endif 1642 if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr))) { 1643 read_random(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN); 1644 sc->sc_ue.ue_eaddr[0] &= ~0x01; /* unicast */ 1645 sc->sc_ue.ue_eaddr[0] |= 0x02; /* locally administered */ 1646 } 1647 } 1648 1649 /* Initialise the chip for the first time */ 1650 smsc_chip_init(sc); 1651 } 1652 1653 1654 /** 1655 * smsc_attach_post_sub - Called after the driver attached to the USB interface 1656 * @ue: the USB ethernet device 1657 * 1658 * Most of this is boilerplate code and copied from the base USB ethernet 1659 * driver. It has been overriden so that we can indicate to the system that 1660 * the chip supports H/W checksumming. 1661 * 1662 * RETURNS: 1663 * Returns 0 on success or a negative error code. 1664 */ 1665 #if __FreeBSD_version > 1000000 1666 static int 1667 smsc_attach_post_sub(struct usb_ether *ue) 1668 { 1669 struct smsc_softc *sc; 1670 struct ifnet *ifp; 1671 int error; 1672 1673 sc = uether_getsc(ue); 1674 ifp = ue->ue_ifp; 1675 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1676 ifp->if_start = uether_start; 1677 ifp->if_ioctl = smsc_ioctl; 1678 ifp->if_init = uether_init; 1679 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 1680 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 1681 IFQ_SET_READY(&ifp->if_snd); 1682 1683 /* The chip supports TCP/UDP checksum offloading on TX and RX paths, however 1684 * currently only RX checksum is supported in the driver (see top of file). 1685 */ 1686 ifp->if_capabilities |= IFCAP_RXCSUM; 1687 ifp->if_hwassist = 0; 1688 1689 /* TX checksuming is disabled (for now?) 1690 ifp->if_capabilities |= IFCAP_TXCSUM; 1691 ifp->if_capenable |= IFCAP_TXCSUM; 1692 ifp->if_hwassist = CSUM_TCP | CSUM_UDP; 1693 */ 1694 1695 ifp->if_capenable = ifp->if_capabilities; 1696 1697 mtx_lock(&Giant); 1698 error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, 1699 uether_ifmedia_upd, ue->ue_methods->ue_mii_sts, 1700 BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0); 1701 mtx_unlock(&Giant); 1702 1703 return (error); 1704 } 1705 #endif /* __FreeBSD_version > 1000000 */ 1706 1707 1708 /** 1709 * smsc_probe - Probe the interface. 1710 * @dev: smsc device handle 1711 * 1712 * Checks if the device is a match for this driver. 1713 * 1714 * RETURNS: 1715 * Returns 0 on success or an error code on failure. 1716 */ 1717 static int 1718 smsc_probe(device_t dev) 1719 { 1720 struct usb_attach_arg *uaa = device_get_ivars(dev); 1721 1722 if (uaa->usb_mode != USB_MODE_HOST) 1723 return (ENXIO); 1724 if (uaa->info.bConfigIndex != SMSC_CONFIG_INDEX) 1725 return (ENXIO); 1726 if (uaa->info.bIfaceIndex != SMSC_IFACE_IDX) 1727 return (ENXIO); 1728 1729 return (usbd_lookup_id_by_uaa(smsc_devs, sizeof(smsc_devs), uaa)); 1730 } 1731 1732 1733 /** 1734 * smsc_attach - Attach the interface. 1735 * @dev: smsc device handle 1736 * 1737 * Allocate softc structures, do ifmedia setup and ethernet/BPF attach. 1738 * 1739 * RETURNS: 1740 * Returns 0 on success or a negative error code. 1741 */ 1742 static int 1743 smsc_attach(device_t dev) 1744 { 1745 struct usb_attach_arg *uaa = device_get_ivars(dev); 1746 struct smsc_softc *sc = device_get_softc(dev); 1747 struct usb_ether *ue = &sc->sc_ue; 1748 uint8_t iface_index; 1749 int err; 1750 1751 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 1752 1753 device_set_usb_desc(dev); 1754 1755 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 1756 1757 /* Setup the endpoints for the SMSC LAN95xx device(s) */ 1758 iface_index = SMSC_IFACE_IDX; 1759 err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 1760 smsc_config, SMSC_N_TRANSFER, sc, &sc->sc_mtx); 1761 if (err) { 1762 device_printf(dev, "error: allocating USB transfers failed\n"); 1763 goto detach; 1764 } 1765 1766 ue->ue_sc = sc; 1767 ue->ue_dev = dev; 1768 ue->ue_udev = uaa->device; 1769 ue->ue_mtx = &sc->sc_mtx; 1770 ue->ue_methods = &smsc_ue_methods; 1771 1772 err = uether_ifattach(ue); 1773 if (err) { 1774 device_printf(dev, "error: could not attach interface\n"); 1775 goto detach; 1776 } 1777 return (0); /* success */ 1778 1779 detach: 1780 smsc_detach(dev); 1781 return (ENXIO); /* failure */ 1782 } 1783 1784 /** 1785 * smsc_detach - Detach the interface. 1786 * @dev: smsc device handle 1787 * 1788 * RETURNS: 1789 * Returns 0. 1790 */ 1791 static int 1792 smsc_detach(device_t dev) 1793 { 1794 struct smsc_softc *sc = device_get_softc(dev); 1795 struct usb_ether *ue = &sc->sc_ue; 1796 1797 usbd_transfer_unsetup(sc->sc_xfer, SMSC_N_TRANSFER); 1798 uether_ifdetach(ue); 1799 mtx_destroy(&sc->sc_mtx); 1800 1801 return (0); 1802 } 1803 1804 static device_method_t smsc_methods[] = { 1805 /* Device interface */ 1806 DEVMETHOD(device_probe, smsc_probe), 1807 DEVMETHOD(device_attach, smsc_attach), 1808 DEVMETHOD(device_detach, smsc_detach), 1809 1810 /* bus interface */ 1811 DEVMETHOD(bus_print_child, bus_generic_print_child), 1812 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 1813 1814 /* MII interface */ 1815 DEVMETHOD(miibus_readreg, smsc_miibus_readreg), 1816 DEVMETHOD(miibus_writereg, smsc_miibus_writereg), 1817 DEVMETHOD(miibus_statchg, smsc_miibus_statchg), 1818 1819 DEVMETHOD_END 1820 }; 1821 1822 static driver_t smsc_driver = { 1823 .name = "smsc", 1824 .methods = smsc_methods, 1825 .size = sizeof(struct smsc_softc), 1826 }; 1827 1828 static devclass_t smsc_devclass; 1829 1830 DRIVER_MODULE(smsc, uhub, smsc_driver, smsc_devclass, NULL, 0); 1831 DRIVER_MODULE(miibus, smsc, miibus_driver, miibus_devclass, 0, 0); 1832 MODULE_DEPEND(smsc, uether, 1, 1, 1); 1833 MODULE_DEPEND(smsc, usb, 1, 1, 1); 1834 MODULE_DEPEND(smsc, ether, 1, 1, 1); 1835 MODULE_DEPEND(smsc, miibus, 1, 1, 1); 1836 MODULE_VERSION(smsc, 1); 1837