xref: /freebsd/sys/dev/vt/hw/vga/vt_vga.c (revision fdafd315)
1a401c53aSAleksandr Rybalko /*-
2a401c53aSAleksandr Rybalko  * Copyright (c) 2005 Marcel Moolenaar
3a401c53aSAleksandr Rybalko  * All rights reserved.
4a401c53aSAleksandr Rybalko  *
5a401c53aSAleksandr Rybalko  * Copyright (c) 2009 The FreeBSD Foundation
6a401c53aSAleksandr Rybalko  * All rights reserved.
7a401c53aSAleksandr Rybalko  *
8a401c53aSAleksandr Rybalko  * Portions of this software were developed by Ed Schouten
9a401c53aSAleksandr Rybalko  * under sponsorship from the FreeBSD Foundation.
10a401c53aSAleksandr Rybalko  *
11a401c53aSAleksandr Rybalko  * Redistribution and use in source and binary forms, with or without
12a401c53aSAleksandr Rybalko  * modification, are permitted provided that the following conditions
13a401c53aSAleksandr Rybalko  * are met:
14a401c53aSAleksandr Rybalko  * 1. Redistributions of source code must retain the above copyright
15a401c53aSAleksandr Rybalko  *    notice, this list of conditions and the following disclaimer.
16a401c53aSAleksandr Rybalko  * 2. Redistributions in binary form must reproduce the above copyright
17a401c53aSAleksandr Rybalko  *    notice, this list of conditions and the following disclaimer in the
18a401c53aSAleksandr Rybalko  *    documentation and/or other materials provided with the distribution.
19a401c53aSAleksandr Rybalko  *
20a401c53aSAleksandr Rybalko  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21a401c53aSAleksandr Rybalko  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22a401c53aSAleksandr Rybalko  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23a401c53aSAleksandr Rybalko  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24a401c53aSAleksandr Rybalko  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25a401c53aSAleksandr Rybalko  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26a401c53aSAleksandr Rybalko  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27a401c53aSAleksandr Rybalko  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28a401c53aSAleksandr Rybalko  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29a401c53aSAleksandr Rybalko  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30a401c53aSAleksandr Rybalko  * SUCH DAMAGE.
31a401c53aSAleksandr Rybalko  */
32a401c53aSAleksandr Rybalko 
33c2272faaSRoger Pau Monné #include "opt_acpi.h"
34c2272faaSRoger Pau Monné 
35a401c53aSAleksandr Rybalko #include <sys/param.h>
36a401c53aSAleksandr Rybalko #include <sys/kernel.h>
37a401c53aSAleksandr Rybalko #include <sys/systm.h>
38acb332a8SRoger Pau Monné #include <sys/bus.h>
39acb332a8SRoger Pau Monné #include <sys/module.h>
40acb332a8SRoger Pau Monné #include <sys/rman.h>
41a401c53aSAleksandr Rybalko 
42a401c53aSAleksandr Rybalko #include <dev/vt/vt.h>
435e251aecSJean-Sébastien Pédron #include <dev/vt/colors/vt_termcolors.h>
44a401c53aSAleksandr Rybalko #include <dev/vt/hw/vga/vt_vga_reg.h>
4576e2f976SJean-Sébastien Pédron #include <dev/pci/pcivar.h>
46a401c53aSAleksandr Rybalko 
47a401c53aSAleksandr Rybalko #include <machine/bus.h>
487705dd4dSKonstantin Belousov #if defined(__amd64__) || defined(__i386__)
4928ebccd5SKonstantin Belousov #include <contrib/dev/acpica/include/acpi.h>
507705dd4dSKonstantin Belousov #include <machine/md_var.h>
51c2272faaSRoger Pau Monné #endif
52c2272faaSRoger Pau Monné 
53a401c53aSAleksandr Rybalko struct vga_softc {
54a401c53aSAleksandr Rybalko 	bus_space_tag_t		 vga_fb_tag;
55a401c53aSAleksandr Rybalko 	bus_space_handle_t	 vga_fb_handle;
56a401c53aSAleksandr Rybalko 	bus_space_tag_t		 vga_reg_tag;
57a401c53aSAleksandr Rybalko 	bus_space_handle_t	 vga_reg_handle;
58af9f67eaSJean-Sébastien Pédron 	int			 vga_wmode;
59bdcaf97cSJean-Sébastien Pédron 	term_color_t		 vga_curfg, vga_curbg;
60acb332a8SRoger Pau Monné 	boolean_t		 vga_enabled;
61a401c53aSAleksandr Rybalko };
62a401c53aSAleksandr Rybalko 
63a401c53aSAleksandr Rybalko /* Convenience macros. */
64a401c53aSAleksandr Rybalko #define	MEM_READ1(sc, ofs) \
65a401c53aSAleksandr Rybalko 	bus_space_read_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs)
66a401c53aSAleksandr Rybalko #define	MEM_WRITE1(sc, ofs, val) \
67a401c53aSAleksandr Rybalko 	bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val)
680b4d5eb8SColin Percival #define	MEM_WRITE2(sc, ofs, val) \
690b4d5eb8SColin Percival 	bus_space_write_2(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val)
70a401c53aSAleksandr Rybalko #define	REG_READ1(sc, reg) \
71a401c53aSAleksandr Rybalko 	bus_space_read_1(sc->vga_reg_tag, sc->vga_reg_handle, reg)
72a401c53aSAleksandr Rybalko #define	REG_WRITE1(sc, reg, val) \
73a401c53aSAleksandr Rybalko 	bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val)
74a401c53aSAleksandr Rybalko 
75a401c53aSAleksandr Rybalko #define	VT_VGA_WIDTH	640
76a401c53aSAleksandr Rybalko #define	VT_VGA_HEIGHT	480
77a401c53aSAleksandr Rybalko #define	VT_VGA_MEMSIZE	(VT_VGA_WIDTH * VT_VGA_HEIGHT / 8)
78a401c53aSAleksandr Rybalko 
79bdcaf97cSJean-Sébastien Pédron /*
80bdcaf97cSJean-Sébastien Pédron  * VGA is designed to handle 8 pixels at a time (8 pixels in one byte of
81bdcaf97cSJean-Sébastien Pédron  * memory).
82bdcaf97cSJean-Sébastien Pédron  */
83bdcaf97cSJean-Sébastien Pédron #define	VT_VGA_PIXELS_BLOCK	8
84bdcaf97cSJean-Sébastien Pédron 
85bdcaf97cSJean-Sébastien Pédron /*
86bdcaf97cSJean-Sébastien Pédron  * We use an off-screen addresses to:
87bdcaf97cSJean-Sébastien Pédron  *     o  store the background color;
88bdcaf97cSJean-Sébastien Pédron  *     o  store pixels pattern.
89bdcaf97cSJean-Sébastien Pédron  * Those addresses are then loaded in the latches once.
90bdcaf97cSJean-Sébastien Pédron  */
91bdcaf97cSJean-Sébastien Pédron #define	VT_VGA_BGCOLOR_OFFSET	VT_VGA_MEMSIZE
92bdcaf97cSJean-Sébastien Pédron 
93a401c53aSAleksandr Rybalko static vd_probe_t	vga_probe;
94a401c53aSAleksandr Rybalko static vd_init_t	vga_init;
95a401c53aSAleksandr Rybalko static vd_blank_t	vga_blank;
96bdcaf97cSJean-Sébastien Pédron static vd_bitblt_text_t	vga_bitblt_text;
97ee97b233SColin Percival static vd_invalidate_text_t	vga_invalidate_text;
98631bb572SJean-Sébastien Pédron static vd_bitblt_bmp_t	vga_bitblt_bitmap;
99a401c53aSAleksandr Rybalko static vd_drawrect_t	vga_drawrect;
100a401c53aSAleksandr Rybalko static vd_setpixel_t	vga_setpixel;
101a401c53aSAleksandr Rybalko static vd_postswitch_t	vga_postswitch;
102a401c53aSAleksandr Rybalko 
103a401c53aSAleksandr Rybalko static const struct vt_driver vt_vga_driver = {
104a401c53aSAleksandr Rybalko 	.vd_name	= "vga",
105a401c53aSAleksandr Rybalko 	.vd_probe	= vga_probe,
106a401c53aSAleksandr Rybalko 	.vd_init	= vga_init,
107a401c53aSAleksandr Rybalko 	.vd_blank	= vga_blank,
108bdcaf97cSJean-Sébastien Pédron 	.vd_bitblt_text	= vga_bitblt_text,
109ee97b233SColin Percival 	.vd_invalidate_text = vga_invalidate_text,
110631bb572SJean-Sébastien Pédron 	.vd_bitblt_bmp	= vga_bitblt_bitmap,
111a401c53aSAleksandr Rybalko 	.vd_drawrect	= vga_drawrect,
112a401c53aSAleksandr Rybalko 	.vd_setpixel	= vga_setpixel,
113a401c53aSAleksandr Rybalko 	.vd_postswitch	= vga_postswitch,
114a401c53aSAleksandr Rybalko 	.vd_priority	= VD_PRIORITY_GENERIC,
115a401c53aSAleksandr Rybalko };
116a401c53aSAleksandr Rybalko 
117a401c53aSAleksandr Rybalko /*
118a401c53aSAleksandr Rybalko  * Driver supports both text mode and graphics mode.  Make sure the
119a401c53aSAleksandr Rybalko  * buffer is always big enough to support both.
120a401c53aSAleksandr Rybalko  */
121a401c53aSAleksandr Rybalko static struct vga_softc vga_conssoftc;
122a401c53aSAleksandr Rybalko VT_DRIVER_DECLARE(vt_vga, vt_vga_driver);
123a401c53aSAleksandr Rybalko 
124a401c53aSAleksandr Rybalko static inline void
vga_setwmode(struct vt_device * vd,int wmode)125af9f67eaSJean-Sébastien Pédron vga_setwmode(struct vt_device *vd, int wmode)
126af9f67eaSJean-Sébastien Pédron {
127af9f67eaSJean-Sébastien Pédron 	struct vga_softc *sc = vd->vd_softc;
128af9f67eaSJean-Sébastien Pédron 
129af9f67eaSJean-Sébastien Pédron 	if (sc->vga_wmode == wmode)
130af9f67eaSJean-Sébastien Pédron 		return;
131af9f67eaSJean-Sébastien Pédron 
132af9f67eaSJean-Sébastien Pédron 	REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE);
133af9f67eaSJean-Sébastien Pédron 	REG_WRITE1(sc, VGA_GC_DATA, wmode);
134af9f67eaSJean-Sébastien Pédron 	sc->vga_wmode = wmode;
135af9f67eaSJean-Sébastien Pédron 
136af9f67eaSJean-Sébastien Pédron 	switch (wmode) {
137af9f67eaSJean-Sébastien Pédron 	case 3:
138731a929aSEd Maste 		/* Re-enable all planes. */
139af9f67eaSJean-Sébastien Pédron 		REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK);
140af9f67eaSJean-Sébastien Pédron 		REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 |
141af9f67eaSJean-Sébastien Pédron 		    VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0);
142af9f67eaSJean-Sébastien Pédron 		break;
143af9f67eaSJean-Sébastien Pédron 	}
144af9f67eaSJean-Sébastien Pédron }
145af9f67eaSJean-Sébastien Pédron 
146af9f67eaSJean-Sébastien Pédron static inline void
vga_setfg(struct vt_device * vd,term_color_t color)147bdcaf97cSJean-Sébastien Pédron vga_setfg(struct vt_device *vd, term_color_t color)
148a401c53aSAleksandr Rybalko {
149a401c53aSAleksandr Rybalko 	struct vga_softc *sc = vd->vd_softc;
150a401c53aSAleksandr Rybalko 
151af9f67eaSJean-Sébastien Pédron 	vga_setwmode(vd, 3);
152af9f67eaSJean-Sébastien Pédron 
153af9f67eaSJean-Sébastien Pédron 	if (sc->vga_curfg == color)
154af9f67eaSJean-Sébastien Pédron 		return;
155af9f67eaSJean-Sébastien Pédron 
156a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET);
1575e251aecSJean-Sébastien Pédron 	REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]);
158bdcaf97cSJean-Sébastien Pédron 	sc->vga_curfg = color;
159a401c53aSAleksandr Rybalko }
160a401c53aSAleksandr Rybalko 
161a401c53aSAleksandr Rybalko static inline void
vga_setbg(struct vt_device * vd,term_color_t color)162bdcaf97cSJean-Sébastien Pédron vga_setbg(struct vt_device *vd, term_color_t color)
163a401c53aSAleksandr Rybalko {
164a401c53aSAleksandr Rybalko 	struct vga_softc *sc = vd->vd_softc;
165a401c53aSAleksandr Rybalko 
166af9f67eaSJean-Sébastien Pédron 	vga_setwmode(vd, 3);
167af9f67eaSJean-Sébastien Pédron 
168af9f67eaSJean-Sébastien Pédron 	if (sc->vga_curbg == color)
169af9f67eaSJean-Sébastien Pédron 		return;
170af9f67eaSJean-Sébastien Pédron 
171bdcaf97cSJean-Sébastien Pédron 	REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET);
1725e251aecSJean-Sébastien Pédron 	REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]);
173a401c53aSAleksandr Rybalko 
17434cb8c9fSAleksandr Rybalko 	/*
175af9f67eaSJean-Sébastien Pédron 	 * Write 8 pixels using the background color to an off-screen
176af9f67eaSJean-Sébastien Pédron 	 * byte in the video memory.
17734cb8c9fSAleksandr Rybalko 	 */
178bdcaf97cSJean-Sébastien Pédron 	MEM_WRITE1(sc, VT_VGA_BGCOLOR_OFFSET, 0xff);
17934cb8c9fSAleksandr Rybalko 
18034cb8c9fSAleksandr Rybalko 	/*
181af9f67eaSJean-Sébastien Pédron 	 * Read those 8 pixels back to load the background color in the
182af9f67eaSJean-Sébastien Pédron 	 * latches register.
18334cb8c9fSAleksandr Rybalko 	 */
184bdcaf97cSJean-Sébastien Pédron 	MEM_READ1(sc, VT_VGA_BGCOLOR_OFFSET);
18534cb8c9fSAleksandr Rybalko 
186bdcaf97cSJean-Sébastien Pédron 	sc->vga_curbg = color;
18734cb8c9fSAleksandr Rybalko 
188bdcaf97cSJean-Sébastien Pédron 	/*
189af9f67eaSJean-Sébastien Pédron          * The Set/Reset register doesn't contain the fg color anymore,
190af9f67eaSJean-Sébastien Pédron          * store an invalid color.
191bdcaf97cSJean-Sébastien Pédron 	 */
192bdcaf97cSJean-Sébastien Pédron 	sc->vga_curfg = 0xff;
193a401c53aSAleksandr Rybalko }
194a401c53aSAleksandr Rybalko 
195a401c53aSAleksandr Rybalko /*
196a401c53aSAleksandr Rybalko  * Binary searchable table for Unicode to CP437 conversion.
197a401c53aSAleksandr Rybalko  */
198a401c53aSAleksandr Rybalko 
199a401c53aSAleksandr Rybalko struct unicp437 {
200a401c53aSAleksandr Rybalko 	uint16_t	unicode_base;
201a401c53aSAleksandr Rybalko 	uint8_t		cp437_base;
202a401c53aSAleksandr Rybalko 	uint8_t		length;
203a401c53aSAleksandr Rybalko };
204a401c53aSAleksandr Rybalko 
205a401c53aSAleksandr Rybalko static const struct unicp437 cp437table[] = {
206a401c53aSAleksandr Rybalko 	{ 0x0020, 0x20, 0x5e }, { 0x00a0, 0x20, 0x00 },
207a401c53aSAleksandr Rybalko 	{ 0x00a1, 0xad, 0x00 }, { 0x00a2, 0x9b, 0x00 },
208a401c53aSAleksandr Rybalko 	{ 0x00a3, 0x9c, 0x00 }, { 0x00a5, 0x9d, 0x00 },
209649d7b46SEd Maste 	{ 0x00a6, 0x7c, 0x00 },
210a401c53aSAleksandr Rybalko 	{ 0x00a7, 0x15, 0x00 }, { 0x00aa, 0xa6, 0x00 },
211a401c53aSAleksandr Rybalko 	{ 0x00ab, 0xae, 0x00 }, { 0x00ac, 0xaa, 0x00 },
212a401c53aSAleksandr Rybalko 	{ 0x00b0, 0xf8, 0x00 }, { 0x00b1, 0xf1, 0x00 },
213a401c53aSAleksandr Rybalko 	{ 0x00b2, 0xfd, 0x00 }, { 0x00b5, 0xe6, 0x00 },
214a401c53aSAleksandr Rybalko 	{ 0x00b6, 0x14, 0x00 }, { 0x00b7, 0xfa, 0x00 },
215a401c53aSAleksandr Rybalko 	{ 0x00ba, 0xa7, 0x00 }, { 0x00bb, 0xaf, 0x00 },
216a401c53aSAleksandr Rybalko 	{ 0x00bc, 0xac, 0x00 }, { 0x00bd, 0xab, 0x00 },
217a401c53aSAleksandr Rybalko 	{ 0x00bf, 0xa8, 0x00 }, { 0x00c4, 0x8e, 0x01 },
218a401c53aSAleksandr Rybalko 	{ 0x00c6, 0x92, 0x00 }, { 0x00c7, 0x80, 0x00 },
219a401c53aSAleksandr Rybalko 	{ 0x00c9, 0x90, 0x00 }, { 0x00d1, 0xa5, 0x00 },
220a401c53aSAleksandr Rybalko 	{ 0x00d6, 0x99, 0x00 }, { 0x00dc, 0x9a, 0x00 },
221a401c53aSAleksandr Rybalko 	{ 0x00df, 0xe1, 0x00 }, { 0x00e0, 0x85, 0x00 },
222a401c53aSAleksandr Rybalko 	{ 0x00e1, 0xa0, 0x00 }, { 0x00e2, 0x83, 0x00 },
223a401c53aSAleksandr Rybalko 	{ 0x00e4, 0x84, 0x00 }, { 0x00e5, 0x86, 0x00 },
224a401c53aSAleksandr Rybalko 	{ 0x00e6, 0x91, 0x00 }, { 0x00e7, 0x87, 0x00 },
225a401c53aSAleksandr Rybalko 	{ 0x00e8, 0x8a, 0x00 }, { 0x00e9, 0x82, 0x00 },
226a401c53aSAleksandr Rybalko 	{ 0x00ea, 0x88, 0x01 }, { 0x00ec, 0x8d, 0x00 },
227a401c53aSAleksandr Rybalko 	{ 0x00ed, 0xa1, 0x00 }, { 0x00ee, 0x8c, 0x00 },
228a401c53aSAleksandr Rybalko 	{ 0x00ef, 0x8b, 0x00 }, { 0x00f0, 0xeb, 0x00 },
229a401c53aSAleksandr Rybalko 	{ 0x00f1, 0xa4, 0x00 }, { 0x00f2, 0x95, 0x00 },
230a401c53aSAleksandr Rybalko 	{ 0x00f3, 0xa2, 0x00 }, { 0x00f4, 0x93, 0x00 },
231a401c53aSAleksandr Rybalko 	{ 0x00f6, 0x94, 0x00 }, { 0x00f7, 0xf6, 0x00 },
232a401c53aSAleksandr Rybalko 	{ 0x00f8, 0xed, 0x00 }, { 0x00f9, 0x97, 0x00 },
233a401c53aSAleksandr Rybalko 	{ 0x00fa, 0xa3, 0x00 }, { 0x00fb, 0x96, 0x00 },
234a401c53aSAleksandr Rybalko 	{ 0x00fc, 0x81, 0x00 }, { 0x00ff, 0x98, 0x00 },
235a401c53aSAleksandr Rybalko 	{ 0x0192, 0x9f, 0x00 }, { 0x0393, 0xe2, 0x00 },
236a401c53aSAleksandr Rybalko 	{ 0x0398, 0xe9, 0x00 }, { 0x03a3, 0xe4, 0x00 },
237a401c53aSAleksandr Rybalko 	{ 0x03a6, 0xe8, 0x00 }, { 0x03a9, 0xea, 0x00 },
238a401c53aSAleksandr Rybalko 	{ 0x03b1, 0xe0, 0x01 }, { 0x03b4, 0xeb, 0x00 },
239a401c53aSAleksandr Rybalko 	{ 0x03b5, 0xee, 0x00 }, { 0x03bc, 0xe6, 0x00 },
240a401c53aSAleksandr Rybalko 	{ 0x03c0, 0xe3, 0x00 }, { 0x03c3, 0xe5, 0x00 },
241a401c53aSAleksandr Rybalko 	{ 0x03c4, 0xe7, 0x00 }, { 0x03c6, 0xed, 0x00 },
242a401c53aSAleksandr Rybalko 	{ 0x03d5, 0xed, 0x00 }, { 0x2010, 0x2d, 0x00 },
243185aba2dSEd Maste 	{ 0x2013, 0x2d, 0x00 },
244a401c53aSAleksandr Rybalko 	{ 0x2014, 0x2d, 0x00 }, { 0x2018, 0x60, 0x00 },
245a401c53aSAleksandr Rybalko 	{ 0x2019, 0x27, 0x00 }, { 0x201c, 0x22, 0x00 },
246a401c53aSAleksandr Rybalko 	{ 0x201d, 0x22, 0x00 }, { 0x2022, 0x07, 0x00 },
247a401c53aSAleksandr Rybalko 	{ 0x203c, 0x13, 0x00 }, { 0x207f, 0xfc, 0x00 },
248a401c53aSAleksandr Rybalko 	{ 0x20a7, 0x9e, 0x00 }, { 0x20ac, 0xee, 0x00 },
249a401c53aSAleksandr Rybalko 	{ 0x2126, 0xea, 0x00 }, { 0x2190, 0x1b, 0x00 },
250a401c53aSAleksandr Rybalko 	{ 0x2191, 0x18, 0x00 }, { 0x2192, 0x1a, 0x00 },
251a401c53aSAleksandr Rybalko 	{ 0x2193, 0x19, 0x00 }, { 0x2194, 0x1d, 0x00 },
252a401c53aSAleksandr Rybalko 	{ 0x2195, 0x12, 0x00 }, { 0x21a8, 0x17, 0x00 },
253a401c53aSAleksandr Rybalko 	{ 0x2202, 0xeb, 0x00 }, { 0x2208, 0xee, 0x00 },
254a401c53aSAleksandr Rybalko 	{ 0x2211, 0xe4, 0x00 }, { 0x2212, 0x2d, 0x00 },
255a401c53aSAleksandr Rybalko 	{ 0x2219, 0xf9, 0x00 }, { 0x221a, 0xfb, 0x00 },
256a401c53aSAleksandr Rybalko 	{ 0x221e, 0xec, 0x00 }, { 0x221f, 0x1c, 0x00 },
257a401c53aSAleksandr Rybalko 	{ 0x2229, 0xef, 0x00 }, { 0x2248, 0xf7, 0x00 },
258a401c53aSAleksandr Rybalko 	{ 0x2261, 0xf0, 0x00 }, { 0x2264, 0xf3, 0x00 },
259a401c53aSAleksandr Rybalko 	{ 0x2265, 0xf2, 0x00 }, { 0x2302, 0x7f, 0x00 },
260a401c53aSAleksandr Rybalko 	{ 0x2310, 0xa9, 0x00 }, { 0x2320, 0xf4, 0x00 },
261a401c53aSAleksandr Rybalko 	{ 0x2321, 0xf5, 0x00 }, { 0x2500, 0xc4, 0x00 },
262a401c53aSAleksandr Rybalko 	{ 0x2502, 0xb3, 0x00 }, { 0x250c, 0xda, 0x00 },
263a401c53aSAleksandr Rybalko 	{ 0x2510, 0xbf, 0x00 }, { 0x2514, 0xc0, 0x00 },
264a401c53aSAleksandr Rybalko 	{ 0x2518, 0xd9, 0x00 }, { 0x251c, 0xc3, 0x00 },
265a401c53aSAleksandr Rybalko 	{ 0x2524, 0xb4, 0x00 }, { 0x252c, 0xc2, 0x00 },
266a401c53aSAleksandr Rybalko 	{ 0x2534, 0xc1, 0x00 }, { 0x253c, 0xc5, 0x00 },
267a401c53aSAleksandr Rybalko 	{ 0x2550, 0xcd, 0x00 }, { 0x2551, 0xba, 0x00 },
268a401c53aSAleksandr Rybalko 	{ 0x2552, 0xd5, 0x00 }, { 0x2553, 0xd6, 0x00 },
269a401c53aSAleksandr Rybalko 	{ 0x2554, 0xc9, 0x00 }, { 0x2555, 0xb8, 0x00 },
270a401c53aSAleksandr Rybalko 	{ 0x2556, 0xb7, 0x00 }, { 0x2557, 0xbb, 0x00 },
271a401c53aSAleksandr Rybalko 	{ 0x2558, 0xd4, 0x00 }, { 0x2559, 0xd3, 0x00 },
272a401c53aSAleksandr Rybalko 	{ 0x255a, 0xc8, 0x00 }, { 0x255b, 0xbe, 0x00 },
273a401c53aSAleksandr Rybalko 	{ 0x255c, 0xbd, 0x00 }, { 0x255d, 0xbc, 0x00 },
274a401c53aSAleksandr Rybalko 	{ 0x255e, 0xc6, 0x01 }, { 0x2560, 0xcc, 0x00 },
275a401c53aSAleksandr Rybalko 	{ 0x2561, 0xb5, 0x00 }, { 0x2562, 0xb6, 0x00 },
276a401c53aSAleksandr Rybalko 	{ 0x2563, 0xb9, 0x00 }, { 0x2564, 0xd1, 0x01 },
277a401c53aSAleksandr Rybalko 	{ 0x2566, 0xcb, 0x00 }, { 0x2567, 0xcf, 0x00 },
278a401c53aSAleksandr Rybalko 	{ 0x2568, 0xd0, 0x00 }, { 0x2569, 0xca, 0x00 },
279a401c53aSAleksandr Rybalko 	{ 0x256a, 0xd8, 0x00 }, { 0x256b, 0xd7, 0x00 },
280a401c53aSAleksandr Rybalko 	{ 0x256c, 0xce, 0x00 }, { 0x2580, 0xdf, 0x00 },
281a401c53aSAleksandr Rybalko 	{ 0x2584, 0xdc, 0x00 }, { 0x2588, 0xdb, 0x00 },
282a401c53aSAleksandr Rybalko 	{ 0x258c, 0xdd, 0x00 }, { 0x2590, 0xde, 0x00 },
283a401c53aSAleksandr Rybalko 	{ 0x2591, 0xb0, 0x02 }, { 0x25a0, 0xfe, 0x00 },
284a401c53aSAleksandr Rybalko 	{ 0x25ac, 0x16, 0x00 }, { 0x25b2, 0x1e, 0x00 },
285a401c53aSAleksandr Rybalko 	{ 0x25ba, 0x10, 0x00 }, { 0x25bc, 0x1f, 0x00 },
286a401c53aSAleksandr Rybalko 	{ 0x25c4, 0x11, 0x00 }, { 0x25cb, 0x09, 0x00 },
287a401c53aSAleksandr Rybalko 	{ 0x25d8, 0x08, 0x00 }, { 0x25d9, 0x0a, 0x00 },
288a401c53aSAleksandr Rybalko 	{ 0x263a, 0x01, 0x01 }, { 0x263c, 0x0f, 0x00 },
289a401c53aSAleksandr Rybalko 	{ 0x2640, 0x0c, 0x00 }, { 0x2642, 0x0b, 0x00 },
290a401c53aSAleksandr Rybalko 	{ 0x2660, 0x06, 0x00 }, { 0x2663, 0x05, 0x00 },
291a401c53aSAleksandr Rybalko 	{ 0x2665, 0x03, 0x01 }, { 0x266a, 0x0d, 0x00 },
292649d7b46SEd Maste 	{ 0x266c, 0x0e, 0x00 }, { 0x2713, 0xfb, 0x00 },
293649d7b46SEd Maste 	{ 0x27e8, 0x3c, 0x00 }, { 0x27e9, 0x3e, 0x00 },
294a401c53aSAleksandr Rybalko };
295a401c53aSAleksandr Rybalko 
296a401c53aSAleksandr Rybalko static uint8_t
vga_get_cp437(term_char_t c)297a401c53aSAleksandr Rybalko vga_get_cp437(term_char_t c)
298a401c53aSAleksandr Rybalko {
299a401c53aSAleksandr Rybalko 	int min, mid, max;
300a401c53aSAleksandr Rybalko 
301a401c53aSAleksandr Rybalko 	min = 0;
302e6b01ed7SEnji Cooper 	max = nitems(cp437table) - 1;
303a401c53aSAleksandr Rybalko 
304a401c53aSAleksandr Rybalko 	if (c < cp437table[0].unicode_base ||
305a401c53aSAleksandr Rybalko 	    c > cp437table[max].unicode_base + cp437table[max].length)
306a401c53aSAleksandr Rybalko 		return '?';
307a401c53aSAleksandr Rybalko 
308a401c53aSAleksandr Rybalko 	while (max >= min) {
309a401c53aSAleksandr Rybalko 		mid = (min + max) / 2;
310a401c53aSAleksandr Rybalko 		if (c < cp437table[mid].unicode_base)
311a401c53aSAleksandr Rybalko 			max = mid - 1;
312a401c53aSAleksandr Rybalko 		else if (c > cp437table[mid].unicode_base +
313a401c53aSAleksandr Rybalko 		    cp437table[mid].length)
314a401c53aSAleksandr Rybalko 			min = mid + 1;
315a401c53aSAleksandr Rybalko 		else
316a401c53aSAleksandr Rybalko 			return (c - cp437table[mid].unicode_base +
317a401c53aSAleksandr Rybalko 			    cp437table[mid].cp437_base);
318a401c53aSAleksandr Rybalko 	}
319a401c53aSAleksandr Rybalko 
320a401c53aSAleksandr Rybalko 	return '?';
321a401c53aSAleksandr Rybalko }
322a401c53aSAleksandr Rybalko 
323a401c53aSAleksandr Rybalko static void
vga_blank(struct vt_device * vd,term_color_t color)324bdcaf97cSJean-Sébastien Pédron vga_blank(struct vt_device *vd, term_color_t color)
325a401c53aSAleksandr Rybalko {
326a401c53aSAleksandr Rybalko 	struct vga_softc *sc = vd->vd_softc;
327bdcaf97cSJean-Sébastien Pédron 	u_int ofs;
328bdcaf97cSJean-Sébastien Pédron 
329bdcaf97cSJean-Sébastien Pédron 	vga_setfg(vd, color);
330bdcaf97cSJean-Sébastien Pédron 	for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++)
331bdcaf97cSJean-Sébastien Pédron 		MEM_WRITE1(sc, ofs, 0xff);
332bdcaf97cSJean-Sébastien Pédron }
333bdcaf97cSJean-Sébastien Pédron 
334bdcaf97cSJean-Sébastien Pédron static inline void
vga_bitblt_put(struct vt_device * vd,u_long dst,term_color_t color,uint8_t v)335bdcaf97cSJean-Sébastien Pédron vga_bitblt_put(struct vt_device *vd, u_long dst, term_color_t color,
336bdcaf97cSJean-Sébastien Pédron     uint8_t v)
337bdcaf97cSJean-Sébastien Pédron {
338bdcaf97cSJean-Sébastien Pédron 	struct vga_softc *sc = vd->vd_softc;
339bdcaf97cSJean-Sébastien Pédron 
340bdcaf97cSJean-Sébastien Pédron 	/* Skip empty writes, in order to avoid palette changes. */
341bdcaf97cSJean-Sébastien Pédron 	if (v != 0x00) {
342bdcaf97cSJean-Sébastien Pédron 		vga_setfg(vd, color);
343bdcaf97cSJean-Sébastien Pédron 		/*
344bdcaf97cSJean-Sébastien Pédron 		 * When this MEM_READ1() gets disabled, all sorts of
345bdcaf97cSJean-Sébastien Pédron 		 * artifacts occur.  This is because this read loads the
346bdcaf97cSJean-Sébastien Pédron 		 * set of 8 pixels that are about to be changed.  There
347bdcaf97cSJean-Sébastien Pédron 		 * is one scenario where we can avoid the read, namely
348bdcaf97cSJean-Sébastien Pédron 		 * if all pixels are about to be overwritten anyway.
349bdcaf97cSJean-Sébastien Pédron 		 */
350bdcaf97cSJean-Sébastien Pédron 		if (v != 0xff) {
351bdcaf97cSJean-Sébastien Pédron 			MEM_READ1(sc, dst);
352bdcaf97cSJean-Sébastien Pédron 
353bdcaf97cSJean-Sébastien Pédron 			/* The bg color was trashed by the reads. */
354bdcaf97cSJean-Sébastien Pédron 			sc->vga_curbg = 0xff;
355bdcaf97cSJean-Sébastien Pédron 		}
356bdcaf97cSJean-Sébastien Pédron 		MEM_WRITE1(sc, dst, v);
357bdcaf97cSJean-Sébastien Pédron 	}
358bdcaf97cSJean-Sébastien Pédron }
359bdcaf97cSJean-Sébastien Pédron 
360bdcaf97cSJean-Sébastien Pédron static void
vga_setpixel(struct vt_device * vd,int x,int y,term_color_t color)361bdcaf97cSJean-Sébastien Pédron vga_setpixel(struct vt_device *vd, int x, int y, term_color_t color)
362bdcaf97cSJean-Sébastien Pédron {
363bdcaf97cSJean-Sébastien Pédron 
3646cbf3f62SJean-Sébastien Pédron 	if (vd->vd_flags & VDF_TEXTMODE)
3656cbf3f62SJean-Sébastien Pédron 		return;
3666cbf3f62SJean-Sébastien Pédron 
367bdcaf97cSJean-Sébastien Pédron 	vga_bitblt_put(vd, (y * VT_VGA_WIDTH / 8) + (x / 8), color,
368bdcaf97cSJean-Sébastien Pédron 	    0x80 >> (x % 8));
369bdcaf97cSJean-Sébastien Pédron }
370bdcaf97cSJean-Sébastien Pédron 
371bdcaf97cSJean-Sébastien Pédron static void
vga_drawrect(struct vt_device * vd,int x1,int y1,int x2,int y2,int fill,term_color_t color)372bdcaf97cSJean-Sébastien Pédron vga_drawrect(struct vt_device *vd, int x1, int y1, int x2, int y2, int fill,
373bdcaf97cSJean-Sébastien Pédron     term_color_t color)
374bdcaf97cSJean-Sébastien Pédron {
375bdcaf97cSJean-Sébastien Pédron 	int x, y;
376bdcaf97cSJean-Sébastien Pédron 
3776cbf3f62SJean-Sébastien Pédron 	if (vd->vd_flags & VDF_TEXTMODE)
3786cbf3f62SJean-Sébastien Pédron 		return;
3796cbf3f62SJean-Sébastien Pédron 
380bdcaf97cSJean-Sébastien Pédron 	for (y = y1; y <= y2; y++) {
381bdcaf97cSJean-Sébastien Pédron 		if (fill || (y == y1) || (y == y2)) {
382bdcaf97cSJean-Sébastien Pédron 			for (x = x1; x <= x2; x++)
383bdcaf97cSJean-Sébastien Pédron 				vga_setpixel(vd, x, y, color);
384bdcaf97cSJean-Sébastien Pédron 		} else {
385bdcaf97cSJean-Sébastien Pédron 			vga_setpixel(vd, x1, y, color);
386bdcaf97cSJean-Sébastien Pédron 			vga_setpixel(vd, x2, y, color);
387bdcaf97cSJean-Sébastien Pédron 		}
388bdcaf97cSJean-Sébastien Pédron 	}
389bdcaf97cSJean-Sébastien Pédron }
390bdcaf97cSJean-Sébastien Pédron 
391bdcaf97cSJean-Sébastien Pédron static void
vga_compute_shifted_pattern(const uint8_t * src,unsigned int bytes,unsigned int src_x,unsigned int x_count,unsigned int dst_x,uint8_t * pattern,uint8_t * mask)392bdcaf97cSJean-Sébastien Pédron vga_compute_shifted_pattern(const uint8_t *src, unsigned int bytes,
393bdcaf97cSJean-Sébastien Pédron     unsigned int src_x, unsigned int x_count, unsigned int dst_x,
394bdcaf97cSJean-Sébastien Pédron     uint8_t *pattern, uint8_t *mask)
395bdcaf97cSJean-Sébastien Pédron {
396bdcaf97cSJean-Sébastien Pédron 	unsigned int n;
397bdcaf97cSJean-Sébastien Pédron 
398bdcaf97cSJean-Sébastien Pédron 	n = src_x / 8;
399a401c53aSAleksandr Rybalko 
400a401c53aSAleksandr Rybalko 	/*
401bdcaf97cSJean-Sébastien Pédron 	 * This mask has bits set, where a pixel (ether 0 or 1)
402bdcaf97cSJean-Sébastien Pédron 	 * comes from the source bitmap.
403bdcaf97cSJean-Sébastien Pédron 	 */
404bdcaf97cSJean-Sébastien Pédron 	if (mask != NULL) {
405bdcaf97cSJean-Sébastien Pédron 		*mask = (0xff
406bdcaf97cSJean-Sébastien Pédron 		    >> (8 - x_count))
407bdcaf97cSJean-Sébastien Pédron 		    << (8 - x_count - dst_x);
408bdcaf97cSJean-Sébastien Pédron 	}
409bdcaf97cSJean-Sébastien Pédron 
410bdcaf97cSJean-Sébastien Pédron 	if (n == (src_x + x_count - 1) / 8) {
411bdcaf97cSJean-Sébastien Pédron 		/* All the pixels we want are in the same byte. */
412bdcaf97cSJean-Sébastien Pédron 		*pattern = src[n];
413bdcaf97cSJean-Sébastien Pédron 		if (dst_x >= src_x)
414bdcaf97cSJean-Sébastien Pédron 			*pattern >>= (dst_x - src_x % 8);
415bdcaf97cSJean-Sébastien Pédron 		else
416bdcaf97cSJean-Sébastien Pédron 			*pattern <<= (src_x % 8 - dst_x);
417bdcaf97cSJean-Sébastien Pédron 	} else {
418bdcaf97cSJean-Sébastien Pédron 		/* The pixels we want are split into two bytes. */
419bdcaf97cSJean-Sébastien Pédron 		if (dst_x >= src_x % 8) {
420bdcaf97cSJean-Sébastien Pédron 			*pattern =
421bdcaf97cSJean-Sébastien Pédron 			    src[n] << (8 - dst_x - src_x % 8) |
422bdcaf97cSJean-Sébastien Pédron 			    src[n + 1] >> (dst_x - src_x % 8);
423bdcaf97cSJean-Sébastien Pédron 		} else {
424bdcaf97cSJean-Sébastien Pédron 			*pattern =
425bdcaf97cSJean-Sébastien Pédron 			    src[n] << (src_x % 8 - dst_x) |
426bdcaf97cSJean-Sébastien Pédron 			    src[n + 1] >> (8 - src_x % 8 - dst_x);
427bdcaf97cSJean-Sébastien Pédron 		}
428bdcaf97cSJean-Sébastien Pédron 	}
429bdcaf97cSJean-Sébastien Pédron }
430bdcaf97cSJean-Sébastien Pédron 
431bdcaf97cSJean-Sébastien Pédron static void
vga_copy_bitmap_portion(uint8_t * pattern_2colors,uint8_t * pattern_ncolors,const uint8_t * src,const uint8_t * src_mask,unsigned int src_width,unsigned int src_x,unsigned int dst_x,unsigned int x_count,unsigned int src_y,unsigned int dst_y,unsigned int y_count,term_color_t fg,term_color_t bg,int overwrite)432bdcaf97cSJean-Sébastien Pédron vga_copy_bitmap_portion(uint8_t *pattern_2colors, uint8_t *pattern_ncolors,
433bdcaf97cSJean-Sébastien Pédron     const uint8_t *src, const uint8_t *src_mask, unsigned int src_width,
434bdcaf97cSJean-Sébastien Pédron     unsigned int src_x, unsigned int dst_x, unsigned int x_count,
435bdcaf97cSJean-Sébastien Pédron     unsigned int src_y, unsigned int dst_y, unsigned int y_count,
436bdcaf97cSJean-Sébastien Pédron     term_color_t fg, term_color_t bg, int overwrite)
437bdcaf97cSJean-Sébastien Pédron {
438bdcaf97cSJean-Sébastien Pédron 	unsigned int i, bytes;
439bdcaf97cSJean-Sébastien Pédron 	uint8_t pattern, relevant_bits, mask;
440bdcaf97cSJean-Sébastien Pédron 
441bdcaf97cSJean-Sébastien Pédron 	bytes = (src_width + 7) / 8;
442bdcaf97cSJean-Sébastien Pédron 
443bdcaf97cSJean-Sébastien Pédron 	for (i = 0; i < y_count; ++i) {
444bdcaf97cSJean-Sébastien Pédron 		vga_compute_shifted_pattern(src + (src_y + i) * bytes,
445bdcaf97cSJean-Sébastien Pédron 		    bytes, src_x, x_count, dst_x, &pattern, &relevant_bits);
446bdcaf97cSJean-Sébastien Pédron 
447bdcaf97cSJean-Sébastien Pédron 		if (src_mask == NULL) {
448bdcaf97cSJean-Sébastien Pédron 			/*
449bdcaf97cSJean-Sébastien Pédron 			 * No src mask. Consider that all wanted bits
450bdcaf97cSJean-Sébastien Pédron 			 * from the source are "authoritative".
451bdcaf97cSJean-Sébastien Pédron 			 */
452bdcaf97cSJean-Sébastien Pédron 			mask = relevant_bits;
453bdcaf97cSJean-Sébastien Pédron 		} else {
454bdcaf97cSJean-Sébastien Pédron 			/*
455bdcaf97cSJean-Sébastien Pédron 			 * There's an src mask. We shift it the same way
456bdcaf97cSJean-Sébastien Pédron 			 * we shifted the source pattern.
457bdcaf97cSJean-Sébastien Pédron 			 */
458bdcaf97cSJean-Sébastien Pédron 			vga_compute_shifted_pattern(
459bdcaf97cSJean-Sébastien Pédron 			    src_mask + (src_y + i) * bytes,
460bdcaf97cSJean-Sébastien Pédron 			    bytes, src_x, x_count, dst_x,
461bdcaf97cSJean-Sébastien Pédron 			    &mask, NULL);
462bdcaf97cSJean-Sébastien Pédron 
463bdcaf97cSJean-Sébastien Pédron 			/* Now, only keep the wanted bits among them. */
464bdcaf97cSJean-Sébastien Pédron 			mask &= relevant_bits;
465bdcaf97cSJean-Sébastien Pédron 		}
466bdcaf97cSJean-Sébastien Pédron 
467bdcaf97cSJean-Sébastien Pédron 		/*
468bdcaf97cSJean-Sébastien Pédron 		 * Clear bits from the pattern which must be
469bdcaf97cSJean-Sébastien Pédron 		 * transparent, according to the source mask.
470bdcaf97cSJean-Sébastien Pédron 		 */
471bdcaf97cSJean-Sébastien Pédron 		pattern &= mask;
472bdcaf97cSJean-Sébastien Pédron 
473bdcaf97cSJean-Sébastien Pédron 		/* Set the bits in the 2-colors array. */
474bdcaf97cSJean-Sébastien Pédron 		if (overwrite)
475bdcaf97cSJean-Sébastien Pédron 			pattern_2colors[dst_y + i] &= ~mask;
476bdcaf97cSJean-Sébastien Pédron 		pattern_2colors[dst_y + i] |= pattern;
477bdcaf97cSJean-Sébastien Pédron 
4787e1770a7SJean-Sébastien Pédron 		if (pattern_ncolors == NULL)
4797e1770a7SJean-Sébastien Pédron 			continue;
4807e1770a7SJean-Sébastien Pédron 
481bdcaf97cSJean-Sébastien Pédron 		/*
482bdcaf97cSJean-Sébastien Pédron 		 * Set the same bits in the n-colors array. This one
483bdcaf97cSJean-Sébastien Pédron 		 * supports transparency, when a given bit is cleared in
484bdcaf97cSJean-Sébastien Pédron 		 * all colors.
485bdcaf97cSJean-Sébastien Pédron 		 */
486bdcaf97cSJean-Sébastien Pédron 		if (overwrite) {
487bdcaf97cSJean-Sébastien Pédron 			/*
488bdcaf97cSJean-Sébastien Pédron 			 * Ensure that the pixels used by this bitmap are
489bdcaf97cSJean-Sébastien Pédron 			 * cleared in other colors.
490bdcaf97cSJean-Sébastien Pédron 			 */
491bdcaf97cSJean-Sébastien Pédron 			for (int j = 0; j < 16; ++j)
492bdcaf97cSJean-Sébastien Pédron 				pattern_ncolors[(dst_y + i) * 16 + j] &=
493bdcaf97cSJean-Sébastien Pédron 				    ~mask;
494bdcaf97cSJean-Sébastien Pédron 		}
495bdcaf97cSJean-Sébastien Pédron 		pattern_ncolors[(dst_y + i) * 16 + fg] |= pattern;
496bdcaf97cSJean-Sébastien Pédron 		pattern_ncolors[(dst_y + i) * 16 + bg] |= (~pattern & mask);
497bdcaf97cSJean-Sébastien Pédron 	}
498bdcaf97cSJean-Sébastien Pédron }
499bdcaf97cSJean-Sébastien Pédron 
500bdcaf97cSJean-Sébastien Pédron static void
vga_bitblt_pixels_block_2colors(struct vt_device * vd,const uint8_t * masks,term_color_t fg,term_color_t bg,unsigned int x,unsigned int y,unsigned int height)501bdcaf97cSJean-Sébastien Pédron vga_bitblt_pixels_block_2colors(struct vt_device *vd, const uint8_t *masks,
502bdcaf97cSJean-Sébastien Pédron     term_color_t fg, term_color_t bg,
503bdcaf97cSJean-Sébastien Pédron     unsigned int x, unsigned int y, unsigned int height)
504bdcaf97cSJean-Sébastien Pédron {
505bdcaf97cSJean-Sébastien Pédron 	unsigned int i, offset;
506bdcaf97cSJean-Sébastien Pédron 	struct vga_softc *sc;
507bdcaf97cSJean-Sébastien Pédron 
508bdcaf97cSJean-Sébastien Pédron 	/*
509bdcaf97cSJean-Sébastien Pédron 	 * The great advantage of Write Mode 3 is that we just need
510bdcaf97cSJean-Sébastien Pédron 	 * to load the foreground in the Set/Reset register, load the
511bdcaf97cSJean-Sébastien Pédron 	 * background color in the latches register (this is done
512bdcaf97cSJean-Sébastien Pédron 	 * through a write in offscreen memory followed by a read of
513bdcaf97cSJean-Sébastien Pédron 	 * that data), then write the pattern to video memory. This
514bdcaf97cSJean-Sébastien Pédron 	 * pattern indicates if the pixel should use the foreground
515bdcaf97cSJean-Sébastien Pédron 	 * color (bit set) or the background color (bit cleared).
516bdcaf97cSJean-Sébastien Pédron 	 */
517bdcaf97cSJean-Sébastien Pédron 
518bdcaf97cSJean-Sébastien Pédron 	vga_setbg(vd, bg);
519bdcaf97cSJean-Sébastien Pédron 	vga_setfg(vd, fg);
520bdcaf97cSJean-Sébastien Pédron 
521bdcaf97cSJean-Sébastien Pédron 	sc = vd->vd_softc;
522bdcaf97cSJean-Sébastien Pédron 	offset = (VT_VGA_WIDTH * y + x) / 8;
523bdcaf97cSJean-Sébastien Pédron 
524bdcaf97cSJean-Sébastien Pédron 	for (i = 0; i < height; ++i, offset += VT_VGA_WIDTH / 8) {
525bdcaf97cSJean-Sébastien Pédron 		MEM_WRITE1(sc, offset, masks[i]);
526bdcaf97cSJean-Sébastien Pédron 	}
527bdcaf97cSJean-Sébastien Pédron }
528bdcaf97cSJean-Sébastien Pédron 
529bdcaf97cSJean-Sébastien Pédron static void
vga_bitblt_pixels_block_ncolors(struct vt_device * vd,const uint8_t * masks,unsigned int x,unsigned int y,unsigned int height)530bdcaf97cSJean-Sébastien Pédron vga_bitblt_pixels_block_ncolors(struct vt_device *vd, const uint8_t *masks,
531bdcaf97cSJean-Sébastien Pédron     unsigned int x, unsigned int y, unsigned int height)
532bdcaf97cSJean-Sébastien Pédron {
533731a929aSEd Maste 	unsigned int i, j, plane, color, offset;
534bdcaf97cSJean-Sébastien Pédron 	struct vga_softc *sc;
535731a929aSEd Maste 	uint8_t mask, planes[height * 4];
536bdcaf97cSJean-Sébastien Pédron 
537bdcaf97cSJean-Sébastien Pédron 	sc = vd->vd_softc;
538bdcaf97cSJean-Sébastien Pédron 
539731a929aSEd Maste 	memset(planes, 0, sizeof(planes));
540af9f67eaSJean-Sébastien Pédron 
541bdcaf97cSJean-Sébastien Pédron 	/*
542af9f67eaSJean-Sébastien Pédron          * To write a group of pixels using 3 or more colors, we select
543731a929aSEd Maste          * Write Mode 0 and write one byte to each plane separately.
544af9f67eaSJean-Sébastien Pédron 	 */
545af9f67eaSJean-Sébastien Pédron 
546af9f67eaSJean-Sébastien Pédron 	/*
547731a929aSEd Maste 	 * We first compute each byte: each plane contains one bit of the
548af9f67eaSJean-Sébastien Pédron 	 * color code for each of the 8 pixels.
549bdcaf97cSJean-Sébastien Pédron 	 *
550af9f67eaSJean-Sébastien Pédron 	 * For example, if the 8 pixels are like this:
551af9f67eaSJean-Sébastien Pédron 	 *     GBBBBBBY
552af9f67eaSJean-Sébastien Pédron 	 * where:
553af9f67eaSJean-Sébastien Pédron 	 *     G (gray)   = 0b0111
554af9f67eaSJean-Sébastien Pédron 	 *     B (black)  = 0b0000
555af9f67eaSJean-Sébastien Pédron 	 *     Y (yellow) = 0b0011
556af9f67eaSJean-Sébastien Pédron 	 *
557af9f67eaSJean-Sébastien Pédron 	 * The corresponding for bytes are:
558af9f67eaSJean-Sébastien Pédron 	 *             GBBBBBBY
559731a929aSEd Maste 	 *    Plane 0: 10000001 = 0x81
560731a929aSEd Maste 	 *    Plane 1: 10000001 = 0x81
561731a929aSEd Maste 	 *    Plane 2: 10000000 = 0x80
562731a929aSEd Maste 	 *    Plane 3: 00000000 = 0x00
563af9f67eaSJean-Sébastien Pédron 	 *             |  |   |
564af9f67eaSJean-Sébastien Pédron 	 *             |  |   +-> 0b0011 (Y)
565af9f67eaSJean-Sébastien Pédron 	 *             |  +-----> 0b0000 (B)
566af9f67eaSJean-Sébastien Pédron 	 *             +--------> 0b0111 (G)
567bdcaf97cSJean-Sébastien Pédron 	 */
568bdcaf97cSJean-Sébastien Pédron 
569bdcaf97cSJean-Sébastien Pédron 	for (i = 0; i < height; ++i) {
570af9f67eaSJean-Sébastien Pédron 		for (color = 0; color < 16; ++color) {
571af9f67eaSJean-Sébastien Pédron 			mask = masks[i * 16 + color];
572af9f67eaSJean-Sébastien Pédron 			if (mask == 0x00)
573bdcaf97cSJean-Sébastien Pédron 				continue;
574bdcaf97cSJean-Sébastien Pédron 
575af9f67eaSJean-Sébastien Pédron 			for (j = 0; j < 8; ++j) {
576af9f67eaSJean-Sébastien Pédron 				if (!((mask >> (7 - j)) & 0x1))
577af9f67eaSJean-Sébastien Pédron 					continue;
578bdcaf97cSJean-Sébastien Pédron 
579af9f67eaSJean-Sébastien Pédron 				/* The pixel "j" uses color "color". */
580731a929aSEd Maste 				for (plane = 0; plane < 4; ++plane)
581731a929aSEd Maste 					planes[i * 4 + plane] |=
582f266082fSEd Maste 					    ((cons_to_vga_colors[color] >>
583f266082fSEd Maste 					    plane) & 0x1) << (7 - j);
584bdcaf97cSJean-Sébastien Pédron 			}
585af9f67eaSJean-Sébastien Pédron 		}
586af9f67eaSJean-Sébastien Pédron 	}
587af9f67eaSJean-Sébastien Pédron 
588af9f67eaSJean-Sébastien Pédron 	/*
589af9f67eaSJean-Sébastien Pédron 	 * The bytes are ready: we now switch to Write Mode 0 and write
590731a929aSEd Maste 	 * all bytes, one plane at a time.
591af9f67eaSJean-Sébastien Pédron 	 */
592af9f67eaSJean-Sébastien Pédron 	vga_setwmode(vd, 0);
593af9f67eaSJean-Sébastien Pédron 
594af9f67eaSJean-Sébastien Pédron 	REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK);
595731a929aSEd Maste 	for (plane = 0; plane < 4; ++plane) {
596731a929aSEd Maste 		/* Select plane. */
597731a929aSEd Maste 		REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plane);
598af9f67eaSJean-Sébastien Pédron 
599731a929aSEd Maste 		/* Write all bytes for this plane, from Y to Y+height. */
600af9f67eaSJean-Sébastien Pédron 		for (i = 0; i < height; ++i) {
601af9f67eaSJean-Sébastien Pédron 			offset = (VT_VGA_WIDTH * (y + i) + x) / 8;
602731a929aSEd Maste 			MEM_WRITE1(sc, offset, planes[i * 4 + plane]);
603bdcaf97cSJean-Sébastien Pédron 		}
604bdcaf97cSJean-Sébastien Pédron 	}
605bdcaf97cSJean-Sébastien Pédron }
606bdcaf97cSJean-Sébastien Pédron 
607bdcaf97cSJean-Sébastien Pédron static void
vga_bitblt_one_text_pixels_block(struct vt_device * vd,const struct vt_window * vw,unsigned int x,unsigned int y)608ab06c776SJean-Sébastien Pédron vga_bitblt_one_text_pixels_block(struct vt_device *vd,
609946d0288SJean-Sébastien Pédron     const struct vt_window *vw, unsigned int x, unsigned int y)
610bdcaf97cSJean-Sébastien Pédron {
611ab06c776SJean-Sébastien Pédron 	const struct vt_buf *vb;
612ab06c776SJean-Sébastien Pédron 	const struct vt_font *vf;
613bdcaf97cSJean-Sébastien Pédron 	unsigned int i, col, row, src_x, x_count;
614bdcaf97cSJean-Sébastien Pédron 	unsigned int used_colors_list[16], used_colors;
615ab06c776SJean-Sébastien Pédron 	uint8_t pattern_2colors[vw->vw_font->vf_height];
616ab06c776SJean-Sébastien Pédron 	uint8_t pattern_ncolors[vw->vw_font->vf_height * 16];
617bdcaf97cSJean-Sébastien Pédron 	term_char_t c;
618bdcaf97cSJean-Sébastien Pédron 	term_color_t fg, bg;
619bdcaf97cSJean-Sébastien Pédron 	const uint8_t *src;
620bdcaf97cSJean-Sébastien Pédron 
621ab06c776SJean-Sébastien Pédron 	vb = &vw->vw_buf;
622ab06c776SJean-Sébastien Pédron 	vf = vw->vw_font;
623ab06c776SJean-Sébastien Pédron 
624bdcaf97cSJean-Sébastien Pédron 	/*
625bdcaf97cSJean-Sébastien Pédron 	 * The current pixels block.
626bdcaf97cSJean-Sébastien Pédron 	 *
627bdcaf97cSJean-Sébastien Pédron 	 * We fill it with portions of characters, because both "grids"
628bdcaf97cSJean-Sébastien Pédron 	 * may not match.
629bdcaf97cSJean-Sébastien Pédron 	 *
630bdcaf97cSJean-Sébastien Pédron 	 * i is the index in this pixels block.
631bdcaf97cSJean-Sébastien Pédron 	 */
632bdcaf97cSJean-Sébastien Pédron 
633bdcaf97cSJean-Sébastien Pédron 	i = x;
634bdcaf97cSJean-Sébastien Pédron 	used_colors = 0;
635bdcaf97cSJean-Sébastien Pédron 	memset(used_colors_list, 0, sizeof(used_colors_list));
636bdcaf97cSJean-Sébastien Pédron 	memset(pattern_2colors, 0, sizeof(pattern_2colors));
637bdcaf97cSJean-Sébastien Pédron 	memset(pattern_ncolors, 0, sizeof(pattern_ncolors));
638bdcaf97cSJean-Sébastien Pédron 
63983fbb296SJean-Sébastien Pédron 	if (i < vw->vw_draw_area.tr_begin.tp_col) {
640bdcaf97cSJean-Sébastien Pédron 		/*
641bdcaf97cSJean-Sébastien Pédron 		 * i is in the margin used to center the text area on
642bdcaf97cSJean-Sébastien Pédron 		 * the screen.
643bdcaf97cSJean-Sébastien Pédron 		 */
644bdcaf97cSJean-Sébastien Pédron 
64583fbb296SJean-Sébastien Pédron 		i = vw->vw_draw_area.tr_begin.tp_col;
646bdcaf97cSJean-Sébastien Pédron 	}
647bdcaf97cSJean-Sébastien Pédron 
64883fbb296SJean-Sébastien Pédron 	while (i < x + VT_VGA_PIXELS_BLOCK &&
64983fbb296SJean-Sébastien Pédron 	    i < vw->vw_draw_area.tr_end.tp_col) {
650bdcaf97cSJean-Sébastien Pédron 		/*
651bdcaf97cSJean-Sébastien Pédron 		 * Find which character is drawn on this pixel in the
652bdcaf97cSJean-Sébastien Pédron 		 * pixels block.
653bdcaf97cSJean-Sébastien Pédron 		 *
654bdcaf97cSJean-Sébastien Pédron 		 * While here, record what colors it uses.
655bdcaf97cSJean-Sébastien Pédron 		 */
656bdcaf97cSJean-Sébastien Pédron 
65783fbb296SJean-Sébastien Pédron 		col = (i - vw->vw_draw_area.tr_begin.tp_col) / vf->vf_width;
65883fbb296SJean-Sébastien Pédron 		row = (y - vw->vw_draw_area.tr_begin.tp_row) / vf->vf_height;
659bdcaf97cSJean-Sébastien Pédron 
660bdcaf97cSJean-Sébastien Pédron 		c = VTBUF_GET_FIELD(vb, row, col);
661bdcaf97cSJean-Sébastien Pédron 		src = vtfont_lookup(vf, c);
662bdcaf97cSJean-Sébastien Pédron 
663bdcaf97cSJean-Sébastien Pédron 		vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), &fg, &bg);
664bdcaf97cSJean-Sébastien Pédron 		if ((used_colors_list[fg] & 0x1) != 0x1)
665bdcaf97cSJean-Sébastien Pédron 			used_colors++;
666bdcaf97cSJean-Sébastien Pédron 		if ((used_colors_list[bg] & 0x2) != 0x2)
667bdcaf97cSJean-Sébastien Pédron 			used_colors++;
668bdcaf97cSJean-Sébastien Pédron 		used_colors_list[fg] |= 0x1;
669bdcaf97cSJean-Sébastien Pédron 		used_colors_list[bg] |= 0x2;
670bdcaf97cSJean-Sébastien Pédron 
671bdcaf97cSJean-Sébastien Pédron 		/*
672bdcaf97cSJean-Sébastien Pédron 		 * Compute the portion of the character we want to draw,
673bdcaf97cSJean-Sébastien Pédron 		 * because the pixels block may start in the middle of a
674bdcaf97cSJean-Sébastien Pédron 		 * character.
675bdcaf97cSJean-Sébastien Pédron 		 *
676bdcaf97cSJean-Sébastien Pédron 		 * The first pixel to draw in the character is
677bdcaf97cSJean-Sébastien Pédron 		 *     the current position -
678bdcaf97cSJean-Sébastien Pédron 		 *     the start position of the character
679bdcaf97cSJean-Sébastien Pédron 		 *
680bdcaf97cSJean-Sébastien Pédron 		 * The last pixel to draw is either
681bdcaf97cSJean-Sébastien Pédron 		 *     - the last pixel of the character, or
682bdcaf97cSJean-Sébastien Pédron 		 *     - the pixel of the character matching the end of
683bdcaf97cSJean-Sébastien Pédron 		 *       the pixels block
684bdcaf97cSJean-Sébastien Pédron 		 * whichever comes first. This position is then
685bdcaf97cSJean-Sébastien Pédron 		 * changed to be relative to the start position of the
686bdcaf97cSJean-Sébastien Pédron 		 * character.
687bdcaf97cSJean-Sébastien Pédron 		 */
688bdcaf97cSJean-Sébastien Pédron 
68983fbb296SJean-Sébastien Pédron 		src_x = i -
69083fbb296SJean-Sébastien Pédron 		    (col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col);
69183fbb296SJean-Sébastien Pédron 		x_count = min(min(
69283fbb296SJean-Sébastien Pédron 		    (col + 1) * vf->vf_width +
69383fbb296SJean-Sébastien Pédron 		    vw->vw_draw_area.tr_begin.tp_col,
69483fbb296SJean-Sébastien Pédron 		    x + VT_VGA_PIXELS_BLOCK),
69583fbb296SJean-Sébastien Pédron 		    vw->vw_draw_area.tr_end.tp_col);
69683fbb296SJean-Sébastien Pédron 		x_count -= col * vf->vf_width +
69783fbb296SJean-Sébastien Pédron 		    vw->vw_draw_area.tr_begin.tp_col;
698bdcaf97cSJean-Sébastien Pédron 		x_count -= src_x;
699bdcaf97cSJean-Sébastien Pédron 
700bdcaf97cSJean-Sébastien Pédron 		/* Copy a portion of the character. */
701bdcaf97cSJean-Sébastien Pédron 		vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors,
702bdcaf97cSJean-Sébastien Pédron 		    src, NULL, vf->vf_width,
703bdcaf97cSJean-Sébastien Pédron 		    src_x, i % VT_VGA_PIXELS_BLOCK, x_count,
704bdcaf97cSJean-Sébastien Pédron 		    0, 0, vf->vf_height, fg, bg, 0);
705bdcaf97cSJean-Sébastien Pédron 
706bdcaf97cSJean-Sébastien Pédron 		/* We move to the next portion. */
707bdcaf97cSJean-Sébastien Pédron 		i += x_count;
708bdcaf97cSJean-Sébastien Pédron 	}
709bdcaf97cSJean-Sébastien Pédron 
710bdcaf97cSJean-Sébastien Pédron #ifndef SC_NO_CUTPASTE
711bdcaf97cSJean-Sébastien Pédron 	/*
712bdcaf97cSJean-Sébastien Pédron 	 * Copy the mouse pointer bitmap if it's over the current pixels
713bdcaf97cSJean-Sébastien Pédron 	 * block.
714bdcaf97cSJean-Sébastien Pédron 	 *
715bdcaf97cSJean-Sébastien Pédron 	 * We use the saved cursor position (saved in vt_flush()), because
716bdcaf97cSJean-Sébastien Pédron 	 * the current position could be different than the one used
717bdcaf97cSJean-Sébastien Pédron 	 * to mark the area dirty.
718bdcaf97cSJean-Sébastien Pédron 	 */
719946d0288SJean-Sébastien Pédron 	term_rect_t drawn_area;
720946d0288SJean-Sébastien Pédron 
721946d0288SJean-Sébastien Pédron 	drawn_area.tr_begin.tp_col = x;
722946d0288SJean-Sébastien Pédron 	drawn_area.tr_begin.tp_row = y;
723946d0288SJean-Sébastien Pédron 	drawn_area.tr_end.tp_col = x + VT_VGA_PIXELS_BLOCK;
724946d0288SJean-Sébastien Pédron 	drawn_area.tr_end.tp_row = y + vf->vf_height;
725946d0288SJean-Sébastien Pédron 	if (vd->vd_mshown && vt_is_cursor_in_area(vd, &drawn_area)) {
726946d0288SJean-Sébastien Pédron 		struct vt_mouse_cursor *cursor;
727946d0288SJean-Sébastien Pédron 		unsigned int mx, my;
728bdcaf97cSJean-Sébastien Pédron 		unsigned int dst_x, src_y, dst_y, y_count;
729bdcaf97cSJean-Sébastien Pédron 
730946d0288SJean-Sébastien Pédron 		cursor = vd->vd_mcursor;
73183fbb296SJean-Sébastien Pédron 		mx = vd->vd_mx_drawn + vw->vw_draw_area.tr_begin.tp_col;
73283fbb296SJean-Sébastien Pédron 		my = vd->vd_my_drawn + vw->vw_draw_area.tr_begin.tp_row;
733946d0288SJean-Sébastien Pédron 
734bdcaf97cSJean-Sébastien Pédron 		/* Compute the portion of the cursor we want to copy. */
735bdcaf97cSJean-Sébastien Pédron 		src_x = x > mx ? x - mx : 0;
736bdcaf97cSJean-Sébastien Pédron 		dst_x = mx > x ? mx - x : 0;
73783fbb296SJean-Sébastien Pédron 		x_count = min(min(min(
73883fbb296SJean-Sébastien Pédron 		    cursor->width - src_x,
73983fbb296SJean-Sébastien Pédron 		    x + VT_VGA_PIXELS_BLOCK - mx),
74083fbb296SJean-Sébastien Pédron 		    vw->vw_draw_area.tr_end.tp_col - mx),
741bdcaf97cSJean-Sébastien Pédron 		    VT_VGA_PIXELS_BLOCK);
742bdcaf97cSJean-Sébastien Pédron 
743bdcaf97cSJean-Sébastien Pédron 		/*
744bdcaf97cSJean-Sébastien Pédron 		 * The cursor isn't aligned on the Y-axis with
745bdcaf97cSJean-Sébastien Pédron 		 * characters, so we need to compute the vertical
746bdcaf97cSJean-Sébastien Pédron 		 * start/count.
747bdcaf97cSJean-Sébastien Pédron 		 */
748bdcaf97cSJean-Sébastien Pédron 		src_y = y > my ? y - my : 0;
749bdcaf97cSJean-Sébastien Pédron 		dst_y = my > y ? my - y : 0;
750bdcaf97cSJean-Sébastien Pédron 		y_count = min(
751bdcaf97cSJean-Sébastien Pédron 		    min(cursor->height - src_y, y + vf->vf_height - my),
752bdcaf97cSJean-Sébastien Pédron 		    vf->vf_height);
753bdcaf97cSJean-Sébastien Pédron 
754bdcaf97cSJean-Sébastien Pédron 		/* Copy the cursor portion. */
755bdcaf97cSJean-Sébastien Pédron 		vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors,
756bdcaf97cSJean-Sébastien Pédron 		    cursor->map, cursor->mask, cursor->width,
757bdcaf97cSJean-Sébastien Pédron 		    src_x, dst_x, x_count, src_y, dst_y, y_count,
7583235c9ebSJean-Sébastien Pédron 		    vd->vd_mcursor_fg, vd->vd_mcursor_bg, 1);
759bdcaf97cSJean-Sébastien Pédron 
7603235c9ebSJean-Sébastien Pédron 		if ((used_colors_list[vd->vd_mcursor_fg] & 0x1) != 0x1)
761bdcaf97cSJean-Sébastien Pédron 			used_colors++;
7623235c9ebSJean-Sébastien Pédron 		if ((used_colors_list[vd->vd_mcursor_bg] & 0x2) != 0x2)
763bdcaf97cSJean-Sébastien Pédron 			used_colors++;
764bdcaf97cSJean-Sébastien Pédron 	}
765bdcaf97cSJean-Sébastien Pédron #endif
766bdcaf97cSJean-Sébastien Pédron 
767bdcaf97cSJean-Sébastien Pédron 	/*
768bdcaf97cSJean-Sébastien Pédron 	 * The pixels block is completed, we can now draw it on the
769bdcaf97cSJean-Sébastien Pédron 	 * screen.
770bdcaf97cSJean-Sébastien Pédron 	 */
771bdcaf97cSJean-Sébastien Pédron 	if (used_colors == 2)
772bdcaf97cSJean-Sébastien Pédron 		vga_bitblt_pixels_block_2colors(vd, pattern_2colors, fg, bg,
773bdcaf97cSJean-Sébastien Pédron 		    x, y, vf->vf_height);
774bdcaf97cSJean-Sébastien Pédron 	else
775bdcaf97cSJean-Sébastien Pédron 		vga_bitblt_pixels_block_ncolors(vd, pattern_ncolors,
776bdcaf97cSJean-Sébastien Pédron 		    x, y, vf->vf_height);
777bdcaf97cSJean-Sébastien Pédron }
778bdcaf97cSJean-Sébastien Pédron 
779bdcaf97cSJean-Sébastien Pédron static void
vga_bitblt_text_gfxmode(struct vt_device * vd,const struct vt_window * vw,const term_rect_t * area)780ab06c776SJean-Sébastien Pédron vga_bitblt_text_gfxmode(struct vt_device *vd, const struct vt_window *vw,
781946d0288SJean-Sébastien Pédron     const term_rect_t *area)
782bdcaf97cSJean-Sébastien Pédron {
783ab06c776SJean-Sébastien Pédron 	const struct vt_font *vf;
784bdcaf97cSJean-Sébastien Pédron 	unsigned int col, row;
785bdcaf97cSJean-Sébastien Pédron 	unsigned int x1, y1, x2, y2, x, y;
786bdcaf97cSJean-Sébastien Pédron 
787ab06c776SJean-Sébastien Pédron 	vf = vw->vw_font;
788ab06c776SJean-Sébastien Pédron 
789bdcaf97cSJean-Sébastien Pédron 	/*
790bdcaf97cSJean-Sébastien Pédron 	 * Compute the top-left pixel position aligned with the video
791bdcaf97cSJean-Sébastien Pédron 	 * adapter pixels block size.
792bdcaf97cSJean-Sébastien Pédron 	 *
793bdcaf97cSJean-Sébastien Pédron 	 * This is calculated from the top-left column of te dirty area:
794bdcaf97cSJean-Sébastien Pédron 	 *
795bdcaf97cSJean-Sébastien Pédron 	 *     1. Compute the top-left pixel of the character:
796bdcaf97cSJean-Sébastien Pédron 	 *        col * font width + x offset
797bdcaf97cSJean-Sébastien Pédron 	 *
798bdcaf97cSJean-Sébastien Pédron 	 *        NOTE: x offset is used to center the text area on the
799bdcaf97cSJean-Sébastien Pédron 	 *        screen. It's expressed in pixels, not in characters
800bdcaf97cSJean-Sébastien Pédron 	 *        col/row!
801bdcaf97cSJean-Sébastien Pédron 	 *
802bdcaf97cSJean-Sébastien Pédron 	 *     2. Find the pixel further on the left marking the start of
803bdcaf97cSJean-Sébastien Pédron 	 *        an aligned pixels block (eg. chunk of 8 pixels):
804bdcaf97cSJean-Sébastien Pédron 	 *        character's x / blocksize * blocksize
805bdcaf97cSJean-Sébastien Pédron 	 *
806bdcaf97cSJean-Sébastien Pédron 	 *        The division, being made on integers, achieves the
807bdcaf97cSJean-Sébastien Pédron 	 *        alignment.
808bdcaf97cSJean-Sébastien Pédron 	 *
809bdcaf97cSJean-Sébastien Pédron 	 * For the Y-axis, we need to compute the character's y
810bdcaf97cSJean-Sébastien Pédron 	 * coordinate, but we don't need to align it.
811bdcaf97cSJean-Sébastien Pédron 	 */
812bdcaf97cSJean-Sébastien Pédron 
813bdcaf97cSJean-Sébastien Pédron 	col = area->tr_begin.tp_col;
814bdcaf97cSJean-Sébastien Pédron 	row = area->tr_begin.tp_row;
81583fbb296SJean-Sébastien Pédron 	x1 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col)
816bdcaf97cSJean-Sébastien Pédron 	     / VT_VGA_PIXELS_BLOCK)
817bdcaf97cSJean-Sébastien Pédron 	    * VT_VGA_PIXELS_BLOCK;
81883fbb296SJean-Sébastien Pédron 	y1 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row;
819bdcaf97cSJean-Sébastien Pédron 
820bdcaf97cSJean-Sébastien Pédron 	/*
821bdcaf97cSJean-Sébastien Pédron 	 * Compute the bottom right pixel position, again, aligned with
822bdcaf97cSJean-Sébastien Pédron 	 * the pixels block size.
823bdcaf97cSJean-Sébastien Pédron 	 *
824bdcaf97cSJean-Sébastien Pédron 	 * The same rules apply, we just add 1 to base the computation
825bdcaf97cSJean-Sébastien Pédron 	 * on the "right border" of the dirty area.
826bdcaf97cSJean-Sébastien Pédron 	 */
827bdcaf97cSJean-Sébastien Pédron 
828bdcaf97cSJean-Sébastien Pédron 	col = area->tr_end.tp_col;
829bdcaf97cSJean-Sébastien Pédron 	row = area->tr_end.tp_row;
830057b4402SPedro F. Giffuni 	x2 = (int)howmany(col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col,
831057b4402SPedro F. Giffuni 	    VT_VGA_PIXELS_BLOCK)
832bdcaf97cSJean-Sébastien Pédron 	    * VT_VGA_PIXELS_BLOCK;
83383fbb296SJean-Sébastien Pédron 	y2 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row;
834bdcaf97cSJean-Sébastien Pédron 
83583fbb296SJean-Sébastien Pédron 	/* Clip the area to the screen size. */
83683fbb296SJean-Sébastien Pédron 	x2 = min(x2, vw->vw_draw_area.tr_end.tp_col);
83783fbb296SJean-Sébastien Pédron 	y2 = min(y2, vw->vw_draw_area.tr_end.tp_row);
83837fcd291SJean-Sébastien Pédron 
83937fcd291SJean-Sébastien Pédron 	/*
840bdcaf97cSJean-Sébastien Pédron 	 * Now, we take care of N pixels line at a time (the first for
841bdcaf97cSJean-Sébastien Pédron 	 * loop, N = font height), and for these lines, draw one pixels
842bdcaf97cSJean-Sébastien Pédron 	 * block at a time (the second for loop), not a character at a
843bdcaf97cSJean-Sébastien Pédron 	 * time.
844bdcaf97cSJean-Sébastien Pédron 	 *
845bdcaf97cSJean-Sébastien Pédron 	 * Therefore, on the X-axis, characters my be drawn partially if
846bdcaf97cSJean-Sébastien Pédron 	 * they are not aligned on 8-pixels boundary.
847bdcaf97cSJean-Sébastien Pédron 	 *
848bdcaf97cSJean-Sébastien Pédron 	 * However, the operation is repeated for the full height of the
849bdcaf97cSJean-Sébastien Pédron 	 * font before moving to the next character, because it allows
850bdcaf97cSJean-Sébastien Pédron 	 * to keep the color settings and write mode, before perhaps
851bdcaf97cSJean-Sébastien Pédron 	 * changing them with the next one.
852bdcaf97cSJean-Sébastien Pédron 	 */
853bdcaf97cSJean-Sébastien Pédron 
854bdcaf97cSJean-Sébastien Pédron 	for (y = y1; y < y2; y += vf->vf_height) {
855bdcaf97cSJean-Sébastien Pédron 		for (x = x1; x < x2; x += VT_VGA_PIXELS_BLOCK) {
856946d0288SJean-Sébastien Pédron 			vga_bitblt_one_text_pixels_block(vd, vw, x, y);
857bdcaf97cSJean-Sébastien Pédron 		}
858bdcaf97cSJean-Sébastien Pédron 	}
859bdcaf97cSJean-Sébastien Pédron }
860bdcaf97cSJean-Sébastien Pédron 
861bdcaf97cSJean-Sébastien Pédron static void
vga_bitblt_text_txtmode(struct vt_device * vd,const struct vt_window * vw,const term_rect_t * area)862ab06c776SJean-Sébastien Pédron vga_bitblt_text_txtmode(struct vt_device *vd, const struct vt_window *vw,
863946d0288SJean-Sébastien Pédron     const term_rect_t *area)
864bdcaf97cSJean-Sébastien Pédron {
865bdcaf97cSJean-Sébastien Pédron 	struct vga_softc *sc;
866ab06c776SJean-Sébastien Pédron 	const struct vt_buf *vb;
867bdcaf97cSJean-Sébastien Pédron 	unsigned int col, row;
868bdcaf97cSJean-Sébastien Pédron 	term_char_t c;
869bdcaf97cSJean-Sébastien Pédron 	term_color_t fg, bg;
870bdcaf97cSJean-Sébastien Pédron 	uint8_t ch, attr;
871ee97b233SColin Percival 	size_t z;
872bdcaf97cSJean-Sébastien Pédron 
873bdcaf97cSJean-Sébastien Pédron 	sc = vd->vd_softc;
874ab06c776SJean-Sébastien Pédron 	vb = &vw->vw_buf;
875bdcaf97cSJean-Sébastien Pédron 
876bdcaf97cSJean-Sébastien Pédron 	for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) {
877bdcaf97cSJean-Sébastien Pédron 		for (col = area->tr_begin.tp_col;
878bdcaf97cSJean-Sébastien Pédron 		    col < area->tr_end.tp_col;
879bdcaf97cSJean-Sébastien Pédron 		    ++col) {
880bdcaf97cSJean-Sébastien Pédron 			/*
881bdcaf97cSJean-Sébastien Pédron 			 * Get next character and its associated fg/bg
882bdcaf97cSJean-Sébastien Pédron 			 * colors.
883bdcaf97cSJean-Sébastien Pédron 			 */
884bdcaf97cSJean-Sébastien Pédron 			c = VTBUF_GET_FIELD(vb, row, col);
885bdcaf97cSJean-Sébastien Pédron 			vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col),
886bdcaf97cSJean-Sébastien Pédron 			    &fg, &bg);
887bdcaf97cSJean-Sébastien Pédron 
888ee97b233SColin Percival 			z = row * PIXEL_WIDTH(VT_FB_MAX_WIDTH) + col;
889dbc7ca59SEd Maste 			if (z >= PIXEL_HEIGHT(VT_FB_MAX_HEIGHT) *
890dbc7ca59SEd Maste 			    PIXEL_WIDTH(VT_FB_MAX_WIDTH))
891dbc7ca59SEd Maste 				continue;
892ee97b233SColin Percival 			if (vd->vd_drawn && (vd->vd_drawn[z] == c) &&
893ee97b233SColin Percival 			    vd->vd_drawnfg && (vd->vd_drawnfg[z] == fg) &&
894ee97b233SColin Percival 			    vd->vd_drawnbg && (vd->vd_drawnbg[z] == bg))
895ee97b233SColin Percival 				continue;
896ee97b233SColin Percival 
897bdcaf97cSJean-Sébastien Pédron 			/*
898bdcaf97cSJean-Sébastien Pédron 			 * Convert character to CP437, which is the
899bdcaf97cSJean-Sébastien Pédron 			 * character set used by the VGA hardware by
900bdcaf97cSJean-Sébastien Pédron 			 * default.
901a401c53aSAleksandr Rybalko 			 */
90281788a2bSJean-Sébastien Pédron 			ch = vga_get_cp437(TCHAR_CHARACTER(c));
903a401c53aSAleksandr Rybalko 
904bdcaf97cSJean-Sébastien Pédron 			/* Convert colors to VGA attributes. */
9055e251aecSJean-Sébastien Pédron 			attr =
9065e251aecSJean-Sébastien Pédron 			    cons_to_vga_colors[bg] << 4 |
9075e251aecSJean-Sébastien Pédron 			    cons_to_vga_colors[fg];
908a401c53aSAleksandr Rybalko 
9090b4d5eb8SColin Percival 			MEM_WRITE2(sc, (row * 80 + col) * 2 + 0,
9100b4d5eb8SColin Percival 			    ch + ((uint16_t)(attr) << 8));
911ee97b233SColin Percival 
912ee97b233SColin Percival 			if (vd->vd_drawn)
913ee97b233SColin Percival 				vd->vd_drawn[z] = c;
914ee97b233SColin Percival 			if (vd->vd_drawnfg)
915ee97b233SColin Percival 				vd->vd_drawnfg[z] = fg;
916ee97b233SColin Percival 			if (vd->vd_drawnbg)
917ee97b233SColin Percival 				vd->vd_drawnbg[z] = bg;
918bdcaf97cSJean-Sébastien Pédron 		}
919bdcaf97cSJean-Sébastien Pédron 	}
920bdcaf97cSJean-Sébastien Pédron }
921bdcaf97cSJean-Sébastien Pédron 
922bdcaf97cSJean-Sébastien Pédron static void
vga_bitblt_text(struct vt_device * vd,const struct vt_window * vw,const term_rect_t * area)923ab06c776SJean-Sébastien Pédron vga_bitblt_text(struct vt_device *vd, const struct vt_window *vw,
924946d0288SJean-Sébastien Pédron     const term_rect_t *area)
925bdcaf97cSJean-Sébastien Pédron {
926bdcaf97cSJean-Sébastien Pédron 
927bdcaf97cSJean-Sébastien Pédron 	if (!(vd->vd_flags & VDF_TEXTMODE)) {
928946d0288SJean-Sébastien Pédron 		vga_bitblt_text_gfxmode(vd, vw, area);
929bdcaf97cSJean-Sébastien Pédron 	} else {
930946d0288SJean-Sébastien Pédron 		vga_bitblt_text_txtmode(vd, vw, area);
931bdcaf97cSJean-Sébastien Pédron 	}
932a401c53aSAleksandr Rybalko }
933a401c53aSAleksandr Rybalko 
934ee97b233SColin Percival void
vga_invalidate_text(struct vt_device * vd,const term_rect_t * area)935ee97b233SColin Percival vga_invalidate_text(struct vt_device *vd, const term_rect_t *area)
936ee97b233SColin Percival {
937ee97b233SColin Percival 	unsigned int col, row;
938ee97b233SColin Percival 	size_t z;
939ee97b233SColin Percival 
940ee97b233SColin Percival 	for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) {
941ee97b233SColin Percival 		for (col = area->tr_begin.tp_col;
942ee97b233SColin Percival 		    col < area->tr_end.tp_col;
943ee97b233SColin Percival 		    ++col) {
944ee97b233SColin Percival 			z = row * PIXEL_WIDTH(VT_FB_MAX_WIDTH) + col;
945dbc7ca59SEd Maste 			if (z >= PIXEL_HEIGHT(VT_FB_MAX_HEIGHT) *
946dbc7ca59SEd Maste 			    PIXEL_WIDTH(VT_FB_MAX_WIDTH))
947dbc7ca59SEd Maste 				continue;
948ee97b233SColin Percival 			if (vd->vd_drawn)
949ee97b233SColin Percival 				vd->vd_drawn[z] = 0;
950ee97b233SColin Percival 			if (vd->vd_drawnfg)
951ee97b233SColin Percival 				vd->vd_drawnfg[z] = 0;
952ee97b233SColin Percival 			if (vd->vd_drawnbg)
953ee97b233SColin Percival 				vd->vd_drawnbg[z] = 0;
954ee97b233SColin Percival 		}
955ee97b233SColin Percival 	}
956ee97b233SColin Percival }
957ee97b233SColin Percival 
958a401c53aSAleksandr Rybalko static void
vga_bitblt_bitmap(struct vt_device * vd,const struct vt_window * vw,const uint8_t * pattern,const uint8_t * mask,unsigned int width,unsigned int height,unsigned int x,unsigned int y,term_color_t fg,term_color_t bg)959631bb572SJean-Sébastien Pédron vga_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw,
960631bb572SJean-Sébastien Pédron     const uint8_t *pattern, const uint8_t *mask,
961631bb572SJean-Sébastien Pédron     unsigned int width, unsigned int height,
962631bb572SJean-Sébastien Pédron     unsigned int x, unsigned int y, term_color_t fg, term_color_t bg)
963631bb572SJean-Sébastien Pédron {
964631bb572SJean-Sébastien Pédron 	unsigned int x1, y1, x2, y2, i, j, src_x, dst_x, x_count;
9657e1770a7SJean-Sébastien Pédron 	uint8_t pattern_2colors;
966631bb572SJean-Sébastien Pédron 
967631bb572SJean-Sébastien Pédron 	/* Align coordinates with the 8-pxels grid. */
9684ed3c0e7SPedro F. Giffuni 	x1 = rounddown(x, VT_VGA_PIXELS_BLOCK);
969631bb572SJean-Sébastien Pédron 	y1 = y;
970631bb572SJean-Sébastien Pédron 
971057b4402SPedro F. Giffuni 	x2 = roundup(x + width, VT_VGA_PIXELS_BLOCK);
972631bb572SJean-Sébastien Pédron 	y2 = y + height;
973631bb572SJean-Sébastien Pédron 	x2 = min(x2, vd->vd_width - 1);
974631bb572SJean-Sébastien Pédron 	y2 = min(y2, vd->vd_height - 1);
975631bb572SJean-Sébastien Pédron 
976631bb572SJean-Sébastien Pédron 	for (j = y1; j < y2; ++j) {
977631bb572SJean-Sébastien Pédron 		src_x = 0;
978631bb572SJean-Sébastien Pédron 		dst_x = x - x1;
979631bb572SJean-Sébastien Pédron 		x_count = VT_VGA_PIXELS_BLOCK - dst_x;
980631bb572SJean-Sébastien Pédron 
9817e1770a7SJean-Sébastien Pédron 		for (i = x1; i < x2; i += VT_VGA_PIXELS_BLOCK) {
982631bb572SJean-Sébastien Pédron 			pattern_2colors = 0;
983631bb572SJean-Sébastien Pédron 
984631bb572SJean-Sébastien Pédron 			vga_copy_bitmap_portion(
9857e1770a7SJean-Sébastien Pédron 			    &pattern_2colors, NULL,
986631bb572SJean-Sébastien Pédron 			    pattern, mask, width,
987631bb572SJean-Sébastien Pédron 			    src_x, dst_x, x_count,
988631bb572SJean-Sébastien Pédron 			    j - y1, 0, 1, fg, bg, 0);
989631bb572SJean-Sébastien Pédron 
990631bb572SJean-Sébastien Pédron 			vga_bitblt_pixels_block_2colors(vd,
991631bb572SJean-Sébastien Pédron 			    &pattern_2colors, fg, bg,
992631bb572SJean-Sébastien Pédron 			    i, j, 1);
993631bb572SJean-Sébastien Pédron 
994631bb572SJean-Sébastien Pédron 			src_x += x_count;
995631bb572SJean-Sébastien Pédron 			dst_x = (dst_x + x_count) % VT_VGA_PIXELS_BLOCK;
9967e1770a7SJean-Sébastien Pédron 			x_count = min(width - src_x, VT_VGA_PIXELS_BLOCK);
997631bb572SJean-Sébastien Pédron 		}
998631bb572SJean-Sébastien Pédron 	}
999631bb572SJean-Sébastien Pédron }
1000631bb572SJean-Sébastien Pédron 
1001631bb572SJean-Sébastien Pédron static void
vga_initialize_graphics(struct vt_device * vd)1002a401c53aSAleksandr Rybalko vga_initialize_graphics(struct vt_device *vd)
1003a401c53aSAleksandr Rybalko {
1004a401c53aSAleksandr Rybalko 	struct vga_softc *sc = vd->vd_softc;
1005a401c53aSAleksandr Rybalko 
1006a401c53aSAleksandr Rybalko 	/* Clock select. */
1007a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP |
1008a401c53aSAleksandr Rybalko 	    VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA);
1009a401c53aSAleksandr Rybalko 	/* Set sequencer clocking and memory mode. */
1010a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE);
1011a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89);
1012a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE);
1013a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM);
1014a401c53aSAleksandr Rybalko 
1015a401c53aSAleksandr Rybalko 	/* Set the graphics controller in graphics mode. */
1016a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS);
1017a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA);
1018a401c53aSAleksandr Rybalko 	/* Program the CRT controller. */
1019a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL);
1020a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f);			/* 760 */
1021a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END);
1022a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f);			/* 640 - 8 */
1023a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK);
1024a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0x50);			/* 640 */
1025a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK);
1026a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2);
1027a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE);
1028a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0x54);			/* 672 */
1029a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE);
1030a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0);
1031a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL);
1032a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b);			/* 523 */
1033a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW);
1034a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 |
1035a401c53aSAleksandr Rybalko 	    VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8);
1036a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE);
1037a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9);
1038a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START);
1039a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0xea);			/* 480 + 10 */
1040a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END);
1041a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c);
1042a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END);
1043a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf);			/* 480 - 1*/
1044a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET);
1045a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0x28);
1046a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK);
1047a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7);			/* 480 + 7 */
1048a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK);
1049a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0x04);
1050a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL);
1051a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW |
1052a401c53aSAleksandr Rybalko 	    VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS);
1053a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE);
1054a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0xff);			/* 480 + 31 */
1055a401c53aSAleksandr Rybalko 
1056a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0);
1057a401c53aSAleksandr Rybalko 
1058a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK);
1059a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 |
1060a401c53aSAleksandr Rybalko 	    VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0);
1061a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT);
1062a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_SEQ_DATA, 0);
1063a401c53aSAleksandr Rybalko 
1064a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET);
1065a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_DATA, 0);
1066a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET);
1067a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_DATA, 0x0f);
1068a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE);
1069a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_DATA, 0);
1070a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE);
1071a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_DATA, 0);
1072a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT);
1073a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_DATA, 0);
1074a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE);
1075a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_DATA, 0);
1076a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE);
1077a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_DATA, 0x0f);
1078a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK);
1079a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GC_DATA, 0xff);
1080a401c53aSAleksandr Rybalko }
1081a401c53aSAleksandr Rybalko 
1082f0e31fe0SRoger Pau Monné static int
vga_initialize(struct vt_device * vd,int textmode)1083a401c53aSAleksandr Rybalko vga_initialize(struct vt_device *vd, int textmode)
1084a401c53aSAleksandr Rybalko {
1085a401c53aSAleksandr Rybalko 	struct vga_softc *sc = vd->vd_softc;
1086a401c53aSAleksandr Rybalko 	uint8_t x;
1087f0e31fe0SRoger Pau Monné 	int timeout;
1088a401c53aSAleksandr Rybalko 
1089a401c53aSAleksandr Rybalko 	/* Make sure the VGA adapter is not in monochrome emulation mode. */
1090a401c53aSAleksandr Rybalko 	x = REG_READ1(sc, VGA_GEN_MISC_OUTPUT_R);
1091a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA);
1092a401c53aSAleksandr Rybalko 
1093a401c53aSAleksandr Rybalko 	/* Unprotect CRTC registers 0-7. */
1094a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END);
1095a401c53aSAleksandr Rybalko 	x = REG_READ1(sc, VGA_CRTC_DATA);
1096a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR);
1097a401c53aSAleksandr Rybalko 
1098a401c53aSAleksandr Rybalko 	/*
1099a401c53aSAleksandr Rybalko 	 * Wait for the vertical retrace.
1100a401c53aSAleksandr Rybalko 	 * NOTE: this code reads the VGA_GEN_INPUT_STAT_1 register, which has
1101a401c53aSAleksandr Rybalko 	 * the side-effect of clearing the internal flip-flip of the attribute
1102a401c53aSAleksandr Rybalko 	 * controller's write register. This means that because this code is
1103a401c53aSAleksandr Rybalko 	 * here, we know for sure that the first write to the attribute
1104a401c53aSAleksandr Rybalko 	 * controller will be a write to the address register. Removing this
1105a401c53aSAleksandr Rybalko 	 * code therefore also removes that guarantee and appropriate measures
1106a401c53aSAleksandr Rybalko 	 * need to be taken.
1107a401c53aSAleksandr Rybalko 	 */
1108f0e31fe0SRoger Pau Monné 	timeout = 10000;
1109a401c53aSAleksandr Rybalko 	do {
1110f0e31fe0SRoger Pau Monné 		DELAY(10);
1111a401c53aSAleksandr Rybalko 		x = REG_READ1(sc, VGA_GEN_INPUT_STAT_1);
1112a401c53aSAleksandr Rybalko 		x &= VGA_GEN_IS1_VR | VGA_GEN_IS1_DE;
1113f0e31fe0SRoger Pau Monné 	} while (x != (VGA_GEN_IS1_VR | VGA_GEN_IS1_DE) && --timeout != 0);
1114f0e31fe0SRoger Pau Monné 	if (timeout == 0) {
1115f0e31fe0SRoger Pau Monné 		printf("Timeout initializing vt_vga\n");
1116f0e31fe0SRoger Pau Monné 		return (ENXIO);
1117f0e31fe0SRoger Pau Monné 	}
1118a401c53aSAleksandr Rybalko 
1119a401c53aSAleksandr Rybalko 	/* Now, disable the sync. signals. */
1120a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL);
1121a401c53aSAleksandr Rybalko 	x = REG_READ1(sc, VGA_CRTC_DATA);
1122a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR);
1123a401c53aSAleksandr Rybalko 
1124a401c53aSAleksandr Rybalko 	/* Asynchronous sequencer reset. */
1125a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET);
1126a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR);
1127a401c53aSAleksandr Rybalko 
1128a401c53aSAleksandr Rybalko 	if (!textmode)
1129a401c53aSAleksandr Rybalko 		vga_initialize_graphics(vd);
1130a401c53aSAleksandr Rybalko 
1131a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN);
1132a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0);
1133a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START);
1134a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO);
1135a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END);
1136a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0);
1137a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH);
1138a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0);
1139a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW);
1140a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0);
1141a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH);
1142a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0);
1143a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW);
1144a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, 0x59);
1145a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC);
1146a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL);
1147a401c53aSAleksandr Rybalko 
1148a401c53aSAleksandr Rybalko 	if (textmode) {
1149a401c53aSAleksandr Rybalko 		/* Set the attribute controller to blink disable. */
1150a401c53aSAleksandr Rybalko 		REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL);
1151a401c53aSAleksandr Rybalko 		REG_WRITE1(sc, VGA_AC_WRITE, 0);
1152a401c53aSAleksandr Rybalko 	} else {
1153a401c53aSAleksandr Rybalko 		/* Set the attribute controller in graphics mode. */
1154a401c53aSAleksandr Rybalko 		REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL);
1155a401c53aSAleksandr Rybalko 		REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA);
1156a401c53aSAleksandr Rybalko 		REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING);
1157a401c53aSAleksandr Rybalko 		REG_WRITE1(sc, VGA_AC_WRITE, 0);
1158a401c53aSAleksandr Rybalko 	}
1159a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0));
1160a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, 0);
1161a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1));
11625e251aecSJean-Sébastien Pédron 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B);
1163a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2));
1164a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G);
1165a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3));
11665e251aecSJean-Sébastien Pédron 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B);
1167a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4));
11685e251aecSJean-Sébastien Pédron 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R);
1169a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5));
1170a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B);
1171a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6));
11725e251aecSJean-Sébastien Pédron 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R);
1173a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7));
1174a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B);
11755e251aecSJean-Sébastien Pédron 
1176a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8));
1177a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
1178a401c53aSAleksandr Rybalko 	    VGA_AC_PAL_SB);
1179a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9));
1180a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
11815e251aecSJean-Sébastien Pédron 	    VGA_AC_PAL_SB | VGA_AC_PAL_B);
1182a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10));
1183a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
1184a401c53aSAleksandr Rybalko 	    VGA_AC_PAL_SB | VGA_AC_PAL_G);
1185a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11));
1186a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
11875e251aecSJean-Sébastien Pédron 	    VGA_AC_PAL_SB | VGA_AC_PAL_G | VGA_AC_PAL_B);
1188a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12));
1189a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
11905e251aecSJean-Sébastien Pédron 	    VGA_AC_PAL_SB | VGA_AC_PAL_R);
1191a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13));
1192a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
1193a401c53aSAleksandr Rybalko 	    VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_B);
1194a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14));
1195a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
11965e251aecSJean-Sébastien Pédron 	    VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G);
1197a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15));
1198a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
1199a401c53aSAleksandr Rybalko 	    VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B);
12005e251aecSJean-Sébastien Pédron 
1201a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR);
1202a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, 0);
1203a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE);
1204a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, 0x0f);
1205a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT);
1206a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_AC_WRITE, 0);
1207a401c53aSAleksandr Rybalko 
1208a401c53aSAleksandr Rybalko 	if (!textmode) {
1209a401c53aSAleksandr Rybalko 		u_int ofs;
1210a401c53aSAleksandr Rybalko 
1211a401c53aSAleksandr Rybalko 		/*
1212a401c53aSAleksandr Rybalko 		 * Done.  Clear the frame buffer.  All bit planes are
1213a401c53aSAleksandr Rybalko 		 * enabled, so a single-paged loop should clear all
1214a401c53aSAleksandr Rybalko 		 * planes.
1215a401c53aSAleksandr Rybalko 		 */
1216a401c53aSAleksandr Rybalko 		for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) {
1217a401c53aSAleksandr Rybalko 			MEM_WRITE1(sc, ofs, 0);
1218a401c53aSAleksandr Rybalko 		}
1219a401c53aSAleksandr Rybalko 	}
1220a401c53aSAleksandr Rybalko 
1221a401c53aSAleksandr Rybalko 	/* Re-enable the sequencer. */
1222a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET);
1223a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR);
1224a401c53aSAleksandr Rybalko 	/* Re-enable the sync signals. */
1225a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL);
1226a401c53aSAleksandr Rybalko 	x = REG_READ1(sc, VGA_CRTC_DATA);
1227a401c53aSAleksandr Rybalko 	REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR);
1228a401c53aSAleksandr Rybalko 
1229a401c53aSAleksandr Rybalko 	if (!textmode) {
1230a401c53aSAleksandr Rybalko 		/* Switch to write mode 3, because we'll mainly do bitblt. */
1231a401c53aSAleksandr Rybalko 		REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE);
1232a401c53aSAleksandr Rybalko 		REG_WRITE1(sc, VGA_GC_DATA, 3);
1233af9f67eaSJean-Sébastien Pédron 		sc->vga_wmode = 3;
1234af9f67eaSJean-Sébastien Pédron 
1235af9f67eaSJean-Sébastien Pédron 		/*
1236af9f67eaSJean-Sébastien Pédron 		 * In Write Mode 3, Enable Set/Reset is ignored, but we
1237af9f67eaSJean-Sébastien Pédron 		 * use Write Mode 0 to write a group of 8 pixels using
1238af9f67eaSJean-Sébastien Pédron 		 * 3 or more colors. In this case, we want to disable
1239af9f67eaSJean-Sébastien Pédron 		 * Set/Reset: set Enable Set/Reset to 0.
1240af9f67eaSJean-Sébastien Pédron 		 */
1241a401c53aSAleksandr Rybalko 		REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET);
1242af9f67eaSJean-Sébastien Pédron 		REG_WRITE1(sc, VGA_GC_DATA, 0x00);
1243bdcaf97cSJean-Sébastien Pédron 
1244bdcaf97cSJean-Sébastien Pédron 		/*
1245bdcaf97cSJean-Sébastien Pédron 		 * Clear the colors we think are loaded into Set/Reset or
1246bdcaf97cSJean-Sébastien Pédron 		 * the latches.
1247bdcaf97cSJean-Sébastien Pédron 		 */
1248bdcaf97cSJean-Sébastien Pédron 		sc->vga_curfg = sc->vga_curbg = 0xff;
1249a401c53aSAleksandr Rybalko 	}
1250f0e31fe0SRoger Pau Monné 
1251f0e31fe0SRoger Pau Monné 	return (0);
1252a401c53aSAleksandr Rybalko }
1253a401c53aSAleksandr Rybalko 
1254c2272faaSRoger Pau Monné static bool
vga_acpi_disabled(void)1255c2272faaSRoger Pau Monné vga_acpi_disabled(void)
1256c2272faaSRoger Pau Monné {
125728ebccd5SKonstantin Belousov #if defined(__amd64__) || defined(__i386__)
1258c2272faaSRoger Pau Monné 	uint16_t flags;
12598f62926eSRoger Pau Monné 	int ignore;
12608f62926eSRoger Pau Monné 
126105188320SRoger Pau Monné 	/*
126205188320SRoger Pau Monné 	 * Ignore the flag on real hardware: there's a lot of buggy firmware
126305188320SRoger Pau Monné 	 * that will wrongly set it.
126405188320SRoger Pau Monné 	 */
126505188320SRoger Pau Monné 	ignore = (vm_guest == VM_GUEST_NO);
12668f62926eSRoger Pau Monné 	TUNABLE_INT_FETCH("hw.vga.acpi_ignore_no_vga", &ignore);
12677705dd4dSKonstantin Belousov 	if (ignore || !acpi_get_fadt_bootflags(&flags))
12688f62926eSRoger Pau Monné  		return (false);
12697705dd4dSKonstantin Belousov 	return ((flags & ACPI_FADT_NO_VGA) != 0);
12707705dd4dSKonstantin Belousov #else
1271c2272faaSRoger Pau Monné 	return (false);
1272c2272faaSRoger Pau Monné #endif
1273c2272faaSRoger Pau Monné }
1274c2272faaSRoger Pau Monné 
1275a401c53aSAleksandr Rybalko static int
vga_probe(struct vt_device * vd)1276a401c53aSAleksandr Rybalko vga_probe(struct vt_device *vd)
1277a401c53aSAleksandr Rybalko {
1278a401c53aSAleksandr Rybalko 
1279c2272faaSRoger Pau Monné 	return (vga_acpi_disabled() ? CN_DEAD : CN_INTERNAL);
1280a401c53aSAleksandr Rybalko }
1281a401c53aSAleksandr Rybalko 
1282a401c53aSAleksandr Rybalko static int
vga_init(struct vt_device * vd)1283a401c53aSAleksandr Rybalko vga_init(struct vt_device *vd)
1284a401c53aSAleksandr Rybalko {
1285a401c53aSAleksandr Rybalko 	struct vga_softc *sc;
1286a401c53aSAleksandr Rybalko 	int textmode;
1287a401c53aSAleksandr Rybalko 
1288a401c53aSAleksandr Rybalko 	if (vd->vd_softc == NULL)
1289a401c53aSAleksandr Rybalko 		vd->vd_softc = (void *)&vga_conssoftc;
1290a401c53aSAleksandr Rybalko 	sc = vd->vd_softc;
1291a401c53aSAleksandr Rybalko 
129276e2f976SJean-Sébastien Pédron 	if (vd->vd_flags & VDF_DOWNGRADE && vd->vd_video_dev != NULL)
129376e2f976SJean-Sébastien Pédron 		vga_pci_repost(vd->vd_video_dev);
129476e2f976SJean-Sébastien Pédron 
1295a401c53aSAleksandr Rybalko #if defined(__amd64__) || defined(__i386__)
1296a401c53aSAleksandr Rybalko 	sc->vga_fb_tag = X86_BUS_SPACE_MEM;
1297a401c53aSAleksandr Rybalko 	sc->vga_reg_tag = X86_BUS_SPACE_IO;
1298a401c53aSAleksandr Rybalko #else
1299a401c53aSAleksandr Rybalko # error "Architecture not yet supported!"
1300a401c53aSAleksandr Rybalko #endif
1301a401c53aSAleksandr Rybalko 
13027ef5e8bcSMarcel Moolenaar 	bus_space_map(sc->vga_reg_tag, VGA_REG_BASE, VGA_REG_SIZE, 0,
13037ef5e8bcSMarcel Moolenaar 	    &sc->vga_reg_handle);
13047ef5e8bcSMarcel Moolenaar 
13059a4a2c61SSepherosa Ziehau 	/*
13069a4a2c61SSepherosa Ziehau 	 * If "hw.vga.textmode" is not set and we're running on hypervisor,
13079a4a2c61SSepherosa Ziehau 	 * we use text mode by default, this is because when we're on
13089a4a2c61SSepherosa Ziehau 	 * hypervisor, vt(4) is usually much slower in graphics mode than
13099a4a2c61SSepherosa Ziehau 	 * in text mode, especially when we're on Hyper-V.
13109a4a2c61SSepherosa Ziehau 	 */
13119a4a2c61SSepherosa Ziehau 	textmode = vm_guest != VM_GUEST_NO;
1312a401c53aSAleksandr Rybalko 	TUNABLE_INT_FETCH("hw.vga.textmode", &textmode);
1313a401c53aSAleksandr Rybalko 	if (textmode) {
1314a401c53aSAleksandr Rybalko 		vd->vd_flags |= VDF_TEXTMODE;
1315a401c53aSAleksandr Rybalko 		vd->vd_width = 80;
1316a401c53aSAleksandr Rybalko 		vd->vd_height = 25;
13176280434fSMarcel Moolenaar 		bus_space_map(sc->vga_fb_tag, VGA_TXT_BASE, VGA_TXT_SIZE, 0,
13186280434fSMarcel Moolenaar 		    &sc->vga_fb_handle);
1319a401c53aSAleksandr Rybalko 	} else {
1320a401c53aSAleksandr Rybalko 		vd->vd_width = VT_VGA_WIDTH;
1321a401c53aSAleksandr Rybalko 		vd->vd_height = VT_VGA_HEIGHT;
13226280434fSMarcel Moolenaar 		bus_space_map(sc->vga_fb_tag, VGA_MEM_BASE, VGA_MEM_SIZE, 0,
13236280434fSMarcel Moolenaar 		    &sc->vga_fb_handle);
1324a401c53aSAleksandr Rybalko 	}
1325f0e31fe0SRoger Pau Monné 	if (vga_initialize(vd, textmode) != 0)
1326f0e31fe0SRoger Pau Monné 		return (CN_DEAD);
1327acb332a8SRoger Pau Monné 	sc->vga_enabled = true;
1328a401c53aSAleksandr Rybalko 
1329a401c53aSAleksandr Rybalko 	return (CN_INTERNAL);
1330a401c53aSAleksandr Rybalko }
1331a401c53aSAleksandr Rybalko 
1332a401c53aSAleksandr Rybalko static void
vga_postswitch(struct vt_device * vd)1333a401c53aSAleksandr Rybalko vga_postswitch(struct vt_device *vd)
1334a401c53aSAleksandr Rybalko {
1335a401c53aSAleksandr Rybalko 
1336a401c53aSAleksandr Rybalko 	/* Reinit VGA mode, to restore view after app which change mode. */
1337a401c53aSAleksandr Rybalko 	vga_initialize(vd, (vd->vd_flags & VDF_TEXTMODE));
1338a401c53aSAleksandr Rybalko 	/* Ask vt(9) to update chars on visible area. */
1339a401c53aSAleksandr Rybalko 	vd->vd_flags |= VDF_INVALID;
1340a401c53aSAleksandr Rybalko }
1341acb332a8SRoger Pau Monné 
1342acb332a8SRoger Pau Monné /* Dummy NewBus functions to reserve the resources used by the vt_vga driver */
1343acb332a8SRoger Pau Monné static void
vtvga_identify(driver_t * driver,device_t parent)1344acb332a8SRoger Pau Monné vtvga_identify(driver_t *driver, device_t parent)
1345acb332a8SRoger Pau Monné {
1346acb332a8SRoger Pau Monné 
1347acb332a8SRoger Pau Monné 	if (!vga_conssoftc.vga_enabled)
1348acb332a8SRoger Pau Monné 		return;
1349acb332a8SRoger Pau Monné 
1350acb332a8SRoger Pau Monné 	if (BUS_ADD_CHILD(parent, 0, driver->name, 0) == NULL)
1351acb332a8SRoger Pau Monné 		panic("Unable to attach vt_vga console");
1352acb332a8SRoger Pau Monné }
1353acb332a8SRoger Pau Monné 
1354acb332a8SRoger Pau Monné static int
vtvga_probe(device_t dev)1355acb332a8SRoger Pau Monné vtvga_probe(device_t dev)
1356acb332a8SRoger Pau Monné {
1357acb332a8SRoger Pau Monné 
1358bae1c14dSRui Paulo 	device_set_desc(dev, "VT VGA driver");
1359bae1c14dSRui Paulo 
1360acb332a8SRoger Pau Monné 	return (BUS_PROBE_NOWILDCARD);
1361acb332a8SRoger Pau Monné }
1362acb332a8SRoger Pau Monné 
1363acb332a8SRoger Pau Monné static int
vtvga_attach(device_t dev)1364acb332a8SRoger Pau Monné vtvga_attach(device_t dev)
1365acb332a8SRoger Pau Monné {
1366acb332a8SRoger Pau Monné 	struct resource *pseudo_phys_res;
1367acb332a8SRoger Pau Monné 	int res_id;
1368acb332a8SRoger Pau Monné 
1369acb332a8SRoger Pau Monné 	res_id = 0;
1370acb332a8SRoger Pau Monné 	pseudo_phys_res = bus_alloc_resource(dev, SYS_RES_MEMORY,
1371bc59086cSRoger Pau Monné 	    &res_id, VGA_MEM_BASE, VGA_MEM_BASE + VGA_MEM_SIZE - 1,
1372acb332a8SRoger Pau Monné 	    VGA_MEM_SIZE, RF_ACTIVE);
1373acb332a8SRoger Pau Monné 	if (pseudo_phys_res == NULL)
1374acb332a8SRoger Pau Monné 		panic("Unable to reserve vt_vga memory");
1375acb332a8SRoger Pau Monné 	return (0);
1376acb332a8SRoger Pau Monné }
1377acb332a8SRoger Pau Monné 
1378acb332a8SRoger Pau Monné /*-------------------- Private Device Attachment Data  -----------------------*/
1379acb332a8SRoger Pau Monné static device_method_t vtvga_methods[] = {
1380acb332a8SRoger Pau Monné 	/* Device interface */
1381acb332a8SRoger Pau Monné 	DEVMETHOD(device_identify,	vtvga_identify),
1382acb332a8SRoger Pau Monné 	DEVMETHOD(device_probe,         vtvga_probe),
1383acb332a8SRoger Pau Monné 	DEVMETHOD(device_attach,        vtvga_attach),
1384acb332a8SRoger Pau Monné 
1385acb332a8SRoger Pau Monné 	DEVMETHOD_END
1386acb332a8SRoger Pau Monné };
1387acb332a8SRoger Pau Monné 
1388acb332a8SRoger Pau Monné DEFINE_CLASS_0(vtvga, vtvga_driver, vtvga_methods, 0);
1389acb332a8SRoger Pau Monné 
13903af6e882SJohn Baldwin DRIVER_MODULE(vtvga, nexus, vtvga_driver, NULL, NULL);
1391