1 /*- 2 * Copyright (c) 2005 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Copyright (c) 2009 The FreeBSD Foundation 6 * All rights reserved. 7 * 8 * Portions of this software were developed by Ed Schouten 9 * under sponsorship from the FreeBSD Foundation. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <sys/param.h> 37 #include <sys/kernel.h> 38 #include <sys/systm.h> 39 #include <sys/bus.h> 40 #include <sys/module.h> 41 #include <sys/rman.h> 42 43 #include <dev/vt/vt.h> 44 #include <dev/vt/hw/vga/vt_vga_reg.h> 45 #include <dev/pci/pcivar.h> 46 47 #include <machine/bus.h> 48 49 struct vga_softc { 50 bus_space_tag_t vga_fb_tag; 51 bus_space_handle_t vga_fb_handle; 52 bus_space_tag_t vga_reg_tag; 53 bus_space_handle_t vga_reg_handle; 54 int vga_wmode; 55 term_color_t vga_curfg, vga_curbg; 56 boolean_t vga_enabled; 57 }; 58 59 /* Convenience macros. */ 60 #define MEM_READ1(sc, ofs) \ 61 bus_space_read_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs) 62 #define MEM_WRITE1(sc, ofs, val) \ 63 bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val) 64 #define REG_READ1(sc, reg) \ 65 bus_space_read_1(sc->vga_reg_tag, sc->vga_reg_handle, reg) 66 #define REG_WRITE1(sc, reg, val) \ 67 bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val) 68 69 #define VT_VGA_WIDTH 640 70 #define VT_VGA_HEIGHT 480 71 #define VT_VGA_MEMSIZE (VT_VGA_WIDTH * VT_VGA_HEIGHT / 8) 72 73 /* 74 * VGA is designed to handle 8 pixels at a time (8 pixels in one byte of 75 * memory). 76 */ 77 #define VT_VGA_PIXELS_BLOCK 8 78 79 /* 80 * We use an off-screen addresses to: 81 * o store the background color; 82 * o store pixels pattern. 83 * Those addresses are then loaded in the latches once. 84 */ 85 #define VT_VGA_BGCOLOR_OFFSET VT_VGA_MEMSIZE 86 87 static vd_probe_t vga_probe; 88 static vd_init_t vga_init; 89 static vd_blank_t vga_blank; 90 static vd_bitblt_text_t vga_bitblt_text; 91 static vd_bitblt_bmp_t vga_bitblt_bitmap; 92 static vd_drawrect_t vga_drawrect; 93 static vd_setpixel_t vga_setpixel; 94 static vd_postswitch_t vga_postswitch; 95 96 static const struct vt_driver vt_vga_driver = { 97 .vd_name = "vga", 98 .vd_probe = vga_probe, 99 .vd_init = vga_init, 100 .vd_blank = vga_blank, 101 .vd_bitblt_text = vga_bitblt_text, 102 .vd_bitblt_bmp = vga_bitblt_bitmap, 103 .vd_drawrect = vga_drawrect, 104 .vd_setpixel = vga_setpixel, 105 .vd_postswitch = vga_postswitch, 106 .vd_priority = VD_PRIORITY_GENERIC, 107 }; 108 109 /* 110 * Driver supports both text mode and graphics mode. Make sure the 111 * buffer is always big enough to support both. 112 */ 113 static struct vga_softc vga_conssoftc; 114 VT_DRIVER_DECLARE(vt_vga, vt_vga_driver); 115 116 static inline void 117 vga_setwmode(struct vt_device *vd, int wmode) 118 { 119 struct vga_softc *sc = vd->vd_softc; 120 121 if (sc->vga_wmode == wmode) 122 return; 123 124 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 125 REG_WRITE1(sc, VGA_GC_DATA, wmode); 126 sc->vga_wmode = wmode; 127 128 switch (wmode) { 129 case 3: 130 /* Re-enable all plans. */ 131 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 132 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 133 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 134 break; 135 } 136 } 137 138 static inline void 139 vga_setfg(struct vt_device *vd, term_color_t color) 140 { 141 struct vga_softc *sc = vd->vd_softc; 142 143 vga_setwmode(vd, 3); 144 145 if (sc->vga_curfg == color) 146 return; 147 148 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 149 REG_WRITE1(sc, VGA_GC_DATA, color); 150 sc->vga_curfg = color; 151 } 152 153 static inline void 154 vga_setbg(struct vt_device *vd, term_color_t color) 155 { 156 struct vga_softc *sc = vd->vd_softc; 157 158 vga_setwmode(vd, 3); 159 160 if (sc->vga_curbg == color) 161 return; 162 163 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 164 REG_WRITE1(sc, VGA_GC_DATA, color); 165 166 /* 167 * Write 8 pixels using the background color to an off-screen 168 * byte in the video memory. 169 */ 170 MEM_WRITE1(sc, VT_VGA_BGCOLOR_OFFSET, 0xff); 171 172 /* 173 * Read those 8 pixels back to load the background color in the 174 * latches register. 175 */ 176 MEM_READ1(sc, VT_VGA_BGCOLOR_OFFSET); 177 178 sc->vga_curbg = color; 179 180 /* 181 * The Set/Reset register doesn't contain the fg color anymore, 182 * store an invalid color. 183 */ 184 sc->vga_curfg = 0xff; 185 } 186 187 /* 188 * Binary searchable table for Unicode to CP437 conversion. 189 */ 190 191 struct unicp437 { 192 uint16_t unicode_base; 193 uint8_t cp437_base; 194 uint8_t length; 195 }; 196 197 static const struct unicp437 cp437table[] = { 198 { 0x0020, 0x20, 0x5e }, { 0x00a0, 0x20, 0x00 }, 199 { 0x00a1, 0xad, 0x00 }, { 0x00a2, 0x9b, 0x00 }, 200 { 0x00a3, 0x9c, 0x00 }, { 0x00a5, 0x9d, 0x00 }, 201 { 0x00a7, 0x15, 0x00 }, { 0x00aa, 0xa6, 0x00 }, 202 { 0x00ab, 0xae, 0x00 }, { 0x00ac, 0xaa, 0x00 }, 203 { 0x00b0, 0xf8, 0x00 }, { 0x00b1, 0xf1, 0x00 }, 204 { 0x00b2, 0xfd, 0x00 }, { 0x00b5, 0xe6, 0x00 }, 205 { 0x00b6, 0x14, 0x00 }, { 0x00b7, 0xfa, 0x00 }, 206 { 0x00ba, 0xa7, 0x00 }, { 0x00bb, 0xaf, 0x00 }, 207 { 0x00bc, 0xac, 0x00 }, { 0x00bd, 0xab, 0x00 }, 208 { 0x00bf, 0xa8, 0x00 }, { 0x00c4, 0x8e, 0x01 }, 209 { 0x00c6, 0x92, 0x00 }, { 0x00c7, 0x80, 0x00 }, 210 { 0x00c9, 0x90, 0x00 }, { 0x00d1, 0xa5, 0x00 }, 211 { 0x00d6, 0x99, 0x00 }, { 0x00dc, 0x9a, 0x00 }, 212 { 0x00df, 0xe1, 0x00 }, { 0x00e0, 0x85, 0x00 }, 213 { 0x00e1, 0xa0, 0x00 }, { 0x00e2, 0x83, 0x00 }, 214 { 0x00e4, 0x84, 0x00 }, { 0x00e5, 0x86, 0x00 }, 215 { 0x00e6, 0x91, 0x00 }, { 0x00e7, 0x87, 0x00 }, 216 { 0x00e8, 0x8a, 0x00 }, { 0x00e9, 0x82, 0x00 }, 217 { 0x00ea, 0x88, 0x01 }, { 0x00ec, 0x8d, 0x00 }, 218 { 0x00ed, 0xa1, 0x00 }, { 0x00ee, 0x8c, 0x00 }, 219 { 0x00ef, 0x8b, 0x00 }, { 0x00f0, 0xeb, 0x00 }, 220 { 0x00f1, 0xa4, 0x00 }, { 0x00f2, 0x95, 0x00 }, 221 { 0x00f3, 0xa2, 0x00 }, { 0x00f4, 0x93, 0x00 }, 222 { 0x00f6, 0x94, 0x00 }, { 0x00f7, 0xf6, 0x00 }, 223 { 0x00f8, 0xed, 0x00 }, { 0x00f9, 0x97, 0x00 }, 224 { 0x00fa, 0xa3, 0x00 }, { 0x00fb, 0x96, 0x00 }, 225 { 0x00fc, 0x81, 0x00 }, { 0x00ff, 0x98, 0x00 }, 226 { 0x0192, 0x9f, 0x00 }, { 0x0393, 0xe2, 0x00 }, 227 { 0x0398, 0xe9, 0x00 }, { 0x03a3, 0xe4, 0x00 }, 228 { 0x03a6, 0xe8, 0x00 }, { 0x03a9, 0xea, 0x00 }, 229 { 0x03b1, 0xe0, 0x01 }, { 0x03b4, 0xeb, 0x00 }, 230 { 0x03b5, 0xee, 0x00 }, { 0x03bc, 0xe6, 0x00 }, 231 { 0x03c0, 0xe3, 0x00 }, { 0x03c3, 0xe5, 0x00 }, 232 { 0x03c4, 0xe7, 0x00 }, { 0x03c6, 0xed, 0x00 }, 233 { 0x03d5, 0xed, 0x00 }, { 0x2010, 0x2d, 0x00 }, 234 { 0x2014, 0x2d, 0x00 }, { 0x2018, 0x60, 0x00 }, 235 { 0x2019, 0x27, 0x00 }, { 0x201c, 0x22, 0x00 }, 236 { 0x201d, 0x22, 0x00 }, { 0x2022, 0x07, 0x00 }, 237 { 0x203c, 0x13, 0x00 }, { 0x207f, 0xfc, 0x00 }, 238 { 0x20a7, 0x9e, 0x00 }, { 0x20ac, 0xee, 0x00 }, 239 { 0x2126, 0xea, 0x00 }, { 0x2190, 0x1b, 0x00 }, 240 { 0x2191, 0x18, 0x00 }, { 0x2192, 0x1a, 0x00 }, 241 { 0x2193, 0x19, 0x00 }, { 0x2194, 0x1d, 0x00 }, 242 { 0x2195, 0x12, 0x00 }, { 0x21a8, 0x17, 0x00 }, 243 { 0x2202, 0xeb, 0x00 }, { 0x2208, 0xee, 0x00 }, 244 { 0x2211, 0xe4, 0x00 }, { 0x2212, 0x2d, 0x00 }, 245 { 0x2219, 0xf9, 0x00 }, { 0x221a, 0xfb, 0x00 }, 246 { 0x221e, 0xec, 0x00 }, { 0x221f, 0x1c, 0x00 }, 247 { 0x2229, 0xef, 0x00 }, { 0x2248, 0xf7, 0x00 }, 248 { 0x2261, 0xf0, 0x00 }, { 0x2264, 0xf3, 0x00 }, 249 { 0x2265, 0xf2, 0x00 }, { 0x2302, 0x7f, 0x00 }, 250 { 0x2310, 0xa9, 0x00 }, { 0x2320, 0xf4, 0x00 }, 251 { 0x2321, 0xf5, 0x00 }, { 0x2500, 0xc4, 0x00 }, 252 { 0x2502, 0xb3, 0x00 }, { 0x250c, 0xda, 0x00 }, 253 { 0x2510, 0xbf, 0x00 }, { 0x2514, 0xc0, 0x00 }, 254 { 0x2518, 0xd9, 0x00 }, { 0x251c, 0xc3, 0x00 }, 255 { 0x2524, 0xb4, 0x00 }, { 0x252c, 0xc2, 0x00 }, 256 { 0x2534, 0xc1, 0x00 }, { 0x253c, 0xc5, 0x00 }, 257 { 0x2550, 0xcd, 0x00 }, { 0x2551, 0xba, 0x00 }, 258 { 0x2552, 0xd5, 0x00 }, { 0x2553, 0xd6, 0x00 }, 259 { 0x2554, 0xc9, 0x00 }, { 0x2555, 0xb8, 0x00 }, 260 { 0x2556, 0xb7, 0x00 }, { 0x2557, 0xbb, 0x00 }, 261 { 0x2558, 0xd4, 0x00 }, { 0x2559, 0xd3, 0x00 }, 262 { 0x255a, 0xc8, 0x00 }, { 0x255b, 0xbe, 0x00 }, 263 { 0x255c, 0xbd, 0x00 }, { 0x255d, 0xbc, 0x00 }, 264 { 0x255e, 0xc6, 0x01 }, { 0x2560, 0xcc, 0x00 }, 265 { 0x2561, 0xb5, 0x00 }, { 0x2562, 0xb6, 0x00 }, 266 { 0x2563, 0xb9, 0x00 }, { 0x2564, 0xd1, 0x01 }, 267 { 0x2566, 0xcb, 0x00 }, { 0x2567, 0xcf, 0x00 }, 268 { 0x2568, 0xd0, 0x00 }, { 0x2569, 0xca, 0x00 }, 269 { 0x256a, 0xd8, 0x00 }, { 0x256b, 0xd7, 0x00 }, 270 { 0x256c, 0xce, 0x00 }, { 0x2580, 0xdf, 0x00 }, 271 { 0x2584, 0xdc, 0x00 }, { 0x2588, 0xdb, 0x00 }, 272 { 0x258c, 0xdd, 0x00 }, { 0x2590, 0xde, 0x00 }, 273 { 0x2591, 0xb0, 0x02 }, { 0x25a0, 0xfe, 0x00 }, 274 { 0x25ac, 0x16, 0x00 }, { 0x25b2, 0x1e, 0x00 }, 275 { 0x25ba, 0x10, 0x00 }, { 0x25bc, 0x1f, 0x00 }, 276 { 0x25c4, 0x11, 0x00 }, { 0x25cb, 0x09, 0x00 }, 277 { 0x25d8, 0x08, 0x00 }, { 0x25d9, 0x0a, 0x00 }, 278 { 0x263a, 0x01, 0x01 }, { 0x263c, 0x0f, 0x00 }, 279 { 0x2640, 0x0c, 0x00 }, { 0x2642, 0x0b, 0x00 }, 280 { 0x2660, 0x06, 0x00 }, { 0x2663, 0x05, 0x00 }, 281 { 0x2665, 0x03, 0x01 }, { 0x266a, 0x0d, 0x00 }, 282 { 0x266c, 0x0e, 0x00 }, 283 }; 284 285 static uint8_t 286 vga_get_cp437(term_char_t c) 287 { 288 int min, mid, max; 289 290 min = 0; 291 max = (sizeof(cp437table) / sizeof(struct unicp437)) - 1; 292 293 if (c < cp437table[0].unicode_base || 294 c > cp437table[max].unicode_base + cp437table[max].length) 295 return '?'; 296 297 while (max >= min) { 298 mid = (min + max) / 2; 299 if (c < cp437table[mid].unicode_base) 300 max = mid - 1; 301 else if (c > cp437table[mid].unicode_base + 302 cp437table[mid].length) 303 min = mid + 1; 304 else 305 return (c - cp437table[mid].unicode_base + 306 cp437table[mid].cp437_base); 307 } 308 309 return '?'; 310 } 311 312 static void 313 vga_blank(struct vt_device *vd, term_color_t color) 314 { 315 struct vga_softc *sc = vd->vd_softc; 316 u_int ofs; 317 318 vga_setfg(vd, color); 319 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) 320 MEM_WRITE1(sc, ofs, 0xff); 321 } 322 323 static inline void 324 vga_bitblt_put(struct vt_device *vd, u_long dst, term_color_t color, 325 uint8_t v) 326 { 327 struct vga_softc *sc = vd->vd_softc; 328 329 /* Skip empty writes, in order to avoid palette changes. */ 330 if (v != 0x00) { 331 vga_setfg(vd, color); 332 /* 333 * When this MEM_READ1() gets disabled, all sorts of 334 * artifacts occur. This is because this read loads the 335 * set of 8 pixels that are about to be changed. There 336 * is one scenario where we can avoid the read, namely 337 * if all pixels are about to be overwritten anyway. 338 */ 339 if (v != 0xff) { 340 MEM_READ1(sc, dst); 341 342 /* The bg color was trashed by the reads. */ 343 sc->vga_curbg = 0xff; 344 } 345 MEM_WRITE1(sc, dst, v); 346 } 347 } 348 349 static void 350 vga_setpixel(struct vt_device *vd, int x, int y, term_color_t color) 351 { 352 353 if (vd->vd_flags & VDF_TEXTMODE) 354 return; 355 356 vga_bitblt_put(vd, (y * VT_VGA_WIDTH / 8) + (x / 8), color, 357 0x80 >> (x % 8)); 358 } 359 360 static void 361 vga_drawrect(struct vt_device *vd, int x1, int y1, int x2, int y2, int fill, 362 term_color_t color) 363 { 364 int x, y; 365 366 if (vd->vd_flags & VDF_TEXTMODE) 367 return; 368 369 for (y = y1; y <= y2; y++) { 370 if (fill || (y == y1) || (y == y2)) { 371 for (x = x1; x <= x2; x++) 372 vga_setpixel(vd, x, y, color); 373 } else { 374 vga_setpixel(vd, x1, y, color); 375 vga_setpixel(vd, x2, y, color); 376 } 377 } 378 } 379 380 static void 381 vga_compute_shifted_pattern(const uint8_t *src, unsigned int bytes, 382 unsigned int src_x, unsigned int x_count, unsigned int dst_x, 383 uint8_t *pattern, uint8_t *mask) 384 { 385 unsigned int n; 386 387 n = src_x / 8; 388 389 /* 390 * This mask has bits set, where a pixel (ether 0 or 1) 391 * comes from the source bitmap. 392 */ 393 if (mask != NULL) { 394 *mask = (0xff 395 >> (8 - x_count)) 396 << (8 - x_count - dst_x); 397 } 398 399 if (n == (src_x + x_count - 1) / 8) { 400 /* All the pixels we want are in the same byte. */ 401 *pattern = src[n]; 402 if (dst_x >= src_x) 403 *pattern >>= (dst_x - src_x % 8); 404 else 405 *pattern <<= (src_x % 8 - dst_x); 406 } else { 407 /* The pixels we want are split into two bytes. */ 408 if (dst_x >= src_x % 8) { 409 *pattern = 410 src[n] << (8 - dst_x - src_x % 8) | 411 src[n + 1] >> (dst_x - src_x % 8); 412 } else { 413 *pattern = 414 src[n] << (src_x % 8 - dst_x) | 415 src[n + 1] >> (8 - src_x % 8 - dst_x); 416 } 417 } 418 } 419 420 static void 421 vga_copy_bitmap_portion(uint8_t *pattern_2colors, uint8_t *pattern_ncolors, 422 const uint8_t *src, const uint8_t *src_mask, unsigned int src_width, 423 unsigned int src_x, unsigned int dst_x, unsigned int x_count, 424 unsigned int src_y, unsigned int dst_y, unsigned int y_count, 425 term_color_t fg, term_color_t bg, int overwrite) 426 { 427 unsigned int i, bytes; 428 uint8_t pattern, relevant_bits, mask; 429 430 bytes = (src_width + 7) / 8; 431 432 for (i = 0; i < y_count; ++i) { 433 vga_compute_shifted_pattern(src + (src_y + i) * bytes, 434 bytes, src_x, x_count, dst_x, &pattern, &relevant_bits); 435 436 if (src_mask == NULL) { 437 /* 438 * No src mask. Consider that all wanted bits 439 * from the source are "authoritative". 440 */ 441 mask = relevant_bits; 442 } else { 443 /* 444 * There's an src mask. We shift it the same way 445 * we shifted the source pattern. 446 */ 447 vga_compute_shifted_pattern( 448 src_mask + (src_y + i) * bytes, 449 bytes, src_x, x_count, dst_x, 450 &mask, NULL); 451 452 /* Now, only keep the wanted bits among them. */ 453 mask &= relevant_bits; 454 } 455 456 /* 457 * Clear bits from the pattern which must be 458 * transparent, according to the source mask. 459 */ 460 pattern &= mask; 461 462 /* Set the bits in the 2-colors array. */ 463 if (overwrite) 464 pattern_2colors[dst_y + i] &= ~mask; 465 pattern_2colors[dst_y + i] |= pattern; 466 467 if (pattern_ncolors == NULL) 468 continue; 469 470 /* 471 * Set the same bits in the n-colors array. This one 472 * supports transparency, when a given bit is cleared in 473 * all colors. 474 */ 475 if (overwrite) { 476 /* 477 * Ensure that the pixels used by this bitmap are 478 * cleared in other colors. 479 */ 480 for (int j = 0; j < 16; ++j) 481 pattern_ncolors[(dst_y + i) * 16 + j] &= 482 ~mask; 483 } 484 pattern_ncolors[(dst_y + i) * 16 + fg] |= pattern; 485 pattern_ncolors[(dst_y + i) * 16 + bg] |= (~pattern & mask); 486 } 487 } 488 489 static void 490 vga_bitblt_pixels_block_2colors(struct vt_device *vd, const uint8_t *masks, 491 term_color_t fg, term_color_t bg, 492 unsigned int x, unsigned int y, unsigned int height) 493 { 494 unsigned int i, offset; 495 struct vga_softc *sc; 496 497 /* 498 * The great advantage of Write Mode 3 is that we just need 499 * to load the foreground in the Set/Reset register, load the 500 * background color in the latches register (this is done 501 * through a write in offscreen memory followed by a read of 502 * that data), then write the pattern to video memory. This 503 * pattern indicates if the pixel should use the foreground 504 * color (bit set) or the background color (bit cleared). 505 */ 506 507 vga_setbg(vd, bg); 508 vga_setfg(vd, fg); 509 510 sc = vd->vd_softc; 511 offset = (VT_VGA_WIDTH * y + x) / 8; 512 513 for (i = 0; i < height; ++i, offset += VT_VGA_WIDTH / 8) { 514 MEM_WRITE1(sc, offset, masks[i]); 515 } 516 } 517 518 static void 519 vga_bitblt_pixels_block_ncolors(struct vt_device *vd, const uint8_t *masks, 520 unsigned int x, unsigned int y, unsigned int height) 521 { 522 unsigned int i, j, plan, color, offset; 523 struct vga_softc *sc; 524 uint8_t mask, plans[height * 4]; 525 526 sc = vd->vd_softc; 527 528 memset(plans, 0, sizeof(plans)); 529 530 /* 531 * To write a group of pixels using 3 or more colors, we select 532 * Write Mode 0 and write one byte to each plan separately. 533 */ 534 535 /* 536 * We first compute each byte: each plan contains one bit of the 537 * color code for each of the 8 pixels. 538 * 539 * For example, if the 8 pixels are like this: 540 * GBBBBBBY 541 * where: 542 * G (gray) = 0b0111 543 * B (black) = 0b0000 544 * Y (yellow) = 0b0011 545 * 546 * The corresponding for bytes are: 547 * GBBBBBBY 548 * Plan 0: 10000001 = 0x81 549 * Plan 1: 10000001 = 0x81 550 * Plan 2: 10000000 = 0x80 551 * Plan 3: 00000000 = 0x00 552 * | | | 553 * | | +-> 0b0011 (Y) 554 * | +-----> 0b0000 (B) 555 * +--------> 0b0111 (G) 556 */ 557 558 for (i = 0; i < height; ++i) { 559 for (color = 0; color < 16; ++color) { 560 mask = masks[i * 16 + color]; 561 if (mask == 0x00) 562 continue; 563 564 for (j = 0; j < 8; ++j) { 565 if (!((mask >> (7 - j)) & 0x1)) 566 continue; 567 568 /* The pixel "j" uses color "color". */ 569 for (plan = 0; plan < 4; ++plan) 570 plans[i * 4 + plan] |= 571 ((color >> plan) & 0x1) << (7 - j); 572 } 573 } 574 } 575 576 /* 577 * The bytes are ready: we now switch to Write Mode 0 and write 578 * all bytes, one plan at a time. 579 */ 580 vga_setwmode(vd, 0); 581 582 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 583 for (plan = 0; plan < 4; ++plan) { 584 /* Select plan. */ 585 REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plan); 586 587 /* Write all bytes for this plan, from Y to Y+height. */ 588 for (i = 0; i < height; ++i) { 589 offset = (VT_VGA_WIDTH * (y + i) + x) / 8; 590 MEM_WRITE1(sc, offset, plans[i * 4 + plan]); 591 } 592 } 593 } 594 595 static void 596 vga_bitblt_one_text_pixels_block(struct vt_device *vd, 597 const struct vt_window *vw, unsigned int x, unsigned int y) 598 { 599 const struct vt_buf *vb; 600 const struct vt_font *vf; 601 unsigned int i, col, row, src_x, x_count; 602 unsigned int used_colors_list[16], used_colors; 603 uint8_t pattern_2colors[vw->vw_font->vf_height]; 604 uint8_t pattern_ncolors[vw->vw_font->vf_height * 16]; 605 term_char_t c; 606 term_color_t fg, bg; 607 const uint8_t *src; 608 609 vb = &vw->vw_buf; 610 vf = vw->vw_font; 611 612 /* 613 * The current pixels block. 614 * 615 * We fill it with portions of characters, because both "grids" 616 * may not match. 617 * 618 * i is the index in this pixels block. 619 */ 620 621 i = x; 622 used_colors = 0; 623 memset(used_colors_list, 0, sizeof(used_colors_list)); 624 memset(pattern_2colors, 0, sizeof(pattern_2colors)); 625 memset(pattern_ncolors, 0, sizeof(pattern_ncolors)); 626 627 if (i < vw->vw_draw_area.tr_begin.tp_col) { 628 /* 629 * i is in the margin used to center the text area on 630 * the screen. 631 */ 632 633 i = vw->vw_draw_area.tr_begin.tp_col; 634 } 635 636 while (i < x + VT_VGA_PIXELS_BLOCK && 637 i < vw->vw_draw_area.tr_end.tp_col) { 638 /* 639 * Find which character is drawn on this pixel in the 640 * pixels block. 641 * 642 * While here, record what colors it uses. 643 */ 644 645 col = (i - vw->vw_draw_area.tr_begin.tp_col) / vf->vf_width; 646 row = (y - vw->vw_draw_area.tr_begin.tp_row) / vf->vf_height; 647 648 c = VTBUF_GET_FIELD(vb, row, col); 649 src = vtfont_lookup(vf, c); 650 651 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), &fg, &bg); 652 if ((used_colors_list[fg] & 0x1) != 0x1) 653 used_colors++; 654 if ((used_colors_list[bg] & 0x2) != 0x2) 655 used_colors++; 656 used_colors_list[fg] |= 0x1; 657 used_colors_list[bg] |= 0x2; 658 659 /* 660 * Compute the portion of the character we want to draw, 661 * because the pixels block may start in the middle of a 662 * character. 663 * 664 * The first pixel to draw in the character is 665 * the current position - 666 * the start position of the character 667 * 668 * The last pixel to draw is either 669 * - the last pixel of the character, or 670 * - the pixel of the character matching the end of 671 * the pixels block 672 * whichever comes first. This position is then 673 * changed to be relative to the start position of the 674 * character. 675 */ 676 677 src_x = i - 678 (col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col); 679 x_count = min(min( 680 (col + 1) * vf->vf_width + 681 vw->vw_draw_area.tr_begin.tp_col, 682 x + VT_VGA_PIXELS_BLOCK), 683 vw->vw_draw_area.tr_end.tp_col); 684 x_count -= col * vf->vf_width + 685 vw->vw_draw_area.tr_begin.tp_col; 686 x_count -= src_x; 687 688 /* Copy a portion of the character. */ 689 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 690 src, NULL, vf->vf_width, 691 src_x, i % VT_VGA_PIXELS_BLOCK, x_count, 692 0, 0, vf->vf_height, fg, bg, 0); 693 694 /* We move to the next portion. */ 695 i += x_count; 696 } 697 698 #ifndef SC_NO_CUTPASTE 699 /* 700 * Copy the mouse pointer bitmap if it's over the current pixels 701 * block. 702 * 703 * We use the saved cursor position (saved in vt_flush()), because 704 * the current position could be different than the one used 705 * to mark the area dirty. 706 */ 707 term_rect_t drawn_area; 708 709 drawn_area.tr_begin.tp_col = x; 710 drawn_area.tr_begin.tp_row = y; 711 drawn_area.tr_end.tp_col = x + VT_VGA_PIXELS_BLOCK; 712 drawn_area.tr_end.tp_row = y + vf->vf_height; 713 if (vd->vd_mshown && vt_is_cursor_in_area(vd, &drawn_area)) { 714 struct vt_mouse_cursor *cursor; 715 unsigned int mx, my; 716 unsigned int dst_x, src_y, dst_y, y_count; 717 718 cursor = vd->vd_mcursor; 719 mx = vd->vd_mx_drawn + vw->vw_draw_area.tr_begin.tp_col; 720 my = vd->vd_my_drawn + vw->vw_draw_area.tr_begin.tp_row; 721 722 /* Compute the portion of the cursor we want to copy. */ 723 src_x = x > mx ? x - mx : 0; 724 dst_x = mx > x ? mx - x : 0; 725 x_count = min(min(min( 726 cursor->width - src_x, 727 x + VT_VGA_PIXELS_BLOCK - mx), 728 vw->vw_draw_area.tr_end.tp_col - mx), 729 VT_VGA_PIXELS_BLOCK); 730 731 /* 732 * The cursor isn't aligned on the Y-axis with 733 * characters, so we need to compute the vertical 734 * start/count. 735 */ 736 src_y = y > my ? y - my : 0; 737 dst_y = my > y ? my - y : 0; 738 y_count = min( 739 min(cursor->height - src_y, y + vf->vf_height - my), 740 vf->vf_height); 741 742 /* Copy the cursor portion. */ 743 vga_copy_bitmap_portion(pattern_2colors, pattern_ncolors, 744 cursor->map, cursor->mask, cursor->width, 745 src_x, dst_x, x_count, src_y, dst_y, y_count, 746 vd->vd_mcursor_fg, vd->vd_mcursor_bg, 1); 747 748 if ((used_colors_list[vd->vd_mcursor_fg] & 0x1) != 0x1) 749 used_colors++; 750 if ((used_colors_list[vd->vd_mcursor_bg] & 0x2) != 0x2) 751 used_colors++; 752 } 753 #endif 754 755 /* 756 * The pixels block is completed, we can now draw it on the 757 * screen. 758 */ 759 if (used_colors == 2) 760 vga_bitblt_pixels_block_2colors(vd, pattern_2colors, fg, bg, 761 x, y, vf->vf_height); 762 else 763 vga_bitblt_pixels_block_ncolors(vd, pattern_ncolors, 764 x, y, vf->vf_height); 765 } 766 767 static void 768 vga_bitblt_text_gfxmode(struct vt_device *vd, const struct vt_window *vw, 769 const term_rect_t *area) 770 { 771 const struct vt_font *vf; 772 unsigned int col, row; 773 unsigned int x1, y1, x2, y2, x, y; 774 775 vf = vw->vw_font; 776 777 /* 778 * Compute the top-left pixel position aligned with the video 779 * adapter pixels block size. 780 * 781 * This is calculated from the top-left column of te dirty area: 782 * 783 * 1. Compute the top-left pixel of the character: 784 * col * font width + x offset 785 * 786 * NOTE: x offset is used to center the text area on the 787 * screen. It's expressed in pixels, not in characters 788 * col/row! 789 * 790 * 2. Find the pixel further on the left marking the start of 791 * an aligned pixels block (eg. chunk of 8 pixels): 792 * character's x / blocksize * blocksize 793 * 794 * The division, being made on integers, achieves the 795 * alignment. 796 * 797 * For the Y-axis, we need to compute the character's y 798 * coordinate, but we don't need to align it. 799 */ 800 801 col = area->tr_begin.tp_col; 802 row = area->tr_begin.tp_row; 803 x1 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col) 804 / VT_VGA_PIXELS_BLOCK) 805 * VT_VGA_PIXELS_BLOCK; 806 y1 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 807 808 /* 809 * Compute the bottom right pixel position, again, aligned with 810 * the pixels block size. 811 * 812 * The same rules apply, we just add 1 to base the computation 813 * on the "right border" of the dirty area. 814 */ 815 816 col = area->tr_end.tp_col; 817 row = area->tr_end.tp_row; 818 x2 = (int)((col * vf->vf_width + vw->vw_draw_area.tr_begin.tp_col 819 + VT_VGA_PIXELS_BLOCK - 1) 820 / VT_VGA_PIXELS_BLOCK) 821 * VT_VGA_PIXELS_BLOCK; 822 y2 = row * vf->vf_height + vw->vw_draw_area.tr_begin.tp_row; 823 824 /* Clip the area to the screen size. */ 825 x2 = min(x2, vw->vw_draw_area.tr_end.tp_col); 826 y2 = min(y2, vw->vw_draw_area.tr_end.tp_row); 827 828 /* 829 * Now, we take care of N pixels line at a time (the first for 830 * loop, N = font height), and for these lines, draw one pixels 831 * block at a time (the second for loop), not a character at a 832 * time. 833 * 834 * Therefore, on the X-axis, characters my be drawn partially if 835 * they are not aligned on 8-pixels boundary. 836 * 837 * However, the operation is repeated for the full height of the 838 * font before moving to the next character, because it allows 839 * to keep the color settings and write mode, before perhaps 840 * changing them with the next one. 841 */ 842 843 for (y = y1; y < y2; y += vf->vf_height) { 844 for (x = x1; x < x2; x += VT_VGA_PIXELS_BLOCK) { 845 vga_bitblt_one_text_pixels_block(vd, vw, x, y); 846 } 847 } 848 } 849 850 static void 851 vga_bitblt_text_txtmode(struct vt_device *vd, const struct vt_window *vw, 852 const term_rect_t *area) 853 { 854 struct vga_softc *sc; 855 const struct vt_buf *vb; 856 unsigned int col, row; 857 term_char_t c; 858 term_color_t fg, bg; 859 uint8_t ch, attr; 860 861 sc = vd->vd_softc; 862 vb = &vw->vw_buf; 863 864 for (row = area->tr_begin.tp_row; row < area->tr_end.tp_row; ++row) { 865 for (col = area->tr_begin.tp_col; 866 col < area->tr_end.tp_col; 867 ++col) { 868 /* 869 * Get next character and its associated fg/bg 870 * colors. 871 */ 872 c = VTBUF_GET_FIELD(vb, row, col); 873 vt_determine_colors(c, VTBUF_ISCURSOR(vb, row, col), 874 &fg, &bg); 875 876 /* 877 * Convert character to CP437, which is the 878 * character set used by the VGA hardware by 879 * default. 880 */ 881 ch = vga_get_cp437(TCHAR_CHARACTER(c)); 882 883 /* Convert colors to VGA attributes. */ 884 attr = bg << 4 | fg; 885 886 MEM_WRITE1(sc, (row * 80 + col) * 2 + 0, 887 ch); 888 MEM_WRITE1(sc, (row * 80 + col) * 2 + 1, 889 attr); 890 } 891 } 892 } 893 894 static void 895 vga_bitblt_text(struct vt_device *vd, const struct vt_window *vw, 896 const term_rect_t *area) 897 { 898 899 if (!(vd->vd_flags & VDF_TEXTMODE)) { 900 vga_bitblt_text_gfxmode(vd, vw, area); 901 } else { 902 vga_bitblt_text_txtmode(vd, vw, area); 903 } 904 } 905 906 static void 907 vga_bitblt_bitmap(struct vt_device *vd, const struct vt_window *vw, 908 const uint8_t *pattern, const uint8_t *mask, 909 unsigned int width, unsigned int height, 910 unsigned int x, unsigned int y, term_color_t fg, term_color_t bg) 911 { 912 unsigned int x1, y1, x2, y2, i, j, src_x, dst_x, x_count; 913 uint8_t pattern_2colors; 914 915 /* Align coordinates with the 8-pxels grid. */ 916 x1 = x / VT_VGA_PIXELS_BLOCK * VT_VGA_PIXELS_BLOCK; 917 y1 = y; 918 919 x2 = (x + width + VT_VGA_PIXELS_BLOCK - 1) / 920 VT_VGA_PIXELS_BLOCK * VT_VGA_PIXELS_BLOCK; 921 y2 = y + height; 922 x2 = min(x2, vd->vd_width - 1); 923 y2 = min(y2, vd->vd_height - 1); 924 925 for (j = y1; j < y2; ++j) { 926 src_x = 0; 927 dst_x = x - x1; 928 x_count = VT_VGA_PIXELS_BLOCK - dst_x; 929 930 for (i = x1; i < x2; i += VT_VGA_PIXELS_BLOCK) { 931 pattern_2colors = 0; 932 933 vga_copy_bitmap_portion( 934 &pattern_2colors, NULL, 935 pattern, mask, width, 936 src_x, dst_x, x_count, 937 j - y1, 0, 1, fg, bg, 0); 938 939 vga_bitblt_pixels_block_2colors(vd, 940 &pattern_2colors, fg, bg, 941 i, j, 1); 942 943 src_x += x_count; 944 dst_x = (dst_x + x_count) % VT_VGA_PIXELS_BLOCK; 945 x_count = min(width - src_x, VT_VGA_PIXELS_BLOCK); 946 } 947 } 948 } 949 950 static void 951 vga_initialize_graphics(struct vt_device *vd) 952 { 953 struct vga_softc *sc = vd->vd_softc; 954 955 /* Clock select. */ 956 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP | 957 VGA_GEN_MO_PB | VGA_GEN_MO_ER | VGA_GEN_MO_IOA); 958 /* Set sequencer clocking and memory mode. */ 959 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE); 960 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89); 961 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE); 962 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM); 963 964 /* Set the graphics controller in graphics mode. */ 965 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS); 966 REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA); 967 /* Program the CRT controller. */ 968 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL); 969 REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f); /* 760 */ 970 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END); 971 REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */ 972 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK); 973 REG_WRITE1(sc, VGA_CRTC_DATA, 0x50); /* 640 */ 974 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK); 975 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2); 976 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE); 977 REG_WRITE1(sc, VGA_CRTC_DATA, 0x54); /* 672 */ 978 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE); 979 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0); 980 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL); 981 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b); /* 523 */ 982 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW); 983 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 | 984 VGA_CRTC_OF_VBS8 | VGA_CRTC_OF_VRS8 | VGA_CRTC_OF_VDE8); 985 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE); 986 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9); 987 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START); 988 REG_WRITE1(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */ 989 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 990 REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c); 991 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END); 992 REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/ 993 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET); 994 REG_WRITE1(sc, VGA_CRTC_DATA, 0x28); 995 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK); 996 REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */ 997 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK); 998 REG_WRITE1(sc, VGA_CRTC_DATA, 0x04); 999 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1000 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW | 1001 VGA_CRTC_MC_SRS | VGA_CRTC_MC_CMS); 1002 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE); 1003 REG_WRITE1(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */ 1004 1005 REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0); 1006 1007 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK); 1008 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 | 1009 VGA_SEQ_MM_EM1 | VGA_SEQ_MM_EM0); 1010 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT); 1011 REG_WRITE1(sc, VGA_SEQ_DATA, 0); 1012 1013 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET); 1014 REG_WRITE1(sc, VGA_GC_DATA, 0); 1015 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1016 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1017 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE); 1018 REG_WRITE1(sc, VGA_GC_DATA, 0); 1019 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE); 1020 REG_WRITE1(sc, VGA_GC_DATA, 0); 1021 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT); 1022 REG_WRITE1(sc, VGA_GC_DATA, 0); 1023 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1024 REG_WRITE1(sc, VGA_GC_DATA, 0); 1025 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE); 1026 REG_WRITE1(sc, VGA_GC_DATA, 0x0f); 1027 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK); 1028 REG_WRITE1(sc, VGA_GC_DATA, 0xff); 1029 } 1030 1031 static int 1032 vga_initialize(struct vt_device *vd, int textmode) 1033 { 1034 struct vga_softc *sc = vd->vd_softc; 1035 uint8_t x; 1036 int timeout; 1037 1038 /* Make sure the VGA adapter is not in monochrome emulation mode. */ 1039 x = REG_READ1(sc, VGA_GEN_MISC_OUTPUT_R); 1040 REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA); 1041 1042 /* Unprotect CRTC registers 0-7. */ 1043 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END); 1044 x = REG_READ1(sc, VGA_CRTC_DATA); 1045 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR); 1046 1047 /* 1048 * Wait for the vertical retrace. 1049 * NOTE: this code reads the VGA_GEN_INPUT_STAT_1 register, which has 1050 * the side-effect of clearing the internal flip-flip of the attribute 1051 * controller's write register. This means that because this code is 1052 * here, we know for sure that the first write to the attribute 1053 * controller will be a write to the address register. Removing this 1054 * code therefore also removes that guarantee and appropriate measures 1055 * need to be taken. 1056 */ 1057 timeout = 10000; 1058 do { 1059 DELAY(10); 1060 x = REG_READ1(sc, VGA_GEN_INPUT_STAT_1); 1061 x &= VGA_GEN_IS1_VR | VGA_GEN_IS1_DE; 1062 } while (x != (VGA_GEN_IS1_VR | VGA_GEN_IS1_DE) && --timeout != 0); 1063 if (timeout == 0) { 1064 printf("Timeout initializing vt_vga\n"); 1065 return (ENXIO); 1066 } 1067 1068 /* Now, disable the sync. signals. */ 1069 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1070 x = REG_READ1(sc, VGA_CRTC_DATA); 1071 REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR); 1072 1073 /* Asynchronous sequencer reset. */ 1074 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1075 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR); 1076 1077 if (!textmode) 1078 vga_initialize_graphics(vd); 1079 1080 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN); 1081 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1082 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START); 1083 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO); 1084 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END); 1085 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1086 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH); 1087 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1088 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW); 1089 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1090 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH); 1091 REG_WRITE1(sc, VGA_CRTC_DATA, 0); 1092 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW); 1093 REG_WRITE1(sc, VGA_CRTC_DATA, 0x59); 1094 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC); 1095 REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL); 1096 1097 if (textmode) { 1098 /* Set the attribute controller to blink disable. */ 1099 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1100 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1101 } else { 1102 /* Set the attribute controller in graphics mode. */ 1103 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL); 1104 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA); 1105 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING); 1106 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1107 } 1108 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0)); 1109 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1110 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1)); 1111 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R); 1112 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2)); 1113 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G); 1114 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3)); 1115 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R); 1116 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4)); 1117 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B); 1118 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5)); 1119 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B); 1120 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6)); 1121 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B); 1122 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7)); 1123 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1124 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8)); 1125 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1126 VGA_AC_PAL_SB); 1127 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9)); 1128 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1129 VGA_AC_PAL_SB | VGA_AC_PAL_R); 1130 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10)); 1131 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1132 VGA_AC_PAL_SB | VGA_AC_PAL_G); 1133 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11)); 1134 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1135 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G); 1136 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12)); 1137 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1138 VGA_AC_PAL_SB | VGA_AC_PAL_B); 1139 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13)); 1140 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1141 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_B); 1142 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14)); 1143 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1144 VGA_AC_PAL_SB | VGA_AC_PAL_G | VGA_AC_PAL_B); 1145 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15)); 1146 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG | 1147 VGA_AC_PAL_SB | VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B); 1148 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR); 1149 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1150 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE); 1151 REG_WRITE1(sc, VGA_AC_WRITE, 0x0f); 1152 REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT); 1153 REG_WRITE1(sc, VGA_AC_WRITE, 0); 1154 1155 if (!textmode) { 1156 u_int ofs; 1157 1158 /* 1159 * Done. Clear the frame buffer. All bit planes are 1160 * enabled, so a single-paged loop should clear all 1161 * planes. 1162 */ 1163 for (ofs = 0; ofs < VT_VGA_MEMSIZE; ofs++) { 1164 MEM_WRITE1(sc, ofs, 0); 1165 } 1166 } 1167 1168 /* Re-enable the sequencer. */ 1169 REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET); 1170 REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR); 1171 /* Re-enable the sync signals. */ 1172 REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL); 1173 x = REG_READ1(sc, VGA_CRTC_DATA); 1174 REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR); 1175 1176 if (!textmode) { 1177 /* Switch to write mode 3, because we'll mainly do bitblt. */ 1178 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE); 1179 REG_WRITE1(sc, VGA_GC_DATA, 3); 1180 sc->vga_wmode = 3; 1181 1182 /* 1183 * In Write Mode 3, Enable Set/Reset is ignored, but we 1184 * use Write Mode 0 to write a group of 8 pixels using 1185 * 3 or more colors. In this case, we want to disable 1186 * Set/Reset: set Enable Set/Reset to 0. 1187 */ 1188 REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET); 1189 REG_WRITE1(sc, VGA_GC_DATA, 0x00); 1190 1191 /* 1192 * Clear the colors we think are loaded into Set/Reset or 1193 * the latches. 1194 */ 1195 sc->vga_curfg = sc->vga_curbg = 0xff; 1196 } 1197 1198 return (0); 1199 } 1200 1201 static int 1202 vga_probe(struct vt_device *vd) 1203 { 1204 1205 return (CN_INTERNAL); 1206 } 1207 1208 static int 1209 vga_init(struct vt_device *vd) 1210 { 1211 struct vga_softc *sc; 1212 int textmode; 1213 1214 if (vd->vd_softc == NULL) 1215 vd->vd_softc = (void *)&vga_conssoftc; 1216 sc = vd->vd_softc; 1217 textmode = 0; 1218 1219 if (vd->vd_flags & VDF_DOWNGRADE && vd->vd_video_dev != NULL) 1220 vga_pci_repost(vd->vd_video_dev); 1221 1222 #if defined(__amd64__) || defined(__i386__) 1223 sc->vga_fb_tag = X86_BUS_SPACE_MEM; 1224 sc->vga_reg_tag = X86_BUS_SPACE_IO; 1225 #else 1226 # error "Architecture not yet supported!" 1227 #endif 1228 1229 bus_space_map(sc->vga_reg_tag, VGA_REG_BASE, VGA_REG_SIZE, 0, 1230 &sc->vga_reg_handle); 1231 1232 TUNABLE_INT_FETCH("hw.vga.textmode", &textmode); 1233 if (textmode) { 1234 vd->vd_flags |= VDF_TEXTMODE; 1235 vd->vd_width = 80; 1236 vd->vd_height = 25; 1237 bus_space_map(sc->vga_fb_tag, VGA_TXT_BASE, VGA_TXT_SIZE, 0, 1238 &sc->vga_fb_handle); 1239 } else { 1240 vd->vd_width = VT_VGA_WIDTH; 1241 vd->vd_height = VT_VGA_HEIGHT; 1242 bus_space_map(sc->vga_fb_tag, VGA_MEM_BASE, VGA_MEM_SIZE, 0, 1243 &sc->vga_fb_handle); 1244 } 1245 if (vga_initialize(vd, textmode) != 0) 1246 return (CN_DEAD); 1247 sc->vga_enabled = true; 1248 1249 return (CN_INTERNAL); 1250 } 1251 1252 static void 1253 vga_postswitch(struct vt_device *vd) 1254 { 1255 1256 /* Reinit VGA mode, to restore view after app which change mode. */ 1257 vga_initialize(vd, (vd->vd_flags & VDF_TEXTMODE)); 1258 /* Ask vt(9) to update chars on visible area. */ 1259 vd->vd_flags |= VDF_INVALID; 1260 } 1261 1262 /* Dummy NewBus functions to reserve the resources used by the vt_vga driver */ 1263 static void 1264 vtvga_identify(driver_t *driver, device_t parent) 1265 { 1266 1267 if (!vga_conssoftc.vga_enabled) 1268 return; 1269 1270 if (BUS_ADD_CHILD(parent, 0, driver->name, 0) == NULL) 1271 panic("Unable to attach vt_vga console"); 1272 } 1273 1274 static int 1275 vtvga_probe(device_t dev) 1276 { 1277 1278 device_set_desc(dev, "VT VGA driver"); 1279 1280 return (BUS_PROBE_NOWILDCARD); 1281 } 1282 1283 static int 1284 vtvga_attach(device_t dev) 1285 { 1286 struct resource *pseudo_phys_res; 1287 int res_id; 1288 1289 res_id = 0; 1290 pseudo_phys_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 1291 &res_id, VGA_MEM_BASE, VGA_MEM_BASE + VGA_MEM_SIZE - 1, 1292 VGA_MEM_SIZE, RF_ACTIVE); 1293 if (pseudo_phys_res == NULL) 1294 panic("Unable to reserve vt_vga memory"); 1295 return (0); 1296 } 1297 1298 /*-------------------- Private Device Attachment Data -----------------------*/ 1299 static device_method_t vtvga_methods[] = { 1300 /* Device interface */ 1301 DEVMETHOD(device_identify, vtvga_identify), 1302 DEVMETHOD(device_probe, vtvga_probe), 1303 DEVMETHOD(device_attach, vtvga_attach), 1304 1305 DEVMETHOD_END 1306 }; 1307 1308 DEFINE_CLASS_0(vtvga, vtvga_driver, vtvga_methods, 0); 1309 devclass_t vtvga_devclass; 1310 1311 DRIVER_MODULE(vtvga, nexus, vtvga_driver, vtvga_devclass, NULL, NULL); 1312