1 /*
2 
3   Broadcom B43 wireless driver
4   IEEE 802.11n PHY data tables
5 
6   Copyright (c) 2008 Michael Buesch <m@bues.ch>
7   Copyright (c) 2010 Rafał Miłecki <zajec5@gmail.com>
8 
9   This program is free software; you can redistribute it and/or modify
10   it under the terms of the GNU General Public License as published by
11   the Free Software Foundation; either version 2 of the License, or
12   (at your option) any later version.
13 
14   This program is distributed in the hope that it will be useful,
15   but WITHOUT ANY WARRANTY; without even the implied warranty of
16   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17   GNU General Public License for more details.
18 
19   You should have received a copy of the GNU General Public License
20   along with this program; see the file COPYING.  If not, write to
21   the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
22   Boston, MA 02110-1301, USA.
23 
24 */
25 
26 /*
27  * $FreeBSD$
28  */
29 
30 #ifndef	__IF_BWN_RADIO_2056_H__
31 #define	__IF_BWN_RADIO_2056_H__
32 
33 #define B2056_SYN			(0x0 << 12)
34 #define B2056_TX0			(0x2 << 12)
35 #define B2056_TX1			(0x3 << 12)
36 #define B2056_RX0			(0x6 << 12)
37 #define B2056_RX1			(0x7 << 12)
38 #define B2056_ALLTX			(0xE << 12)
39 #define B2056_ALLRX			(0xF << 12)
40 
41 #define B2056_SYN_RESERVED_ADDR0	0x00
42 #define B2056_SYN_IDCODE		0x01
43 #define B2056_SYN_RESERVED_ADDR2	0x02
44 #define B2056_SYN_RESERVED_ADDR3	0x03
45 #define B2056_SYN_RESERVED_ADDR4	0x04
46 #define B2056_SYN_RESERVED_ADDR5	0x05
47 #define B2056_SYN_RESERVED_ADDR6	0x06
48 #define B2056_SYN_RESERVED_ADDR7	0x07
49 #define B2056_SYN_COM_CTRL		0x08
50 #define B2056_SYN_COM_PU		0x09
51 #define B2056_SYN_COM_OVR		0x0A
52 #define B2056_SYN_COM_RESET		0x0B
53 #define B2056_SYN_COM_RCAL		0x0C
54 #define B2056_SYN_COM_RC_RXLPF		0x0D
55 #define B2056_SYN_COM_RC_TXLPF		0x0E
56 #define B2056_SYN_COM_RC_RXHPF		0x0F
57 #define B2056_SYN_RESERVED_ADDR16	0x10
58 #define B2056_SYN_RESERVED_ADDR17	0x11
59 #define B2056_SYN_RESERVED_ADDR18	0x12
60 #define B2056_SYN_RESERVED_ADDR19	0x13
61 #define B2056_SYN_RESERVED_ADDR20	0x14
62 #define B2056_SYN_RESERVED_ADDR21	0x15
63 #define B2056_SYN_RESERVED_ADDR22	0x16
64 #define B2056_SYN_RESERVED_ADDR23	0x17
65 #define B2056_SYN_RESERVED_ADDR24	0x18
66 #define B2056_SYN_RESERVED_ADDR25	0x19
67 #define B2056_SYN_RESERVED_ADDR26	0x1A
68 #define B2056_SYN_RESERVED_ADDR27	0x1B
69 #define B2056_SYN_RESERVED_ADDR28	0x1C
70 #define B2056_SYN_RESERVED_ADDR29	0x1D
71 #define B2056_SYN_RESERVED_ADDR30	0x1E
72 #define B2056_SYN_RESERVED_ADDR31	0x1F
73 #define B2056_SYN_GPIO_MASTER1		0x20
74 #define B2056_SYN_GPIO_MASTER2		0x21
75 #define B2056_SYN_TOPBIAS_MASTER	0x22
76 #define B2056_SYN_TOPBIAS_RCAL		0x23
77 #define B2056_SYN_AFEREG		0x24
78 #define B2056_SYN_TEMPPROCSENSE		0x25
79 #define B2056_SYN_TEMPPROCSENSEIDAC	0x26
80 #define B2056_SYN_TEMPPROCSENSERCAL	0x27
81 #define B2056_SYN_LPO			0x28
82 #define B2056_SYN_VDDCAL_MASTER		0x29
83 #define B2056_SYN_VDDCAL_IDAC		0x2A
84 #define B2056_SYN_VDDCAL_STATUS		0x2B
85 #define B2056_SYN_RCAL_MASTER		0x2C
86 #define B2056_SYN_RCAL_CODE_OUT		0x2D
87 #define B2056_SYN_RCCAL_CTRL0		0x2E
88 #define B2056_SYN_RCCAL_CTRL1		0x2F
89 #define B2056_SYN_RCCAL_CTRL2		0x30
90 #define B2056_SYN_RCCAL_CTRL3		0x31
91 #define B2056_SYN_RCCAL_CTRL4		0x32
92 #define B2056_SYN_RCCAL_CTRL5		0x33
93 #define B2056_SYN_RCCAL_CTRL6		0x34
94 #define B2056_SYN_RCCAL_CTRL7		0x35
95 #define B2056_SYN_RCCAL_CTRL8		0x36
96 #define B2056_SYN_RCCAL_CTRL9		0x37
97 #define B2056_SYN_RCCAL_CTRL10		0x38
98 #define B2056_SYN_RCCAL_CTRL11		0x39
99 #define B2056_SYN_ZCAL_SPARE1		0x3A
100 #define B2056_SYN_ZCAL_SPARE2		0x3B
101 #define B2056_SYN_PLL_MAST1		0x3C
102 #define B2056_SYN_PLL_MAST2		0x3D
103 #define B2056_SYN_PLL_MAST3		0x3E
104 #define B2056_SYN_PLL_BIAS_RESET	0x3F
105 #define B2056_SYN_PLL_XTAL0		0x40
106 #define B2056_SYN_PLL_XTAL1		0x41
107 #define B2056_SYN_PLL_XTAL3		0x42
108 #define B2056_SYN_PLL_XTAL4		0x43
109 #define B2056_SYN_PLL_XTAL5		0x44
110 #define B2056_SYN_PLL_XTAL6		0x45
111 #define B2056_SYN_PLL_REFDIV		0x46
112 #define B2056_SYN_PLL_PFD		0x47
113 #define B2056_SYN_PLL_CP1		0x48
114 #define B2056_SYN_PLL_CP2		0x49
115 #define B2056_SYN_PLL_CP3		0x4A
116 #define B2056_SYN_PLL_LOOPFILTER1	0x4B
117 #define B2056_SYN_PLL_LOOPFILTER2	0x4C
118 #define B2056_SYN_PLL_LOOPFILTER3	0x4D
119 #define B2056_SYN_PLL_LOOPFILTER4	0x4E
120 #define B2056_SYN_PLL_LOOPFILTER5	0x4F
121 #define B2056_SYN_PLL_MMD1		0x50
122 #define B2056_SYN_PLL_MMD2		0x51
123 #define B2056_SYN_PLL_VCO1		0x52
124 #define B2056_SYN_PLL_VCO2		0x53
125 #define B2056_SYN_PLL_MONITOR1		0x54
126 #define B2056_SYN_PLL_MONITOR2		0x55
127 #define B2056_SYN_PLL_VCOCAL1		0x56
128 #define B2056_SYN_PLL_VCOCAL2		0x57
129 #define B2056_SYN_PLL_VCOCAL4		0x58
130 #define B2056_SYN_PLL_VCOCAL5		0x59
131 #define B2056_SYN_PLL_VCOCAL6		0x5A
132 #define B2056_SYN_PLL_VCOCAL7		0x5B
133 #define B2056_SYN_PLL_VCOCAL8		0x5C
134 #define B2056_SYN_PLL_VCOCAL9		0x5D
135 #define B2056_SYN_PLL_VCOCAL10		0x5E
136 #define B2056_SYN_PLL_VCOCAL11		0x5F
137 #define B2056_SYN_PLL_VCOCAL12		0x60
138 #define B2056_SYN_PLL_VCOCAL13		0x61
139 #define B2056_SYN_PLL_VREG		0x62
140 #define B2056_SYN_PLL_STATUS1		0x63
141 #define B2056_SYN_PLL_STATUS2		0x64
142 #define B2056_SYN_PLL_STATUS3		0x65
143 #define B2056_SYN_LOGEN_PU0		0x66
144 #define B2056_SYN_LOGEN_PU1		0x67
145 #define B2056_SYN_LOGEN_PU2		0x68
146 #define B2056_SYN_LOGEN_PU3		0x69
147 #define B2056_SYN_LOGEN_PU5		0x6A
148 #define B2056_SYN_LOGEN_PU6		0x6B
149 #define B2056_SYN_LOGEN_PU7		0x6C
150 #define B2056_SYN_LOGEN_PU8		0x6D
151 #define B2056_SYN_LOGEN_BIAS_RESET	0x6E
152 #define B2056_SYN_LOGEN_RCCR1		0x6F
153 #define B2056_SYN_LOGEN_VCOBUF1		0x70
154 #define B2056_SYN_LOGEN_MIXER1		0x71
155 #define B2056_SYN_LOGEN_MIXER2		0x72
156 #define B2056_SYN_LOGEN_BUF1		0x73
157 #define B2056_SYN_LOGENBUF2		0x74
158 #define B2056_SYN_LOGEN_BUF3		0x75
159 #define B2056_SYN_LOGEN_BUF4		0x76
160 #define B2056_SYN_LOGEN_DIV1		0x77
161 #define B2056_SYN_LOGEN_DIV2		0x78
162 #define B2056_SYN_LOGEN_DIV3		0x79
163 #define B2056_SYN_LOGEN_ACL1		0x7A
164 #define B2056_SYN_LOGEN_ACL2		0x7B
165 #define B2056_SYN_LOGEN_ACL3		0x7C
166 #define B2056_SYN_LOGEN_ACL4		0x7D
167 #define B2056_SYN_LOGEN_ACL5		0x7E
168 #define B2056_SYN_LOGEN_ACL6		0x7F
169 #define B2056_SYN_LOGEN_ACLOUT		0x80
170 #define B2056_SYN_LOGEN_ACLCAL1		0x81
171 #define B2056_SYN_LOGEN_ACLCAL2		0x82
172 #define B2056_SYN_LOGEN_ACLCAL3		0x83
173 #define B2056_SYN_CALEN			0x84
174 #define B2056_SYN_LOGEN_PEAKDET1	0x85
175 #define B2056_SYN_LOGEN_CORE_ACL_OVR	0x86
176 #define B2056_SYN_LOGEN_RX_DIFF_ACL_OVR	0x87
177 #define B2056_SYN_LOGEN_TX_DIFF_ACL_OVR	0x88
178 #define B2056_SYN_LOGEN_RX_CMOS_ACL_OVR	0x89
179 #define B2056_SYN_LOGEN_TX_CMOS_ACL_OVR	0x8A
180 #define B2056_SYN_LOGEN_VCOBUF2		0x8B
181 #define B2056_SYN_LOGEN_MIXER3		0x8C
182 #define B2056_SYN_LOGEN_BUF5		0x8D
183 #define B2056_SYN_LOGEN_BUF6		0x8E
184 #define B2056_SYN_LOGEN_CBUFRX1		0x8F
185 #define B2056_SYN_LOGEN_CBUFRX2		0x90
186 #define B2056_SYN_LOGEN_CBUFRX3		0x91
187 #define B2056_SYN_LOGEN_CBUFRX4		0x92
188 #define B2056_SYN_LOGEN_CBUFTX1		0x93
189 #define B2056_SYN_LOGEN_CBUFTX2		0x94
190 #define B2056_SYN_LOGEN_CBUFTX3		0x95
191 #define B2056_SYN_LOGEN_CBUFTX4		0x96
192 #define B2056_SYN_LOGEN_CMOSRX1		0x97
193 #define B2056_SYN_LOGEN_CMOSRX2		0x98
194 #define B2056_SYN_LOGEN_CMOSRX3		0x99
195 #define B2056_SYN_LOGEN_CMOSRX4		0x9A
196 #define B2056_SYN_LOGEN_CMOSTX1		0x9B
197 #define B2056_SYN_LOGEN_CMOSTX2		0x9C
198 #define B2056_SYN_LOGEN_CMOSTX3		0x9D
199 #define B2056_SYN_LOGEN_CMOSTX4		0x9E
200 #define B2056_SYN_LOGEN_VCOBUF2_OVRVAL	0x9F
201 #define B2056_SYN_LOGEN_MIXER3_OVRVAL	0xA0
202 #define B2056_SYN_LOGEN_BUF5_OVRVAL	0xA1
203 #define B2056_SYN_LOGEN_BUF6_OVRVAL	0xA2
204 #define B2056_SYN_LOGEN_CBUFRX1_OVRVAL	0xA3
205 #define B2056_SYN_LOGEN_CBUFRX2_OVRVAL	0xA4
206 #define B2056_SYN_LOGEN_CBUFRX3_OVRVAL	0xA5
207 #define B2056_SYN_LOGEN_CBUFRX4_OVRVAL	0xA6
208 #define B2056_SYN_LOGEN_CBUFTX1_OVRVAL	0xA7
209 #define B2056_SYN_LOGEN_CBUFTX2_OVRVAL	0xA8
210 #define B2056_SYN_LOGEN_CBUFTX3_OVRVAL	0xA9
211 #define B2056_SYN_LOGEN_CBUFTX4_OVRVAL	0xAA
212 #define B2056_SYN_LOGEN_CMOSRX1_OVRVAL	0xAB
213 #define B2056_SYN_LOGEN_CMOSRX2_OVRVAL	0xAC
214 #define B2056_SYN_LOGEN_CMOSRX3_OVRVAL	0xAD
215 #define B2056_SYN_LOGEN_CMOSRX4_OVRVAL	0xAE
216 #define B2056_SYN_LOGEN_CMOSTX1_OVRVAL	0xAF
217 #define B2056_SYN_LOGEN_CMOSTX2_OVRVAL	0xB0
218 #define B2056_SYN_LOGEN_CMOSTX3_OVRVAL	0xB1
219 #define B2056_SYN_LOGEN_CMOSTX4_OVRVAL	0xB2
220 #define B2056_SYN_LOGEN_ACL_WAITCNT	0xB3
221 #define B2056_SYN_LOGEN_CORE_CALVALID	0xB4
222 #define B2056_SYN_LOGEN_RX_CMOS_CALVALID	0xB5
223 #define B2056_SYN_LOGEN_TX_CMOS_VALID	0xB6
224 
225 #define B2056_TX_RESERVED_ADDR0		0x00
226 #define B2056_TX_IDCODE			0x01
227 #define B2056_TX_RESERVED_ADDR2		0x02
228 #define B2056_TX_RESERVED_ADDR3		0x03
229 #define B2056_TX_RESERVED_ADDR4		0x04
230 #define B2056_TX_RESERVED_ADDR5		0x05
231 #define B2056_TX_RESERVED_ADDR6		0x06
232 #define B2056_TX_RESERVED_ADDR7		0x07
233 #define B2056_TX_COM_CTRL		0x08
234 #define B2056_TX_COM_PU			0x09
235 #define B2056_TX_COM_OVR		0x0A
236 #define B2056_TX_COM_RESET		0x0B
237 #define B2056_TX_COM_RCAL		0x0C
238 #define B2056_TX_COM_RC_RXLPF		0x0D
239 #define B2056_TX_COM_RC_TXLPF		0x0E
240 #define B2056_TX_COM_RC_RXHPF		0x0F
241 #define B2056_TX_RESERVED_ADDR16	0x10
242 #define B2056_TX_RESERVED_ADDR17	0x11
243 #define B2056_TX_RESERVED_ADDR18	0x12
244 #define B2056_TX_RESERVED_ADDR19	0x13
245 #define B2056_TX_RESERVED_ADDR20	0x14
246 #define B2056_TX_RESERVED_ADDR21	0x15
247 #define B2056_TX_RESERVED_ADDR22	0x16
248 #define B2056_TX_RESERVED_ADDR23	0x17
249 #define B2056_TX_RESERVED_ADDR24	0x18
250 #define B2056_TX_RESERVED_ADDR25	0x19
251 #define B2056_TX_RESERVED_ADDR26	0x1A
252 #define B2056_TX_RESERVED_ADDR27	0x1B
253 #define B2056_TX_RESERVED_ADDR28	0x1C
254 #define B2056_TX_RESERVED_ADDR29	0x1D
255 #define B2056_TX_RESERVED_ADDR30	0x1E
256 #define B2056_TX_RESERVED_ADDR31	0x1F
257 #define B2056_TX_IQCAL_GAIN_BW		0x20
258 #define B2056_TX_LOFT_FINE_I		0x21
259 #define B2056_TX_LOFT_FINE_Q		0x22
260 #define B2056_TX_LOFT_COARSE_I		0x23
261 #define B2056_TX_LOFT_COARSE_Q		0x24
262 #define B2056_TX_TX_COM_MASTER1		0x25
263 #define B2056_TX_TX_COM_MASTER2		0x26
264 #define B2056_TX_RXIQCAL_TXMUX		0x27
265 #define B2056_TX_TX_SSI_MASTER		0x28
266 #define B2056_TX_IQCAL_VCM_HG		0x29
267 #define B2056_TX_IQCAL_IDAC		0x2A
268 #define B2056_TX_TSSI_VCM		0x2B
269 #define B2056_TX_TX_AMP_DET		0x2C
270 #define B2056_TX_TX_SSI_MUX		0x2D
271 #define B2056_TX_TSSIA			0x2E
272 #define B2056_TX_TSSIG			0x2F
273 #define B2056_TX_TSSI_MISC1		0x30
274 #define B2056_TX_TSSI_MISC2		0x31
275 #define B2056_TX_TSSI_MISC3		0x32
276 #define B2056_TX_PA_SPARE1		0x33
277 #define B2056_TX_PA_SPARE2		0x34
278 #define B2056_TX_INTPAA_MASTER		0x35
279 #define B2056_TX_INTPAA_GAIN		0x36
280 #define B2056_TX_INTPAA_BOOST_TUNE	0x37
281 #define B2056_TX_INTPAA_IAUX_STAT	0x38
282 #define B2056_TX_INTPAA_IAUX_DYN	0x39
283 #define B2056_TX_INTPAA_IMAIN_STAT	0x3A
284 #define B2056_TX_INTPAA_IMAIN_DYN	0x3B
285 #define B2056_TX_INTPAA_CASCBIAS	0x3C
286 #define B2056_TX_INTPAA_PASLOPE		0x3D
287 #define B2056_TX_INTPAA_PA_MISC		0x3E
288 #define B2056_TX_INTPAG_MASTER		0x3F
289 #define B2056_TX_INTPAG_GAIN		0x40
290 #define B2056_TX_INTPAG_BOOST_TUNE	0x41
291 #define B2056_TX_INTPAG_IAUX_STAT	0x42
292 #define B2056_TX_INTPAG_IAUX_DYN	0x43
293 #define B2056_TX_INTPAG_IMAIN_STAT	0x44
294 #define B2056_TX_INTPAG_IMAIN_DYN	0x45
295 #define B2056_TX_INTPAG_CASCBIAS	0x46
296 #define B2056_TX_INTPAG_PASLOPE		0x47
297 #define B2056_TX_INTPAG_PA_MISC		0x48
298 #define B2056_TX_PADA_MASTER		0x49
299 #define B2056_TX_PADA_IDAC		0x4A
300 #define B2056_TX_PADA_CASCBIAS		0x4B
301 #define B2056_TX_PADA_GAIN		0x4C
302 #define B2056_TX_PADA_BOOST_TUNE	0x4D
303 #define B2056_TX_PADA_SLOPE		0x4E
304 #define B2056_TX_PADG_MASTER		0x4F
305 #define B2056_TX_PADG_IDAC		0x50
306 #define B2056_TX_PADG_CASCBIAS		0x51
307 #define B2056_TX_PADG_GAIN		0x52
308 #define B2056_TX_PADG_BOOST_TUNE	0x53
309 #define B2056_TX_PADG_SLOPE		0x54
310 #define B2056_TX_PGAA_MASTER		0x55
311 #define B2056_TX_PGAA_IDAC		0x56
312 #define B2056_TX_PGAA_GAIN		0x57
313 #define B2056_TX_PGAA_BOOST_TUNE	0x58
314 #define B2056_TX_PGAA_SLOPE		0x59
315 #define B2056_TX_PGAA_MISC		0x5A
316 #define B2056_TX_PGAG_MASTER		0x5B
317 #define B2056_TX_PGAG_IDAC		0x5C
318 #define B2056_TX_PGAG_GAIN		0x5D
319 #define B2056_TX_PGAG_BOOST_TUNE	0x5E
320 #define B2056_TX_PGAG_SLOPE		0x5F
321 #define B2056_TX_PGAG_MISC		0x60
322 #define B2056_TX_MIXA_MASTER		0x61
323 #define B2056_TX_MIXA_BOOST_TUNE	0x62
324 #define B2056_TX_MIXG			0x63
325 #define B2056_TX_MIXG_BOOST_TUNE	0x64
326 #define B2056_TX_BB_GM_MASTER		0x65
327 #define B2056_TX_GMBB_GM		0x66
328 #define B2056_TX_GMBB_IDAC		0x67
329 #define B2056_TX_TXLPF_MASTER		0x68
330 #define B2056_TX_TXLPF_RCCAL		0x69
331 #define B2056_TX_TXLPF_RCCAL_OFF0	0x6A
332 #define B2056_TX_TXLPF_RCCAL_OFF1	0x6B
333 #define B2056_TX_TXLPF_RCCAL_OFF2	0x6C
334 #define B2056_TX_TXLPF_RCCAL_OFF3	0x6D
335 #define B2056_TX_TXLPF_RCCAL_OFF4	0x6E
336 #define B2056_TX_TXLPF_RCCAL_OFF5	0x6F
337 #define B2056_TX_TXLPF_RCCAL_OFF6	0x70
338 #define B2056_TX_TXLPF_BW		0x71
339 #define B2056_TX_TXLPF_GAIN		0x72
340 #define B2056_TX_TXLPF_IDAC		0x73
341 #define B2056_TX_TXLPF_IDAC_0		0x74
342 #define B2056_TX_TXLPF_IDAC_1		0x75
343 #define B2056_TX_TXLPF_IDAC_2		0x76
344 #define B2056_TX_TXLPF_IDAC_3		0x77
345 #define B2056_TX_TXLPF_IDAC_4		0x78
346 #define B2056_TX_TXLPF_IDAC_5		0x79
347 #define B2056_TX_TXLPF_IDAC_6		0x7A
348 #define B2056_TX_TXLPF_OPAMP_IDAC	0x7B
349 #define B2056_TX_TXLPF_MISC		0x7C
350 #define B2056_TX_TXSPARE1		0x7D
351 #define B2056_TX_TXSPARE2		0x7E
352 #define B2056_TX_TXSPARE3		0x7F
353 #define B2056_TX_TXSPARE4		0x80
354 #define B2056_TX_TXSPARE5		0x81
355 #define B2056_TX_TXSPARE6		0x82
356 #define B2056_TX_TXSPARE7		0x83
357 #define B2056_TX_TXSPARE8		0x84
358 #define B2056_TX_TXSPARE9		0x85
359 #define B2056_TX_TXSPARE10		0x86
360 #define B2056_TX_TXSPARE11		0x87
361 #define B2056_TX_TXSPARE12		0x88
362 #define B2056_TX_TXSPARE13		0x89
363 #define B2056_TX_TXSPARE14		0x8A
364 #define B2056_TX_TXSPARE15		0x8B
365 #define B2056_TX_TXSPARE16		0x8C
366 #define B2056_TX_STATUS_INTPA_GAIN	0x8D
367 #define B2056_TX_STATUS_PAD_GAIN	0x8E
368 #define B2056_TX_STATUS_PGA_GAIN	0x8F
369 #define B2056_TX_STATUS_GM_TXLPF_GAIN	0x90
370 #define B2056_TX_STATUS_TXLPF_BW	0x91
371 #define B2056_TX_STATUS_TXLPF_RC	0x92
372 #define B2056_TX_GMBB_IDAC0		0x93
373 #define B2056_TX_GMBB_IDAC1		0x94
374 #define B2056_TX_GMBB_IDAC2		0x95
375 #define B2056_TX_GMBB_IDAC3		0x96
376 #define B2056_TX_GMBB_IDAC4		0x97
377 #define B2056_TX_GMBB_IDAC5		0x98
378 #define B2056_TX_GMBB_IDAC6		0x99
379 #define B2056_TX_GMBB_IDAC7		0x9A
380 
381 #define B2056_RX_RESERVED_ADDR0		0x00
382 #define B2056_RX_IDCODE			0x01
383 #define B2056_RX_RESERVED_ADDR2		0x02
384 #define B2056_RX_RESERVED_ADDR3		0x03
385 #define B2056_RX_RESERVED_ADDR4		0x04
386 #define B2056_RX_RESERVED_ADDR5		0x05
387 #define B2056_RX_RESERVED_ADDR6		0x06
388 #define B2056_RX_RESERVED_ADDR7		0x07
389 #define B2056_RX_COM_CTRL		0x08
390 #define B2056_RX_COM_PU			0x09
391 #define B2056_RX_COM_OVR		0x0A
392 #define B2056_RX_COM_RESET		0x0B
393 #define B2056_RX_COM_RCAL		0x0C
394 #define B2056_RX_COM_RC_RXLPF		0x0D
395 #define B2056_RX_COM_RC_TXLPF		0x0E
396 #define B2056_RX_COM_RC_RXHPF		0x0F
397 #define B2056_RX_RESERVED_ADDR16	0x10
398 #define B2056_RX_RESERVED_ADDR17	0x11
399 #define B2056_RX_RESERVED_ADDR18	0x12
400 #define B2056_RX_RESERVED_ADDR19	0x13
401 #define B2056_RX_RESERVED_ADDR20	0x14
402 #define B2056_RX_RESERVED_ADDR21	0x15
403 #define B2056_RX_RESERVED_ADDR22	0x16
404 #define B2056_RX_RESERVED_ADDR23	0x17
405 #define B2056_RX_RESERVED_ADDR24	0x18
406 #define B2056_RX_RESERVED_ADDR25	0x19
407 #define B2056_RX_RESERVED_ADDR26	0x1A
408 #define B2056_RX_RESERVED_ADDR27	0x1B
409 #define B2056_RX_RESERVED_ADDR28	0x1C
410 #define B2056_RX_RESERVED_ADDR29	0x1D
411 #define B2056_RX_RESERVED_ADDR30	0x1E
412 #define B2056_RX_RESERVED_ADDR31	0x1F
413 #define B2056_RX_RXIQCAL_RXMUX		0x20
414 #define B2056_RX_RSSI_PU		0x21
415 #define B2056_RX_RSSI_SEL		0x22
416 #define B2056_RX_RSSI_GAIN		0x23
417 #define B2056_RX_RSSI_NB_IDAC		0x24
418 #define B2056_RX_RSSI_WB2I_IDAC_1	0x25
419 #define B2056_RX_RSSI_WB2I_IDAC_2	0x26
420 #define B2056_RX_RSSI_WB2Q_IDAC_1	0x27
421 #define B2056_RX_RSSI_WB2Q_IDAC_2	0x28
422 #define B2056_RX_RSSI_POLE		0x29
423 #define B2056_RX_RSSI_WB1_IDAC		0x2A
424 #define B2056_RX_RSSI_MISC		0x2B
425 #define B2056_RX_LNAA_MASTER		0x2C
426 #define B2056_RX_LNAA_TUNE		0x2D
427 #define B2056_RX_LNAA_GAIN		0x2E
428 #define B2056_RX_LNA_A_SLOPE		0x2F
429 #define B2056_RX_BIASPOLE_LNAA1_IDAC	0x30
430 #define B2056_RX_LNAA2_IDAC		0x31
431 #define B2056_RX_LNA1A_MISC		0x32
432 #define B2056_RX_LNAG_MASTER		0x33
433 #define B2056_RX_LNAG_TUNE		0x34
434 #define B2056_RX_LNAG_GAIN		0x35
435 #define B2056_RX_LNA_G_SLOPE		0x36
436 #define B2056_RX_BIASPOLE_LNAG1_IDAC	0x37
437 #define B2056_RX_LNAG2_IDAC		0x38
438 #define B2056_RX_LNA1G_MISC		0x39
439 #define B2056_RX_MIXA_MASTER		0x3A
440 #define B2056_RX_MIXA_VCM		0x3B
441 #define B2056_RX_MIXA_CTRLPTAT		0x3C
442 #define B2056_RX_MIXA_LOB_BIAS		0x3D
443 #define B2056_RX_MIXA_CORE_IDAC		0x3E
444 #define B2056_RX_MIXA_CMFB_IDAC		0x3F
445 #define B2056_RX_MIXA_BIAS_AUX		0x40
446 #define B2056_RX_MIXA_BIAS_MAIN		0x41
447 #define B2056_RX_MIXA_BIAS_MISC		0x42
448 #define B2056_RX_MIXA_MAST_BIAS		0x43
449 #define B2056_RX_MIXG_MASTER		0x44
450 #define B2056_RX_MIXG_VCM		0x45
451 #define B2056_RX_MIXG_CTRLPTAT		0x46
452 #define B2056_RX_MIXG_LOB_BIAS		0x47
453 #define B2056_RX_MIXG_CORE_IDAC		0x48
454 #define B2056_RX_MIXG_CMFB_IDAC		0x49
455 #define B2056_RX_MIXG_BIAS_AUX		0x4A
456 #define B2056_RX_MIXG_BIAS_MAIN		0x4B
457 #define B2056_RX_MIXG_BIAS_MISC		0x4C
458 #define B2056_RX_MIXG_MAST_BIAS		0x4D
459 #define B2056_RX_TIA_MASTER		0x4E
460 #define B2056_RX_TIA_IOPAMP		0x4F
461 #define B2056_RX_TIA_QOPAMP		0x50
462 #define B2056_RX_TIA_IMISC		0x51
463 #define B2056_RX_TIA_QMISC		0x52
464 #define B2056_RX_TIA_GAIN		0x53
465 #define B2056_RX_TIA_SPARE1		0x54
466 #define B2056_RX_TIA_SPARE2		0x55
467 #define B2056_RX_BB_LPF_MASTER		0x56
468 #define B2056_RX_AACI_MASTER		0x57
469 #define B2056_RX_RXLPF_IDAC		0x58
470 #define B2056_RX_RXLPF_OPAMPBIAS_LOWQ	0x59
471 #define B2056_RX_RXLPF_OPAMPBIAS_HIGHQ	0x5A
472 #define B2056_RX_RXLPF_BIAS_DCCANCEL	0x5B
473 #define B2056_RX_RXLPF_OUTVCM		0x5C
474 #define B2056_RX_RXLPF_INVCM_BODY	0x5D
475 #define B2056_RX_RXLPF_CC_OP		0x5E
476 #define B2056_RX_RXLPF_GAIN		0x5F
477 #define B2056_RX_RXLPF_Q_BW		0x60
478 #define B2056_RX_RXLPF_HP_CORNER_BW	0x61
479 #define B2056_RX_RXLPF_RCCAL_HPC	0x62
480 #define B2056_RX_RXHPF_OFF0		0x63
481 #define B2056_RX_RXHPF_OFF1		0x64
482 #define B2056_RX_RXHPF_OFF2		0x65
483 #define B2056_RX_RXHPF_OFF3		0x66
484 #define B2056_RX_RXHPF_OFF4		0x67
485 #define B2056_RX_RXHPF_OFF5		0x68
486 #define B2056_RX_RXHPF_OFF6		0x69
487 #define B2056_RX_RXHPF_OFF7		0x6A
488 #define B2056_RX_RXLPF_RCCAL_LPC	0x6B
489 #define B2056_RX_RXLPF_OFF_0		0x6C
490 #define B2056_RX_RXLPF_OFF_1		0x6D
491 #define B2056_RX_RXLPF_OFF_2		0x6E
492 #define B2056_RX_RXLPF_OFF_3		0x6F
493 #define B2056_RX_RXLPF_OFF_4		0x70
494 #define B2056_RX_UNUSED			0x71
495 #define B2056_RX_VGA_MASTER		0x72
496 #define B2056_RX_VGA_BIAS		0x73
497 #define B2056_RX_VGA_BIAS_DCCANCEL	0x74
498 #define B2056_RX_VGA_GAIN		0x75
499 #define B2056_RX_VGA_HP_CORNER_BW	0x76
500 #define B2056_RX_VGABUF_BIAS		0x77
501 #define B2056_RX_VGABUF_GAIN_BW		0x78
502 #define B2056_RX_TXFBMIX_A		0x79
503 #define B2056_RX_TXFBMIX_G		0x7A
504 #define B2056_RX_RXSPARE1		0x7B
505 #define B2056_RX_RXSPARE2		0x7C
506 #define B2056_RX_RXSPARE3		0x7D
507 #define B2056_RX_RXSPARE4		0x7E
508 #define B2056_RX_RXSPARE5		0x7F
509 #define B2056_RX_RXSPARE6		0x80
510 #define B2056_RX_RXSPARE7		0x81
511 #define B2056_RX_RXSPARE8		0x82
512 #define B2056_RX_RXSPARE9		0x83
513 #define B2056_RX_RXSPARE10		0x84
514 #define B2056_RX_RXSPARE11		0x85
515 #define B2056_RX_RXSPARE12		0x86
516 #define B2056_RX_RXSPARE13		0x87
517 #define B2056_RX_RXSPARE14		0x88
518 #define B2056_RX_RXSPARE15		0x89
519 #define B2056_RX_RXSPARE16		0x8A
520 #define B2056_RX_STATUS_LNAA_GAIN	0x8B
521 #define B2056_RX_STATUS_LNAG_GAIN	0x8C
522 #define B2056_RX_STATUS_MIXTIA_GAIN	0x8D
523 #define B2056_RX_STATUS_RXLPF_GAIN	0x8E
524 #define B2056_RX_STATUS_VGA_BUF_GAIN	0x8F
525 #define B2056_RX_STATUS_RXLPF_Q		0x90
526 #define B2056_RX_STATUS_RXLPF_BUF_BW	0x91
527 #define B2056_RX_STATUS_RXLPF_VGA_HPC	0x92
528 #define B2056_RX_STATUS_RXLPF_RC	0x93
529 #define B2056_RX_STATUS_HPC_RC		0x94
530 
531 #define B2056_LNA1_A_PU			0x01
532 #define B2056_LNA2_A_PU			0x02
533 #define B2056_LNA1_G_PU			0x01
534 #define B2056_LNA2_G_PU			0x02
535 #define B2056_MIXA_PU_I			0x01
536 #define B2056_MIXA_PU_Q			0x02
537 #define B2056_MIXA_PU_GM		0x10
538 #define B2056_MIXG_PU_I			0x01
539 #define B2056_MIXG_PU_Q			0x02
540 #define B2056_MIXG_PU_GM		0x10
541 #define B2056_TIA_PU			0x01
542 #define B2056_BB_LPF_PU			0x20
543 #define B2056_W1_PU			0x02
544 #define B2056_W2_PU			0x04
545 #define B2056_NB_PU			0x08
546 #define B2056_RSSI_W1_SEL		0x02
547 #define B2056_RSSI_W2_SEL		0x04
548 #define B2056_RSSI_NB_SEL		0x08
549 #define B2056_VCM_MASK			0x1C
550 #define B2056_RSSI_VCM_SHIFT		0x02
551 
552 #define B2056_SYN			(0x0 << 12)
553 #define B2056_TX0			(0x2 << 12)
554 #define B2056_TX1			(0x3 << 12)
555 #define B2056_RX0			(0x6 << 12)
556 #define B2056_RX1			(0x7 << 12)
557 #define B2056_ALLTX			(0xE << 12)
558 #define B2056_ALLRX			(0xF << 12)
559 
560 #define B2056_SYN_RESERVED_ADDR0	0x00
561 #define B2056_SYN_IDCODE		0x01
562 #define B2056_SYN_RESERVED_ADDR2	0x02
563 #define B2056_SYN_RESERVED_ADDR3	0x03
564 #define B2056_SYN_RESERVED_ADDR4	0x04
565 #define B2056_SYN_RESERVED_ADDR5	0x05
566 #define B2056_SYN_RESERVED_ADDR6	0x06
567 #define B2056_SYN_RESERVED_ADDR7	0x07
568 #define B2056_SYN_COM_CTRL		0x08
569 #define B2056_SYN_COM_PU		0x09
570 #define B2056_SYN_COM_OVR		0x0A
571 #define B2056_SYN_COM_RESET		0x0B
572 #define B2056_SYN_COM_RCAL		0x0C
573 #define B2056_SYN_COM_RC_RXLPF		0x0D
574 #define B2056_SYN_COM_RC_TXLPF		0x0E
575 #define B2056_SYN_COM_RC_RXHPF		0x0F
576 #define B2056_SYN_RESERVED_ADDR16	0x10
577 #define B2056_SYN_RESERVED_ADDR17	0x11
578 #define B2056_SYN_RESERVED_ADDR18	0x12
579 #define B2056_SYN_RESERVED_ADDR19	0x13
580 #define B2056_SYN_RESERVED_ADDR20	0x14
581 #define B2056_SYN_RESERVED_ADDR21	0x15
582 #define B2056_SYN_RESERVED_ADDR22	0x16
583 #define B2056_SYN_RESERVED_ADDR23	0x17
584 #define B2056_SYN_RESERVED_ADDR24	0x18
585 #define B2056_SYN_RESERVED_ADDR25	0x19
586 #define B2056_SYN_RESERVED_ADDR26	0x1A
587 #define B2056_SYN_RESERVED_ADDR27	0x1B
588 #define B2056_SYN_RESERVED_ADDR28	0x1C
589 #define B2056_SYN_RESERVED_ADDR29	0x1D
590 #define B2056_SYN_RESERVED_ADDR30	0x1E
591 #define B2056_SYN_RESERVED_ADDR31	0x1F
592 #define B2056_SYN_GPIO_MASTER1		0x20
593 #define B2056_SYN_GPIO_MASTER2		0x21
594 #define B2056_SYN_TOPBIAS_MASTER	0x22
595 #define B2056_SYN_TOPBIAS_RCAL		0x23
596 #define B2056_SYN_AFEREG		0x24
597 #define B2056_SYN_TEMPPROCSENSE		0x25
598 #define B2056_SYN_TEMPPROCSENSEIDAC	0x26
599 #define B2056_SYN_TEMPPROCSENSERCAL	0x27
600 #define B2056_SYN_LPO			0x28
601 #define B2056_SYN_VDDCAL_MASTER		0x29
602 #define B2056_SYN_VDDCAL_IDAC		0x2A
603 #define B2056_SYN_VDDCAL_STATUS		0x2B
604 #define B2056_SYN_RCAL_MASTER		0x2C
605 #define B2056_SYN_RCAL_CODE_OUT		0x2D
606 #define B2056_SYN_RCCAL_CTRL0		0x2E
607 #define B2056_SYN_RCCAL_CTRL1		0x2F
608 #define B2056_SYN_RCCAL_CTRL2		0x30
609 #define B2056_SYN_RCCAL_CTRL3		0x31
610 #define B2056_SYN_RCCAL_CTRL4		0x32
611 #define B2056_SYN_RCCAL_CTRL5		0x33
612 #define B2056_SYN_RCCAL_CTRL6		0x34
613 #define B2056_SYN_RCCAL_CTRL7		0x35
614 #define B2056_SYN_RCCAL_CTRL8		0x36
615 #define B2056_SYN_RCCAL_CTRL9		0x37
616 #define B2056_SYN_RCCAL_CTRL10		0x38
617 #define B2056_SYN_RCCAL_CTRL11		0x39
618 #define B2056_SYN_ZCAL_SPARE1		0x3A
619 #define B2056_SYN_ZCAL_SPARE2		0x3B
620 #define B2056_SYN_PLL_MAST1		0x3C
621 #define B2056_SYN_PLL_MAST2		0x3D
622 #define B2056_SYN_PLL_MAST3		0x3E
623 #define B2056_SYN_PLL_BIAS_RESET	0x3F
624 #define B2056_SYN_PLL_XTAL0		0x40
625 #define B2056_SYN_PLL_XTAL1		0x41
626 #define B2056_SYN_PLL_XTAL3		0x42
627 #define B2056_SYN_PLL_XTAL4		0x43
628 #define B2056_SYN_PLL_XTAL5		0x44
629 #define B2056_SYN_PLL_XTAL6		0x45
630 #define B2056_SYN_PLL_REFDIV		0x46
631 #define B2056_SYN_PLL_PFD		0x47
632 #define B2056_SYN_PLL_CP1		0x48
633 #define B2056_SYN_PLL_CP2		0x49
634 #define B2056_SYN_PLL_CP3		0x4A
635 #define B2056_SYN_PLL_LOOPFILTER1	0x4B
636 #define B2056_SYN_PLL_LOOPFILTER2	0x4C
637 #define B2056_SYN_PLL_LOOPFILTER3	0x4D
638 #define B2056_SYN_PLL_LOOPFILTER4	0x4E
639 #define B2056_SYN_PLL_LOOPFILTER5	0x4F
640 #define B2056_SYN_PLL_MMD1		0x50
641 #define B2056_SYN_PLL_MMD2		0x51
642 #define B2056_SYN_PLL_VCO1		0x52
643 #define B2056_SYN_PLL_VCO2		0x53
644 #define B2056_SYN_PLL_MONITOR1		0x54
645 #define B2056_SYN_PLL_MONITOR2		0x55
646 #define B2056_SYN_PLL_VCOCAL1		0x56
647 #define B2056_SYN_PLL_VCOCAL2		0x57
648 #define B2056_SYN_PLL_VCOCAL4		0x58
649 #define B2056_SYN_PLL_VCOCAL5		0x59
650 #define B2056_SYN_PLL_VCOCAL6		0x5A
651 #define B2056_SYN_PLL_VCOCAL7		0x5B
652 #define B2056_SYN_PLL_VCOCAL8		0x5C
653 #define B2056_SYN_PLL_VCOCAL9		0x5D
654 #define B2056_SYN_PLL_VCOCAL10		0x5E
655 #define B2056_SYN_PLL_VCOCAL11		0x5F
656 #define B2056_SYN_PLL_VCOCAL12		0x60
657 #define B2056_SYN_PLL_VCOCAL13		0x61
658 #define B2056_SYN_PLL_VREG		0x62
659 #define B2056_SYN_PLL_STATUS1		0x63
660 #define B2056_SYN_PLL_STATUS2		0x64
661 #define B2056_SYN_PLL_STATUS3		0x65
662 #define B2056_SYN_LOGEN_PU0		0x66
663 #define B2056_SYN_LOGEN_PU1		0x67
664 #define B2056_SYN_LOGEN_PU2		0x68
665 #define B2056_SYN_LOGEN_PU3		0x69
666 #define B2056_SYN_LOGEN_PU5		0x6A
667 #define B2056_SYN_LOGEN_PU6		0x6B
668 #define B2056_SYN_LOGEN_PU7		0x6C
669 #define B2056_SYN_LOGEN_PU8		0x6D
670 #define B2056_SYN_LOGEN_BIAS_RESET	0x6E
671 #define B2056_SYN_LOGEN_RCCR1		0x6F
672 #define B2056_SYN_LOGEN_VCOBUF1		0x70
673 #define B2056_SYN_LOGEN_MIXER1		0x71
674 #define B2056_SYN_LOGEN_MIXER2		0x72
675 #define B2056_SYN_LOGEN_BUF1		0x73
676 #define B2056_SYN_LOGENBUF2		0x74
677 #define B2056_SYN_LOGEN_BUF3		0x75
678 #define B2056_SYN_LOGEN_BUF4		0x76
679 #define B2056_SYN_LOGEN_DIV1		0x77
680 #define B2056_SYN_LOGEN_DIV2		0x78
681 #define B2056_SYN_LOGEN_DIV3		0x79
682 #define B2056_SYN_LOGEN_ACL1		0x7A
683 #define B2056_SYN_LOGEN_ACL2		0x7B
684 #define B2056_SYN_LOGEN_ACL3		0x7C
685 #define B2056_SYN_LOGEN_ACL4		0x7D
686 #define B2056_SYN_LOGEN_ACL5		0x7E
687 #define B2056_SYN_LOGEN_ACL6		0x7F
688 #define B2056_SYN_LOGEN_ACLOUT		0x80
689 #define B2056_SYN_LOGEN_ACLCAL1		0x81
690 #define B2056_SYN_LOGEN_ACLCAL2		0x82
691 #define B2056_SYN_LOGEN_ACLCAL3		0x83
692 #define B2056_SYN_CALEN			0x84
693 #define B2056_SYN_LOGEN_PEAKDET1	0x85
694 #define B2056_SYN_LOGEN_CORE_ACL_OVR	0x86
695 #define B2056_SYN_LOGEN_RX_DIFF_ACL_OVR	0x87
696 #define B2056_SYN_LOGEN_TX_DIFF_ACL_OVR	0x88
697 #define B2056_SYN_LOGEN_RX_CMOS_ACL_OVR	0x89
698 #define B2056_SYN_LOGEN_TX_CMOS_ACL_OVR	0x8A
699 #define B2056_SYN_LOGEN_VCOBUF2		0x8B
700 #define B2056_SYN_LOGEN_MIXER3		0x8C
701 #define B2056_SYN_LOGEN_BUF5		0x8D
702 #define B2056_SYN_LOGEN_BUF6		0x8E
703 #define B2056_SYN_LOGEN_CBUFRX1		0x8F
704 #define B2056_SYN_LOGEN_CBUFRX2		0x90
705 #define B2056_SYN_LOGEN_CBUFRX3		0x91
706 #define B2056_SYN_LOGEN_CBUFRX4		0x92
707 #define B2056_SYN_LOGEN_CBUFTX1		0x93
708 #define B2056_SYN_LOGEN_CBUFTX2		0x94
709 #define B2056_SYN_LOGEN_CBUFTX3		0x95
710 #define B2056_SYN_LOGEN_CBUFTX4		0x96
711 #define B2056_SYN_LOGEN_CMOSRX1		0x97
712 #define B2056_SYN_LOGEN_CMOSRX2		0x98
713 #define B2056_SYN_LOGEN_CMOSRX3		0x99
714 #define B2056_SYN_LOGEN_CMOSRX4		0x9A
715 #define B2056_SYN_LOGEN_CMOSTX1		0x9B
716 #define B2056_SYN_LOGEN_CMOSTX2		0x9C
717 #define B2056_SYN_LOGEN_CMOSTX3		0x9D
718 #define B2056_SYN_LOGEN_CMOSTX4		0x9E
719 #define B2056_SYN_LOGEN_VCOBUF2_OVRVAL	0x9F
720 #define B2056_SYN_LOGEN_MIXER3_OVRVAL	0xA0
721 #define B2056_SYN_LOGEN_BUF5_OVRVAL	0xA1
722 #define B2056_SYN_LOGEN_BUF6_OVRVAL	0xA2
723 #define B2056_SYN_LOGEN_CBUFRX1_OVRVAL	0xA3
724 #define B2056_SYN_LOGEN_CBUFRX2_OVRVAL	0xA4
725 #define B2056_SYN_LOGEN_CBUFRX3_OVRVAL	0xA5
726 #define B2056_SYN_LOGEN_CBUFRX4_OVRVAL	0xA6
727 #define B2056_SYN_LOGEN_CBUFTX1_OVRVAL	0xA7
728 #define B2056_SYN_LOGEN_CBUFTX2_OVRVAL	0xA8
729 #define B2056_SYN_LOGEN_CBUFTX3_OVRVAL	0xA9
730 #define B2056_SYN_LOGEN_CBUFTX4_OVRVAL	0xAA
731 #define B2056_SYN_LOGEN_CMOSRX1_OVRVAL	0xAB
732 #define B2056_SYN_LOGEN_CMOSRX2_OVRVAL	0xAC
733 #define B2056_SYN_LOGEN_CMOSRX3_OVRVAL	0xAD
734 #define B2056_SYN_LOGEN_CMOSRX4_OVRVAL	0xAE
735 #define B2056_SYN_LOGEN_CMOSTX1_OVRVAL	0xAF
736 #define B2056_SYN_LOGEN_CMOSTX2_OVRVAL	0xB0
737 #define B2056_SYN_LOGEN_CMOSTX3_OVRVAL	0xB1
738 #define B2056_SYN_LOGEN_CMOSTX4_OVRVAL	0xB2
739 #define B2056_SYN_LOGEN_ACL_WAITCNT	0xB3
740 #define B2056_SYN_LOGEN_CORE_CALVALID	0xB4
741 #define B2056_SYN_LOGEN_RX_CMOS_CALVALID	0xB5
742 #define B2056_SYN_LOGEN_TX_CMOS_VALID	0xB6
743 
744 #define B2056_TX_RESERVED_ADDR0		0x00
745 #define B2056_TX_IDCODE			0x01
746 #define B2056_TX_RESERVED_ADDR2		0x02
747 #define B2056_TX_RESERVED_ADDR3		0x03
748 #define B2056_TX_RESERVED_ADDR4		0x04
749 #define B2056_TX_RESERVED_ADDR5		0x05
750 #define B2056_TX_RESERVED_ADDR6		0x06
751 #define B2056_TX_RESERVED_ADDR7		0x07
752 #define B2056_TX_COM_CTRL		0x08
753 #define B2056_TX_COM_PU			0x09
754 #define B2056_TX_COM_OVR		0x0A
755 #define B2056_TX_COM_RESET		0x0B
756 #define B2056_TX_COM_RCAL		0x0C
757 #define B2056_TX_COM_RC_RXLPF		0x0D
758 #define B2056_TX_COM_RC_TXLPF		0x0E
759 #define B2056_TX_COM_RC_RXHPF		0x0F
760 #define B2056_TX_RESERVED_ADDR16	0x10
761 #define B2056_TX_RESERVED_ADDR17	0x11
762 #define B2056_TX_RESERVED_ADDR18	0x12
763 #define B2056_TX_RESERVED_ADDR19	0x13
764 #define B2056_TX_RESERVED_ADDR20	0x14
765 #define B2056_TX_RESERVED_ADDR21	0x15
766 #define B2056_TX_RESERVED_ADDR22	0x16
767 #define B2056_TX_RESERVED_ADDR23	0x17
768 #define B2056_TX_RESERVED_ADDR24	0x18
769 #define B2056_TX_RESERVED_ADDR25	0x19
770 #define B2056_TX_RESERVED_ADDR26	0x1A
771 #define B2056_TX_RESERVED_ADDR27	0x1B
772 #define B2056_TX_RESERVED_ADDR28	0x1C
773 #define B2056_TX_RESERVED_ADDR29	0x1D
774 #define B2056_TX_RESERVED_ADDR30	0x1E
775 #define B2056_TX_RESERVED_ADDR31	0x1F
776 #define B2056_TX_IQCAL_GAIN_BW		0x20
777 #define B2056_TX_LOFT_FINE_I		0x21
778 #define B2056_TX_LOFT_FINE_Q		0x22
779 #define B2056_TX_LOFT_COARSE_I		0x23
780 #define B2056_TX_LOFT_COARSE_Q		0x24
781 #define B2056_TX_TX_COM_MASTER1		0x25
782 #define B2056_TX_TX_COM_MASTER2		0x26
783 #define B2056_TX_RXIQCAL_TXMUX		0x27
784 #define B2056_TX_TX_SSI_MASTER		0x28
785 #define B2056_TX_IQCAL_VCM_HG		0x29
786 #define B2056_TX_IQCAL_IDAC		0x2A
787 #define B2056_TX_TSSI_VCM		0x2B
788 #define B2056_TX_TX_AMP_DET		0x2C
789 #define B2056_TX_TX_SSI_MUX		0x2D
790 #define B2056_TX_TSSIA			0x2E
791 #define B2056_TX_TSSIG			0x2F
792 #define B2056_TX_TSSI_MISC1		0x30
793 #define B2056_TX_TSSI_MISC2		0x31
794 #define B2056_TX_TSSI_MISC3		0x32
795 #define B2056_TX_PA_SPARE1		0x33
796 #define B2056_TX_PA_SPARE2		0x34
797 #define B2056_TX_INTPAA_MASTER		0x35
798 #define B2056_TX_INTPAA_GAIN		0x36
799 #define B2056_TX_INTPAA_BOOST_TUNE	0x37
800 #define B2056_TX_INTPAA_IAUX_STAT	0x38
801 #define B2056_TX_INTPAA_IAUX_DYN	0x39
802 #define B2056_TX_INTPAA_IMAIN_STAT	0x3A
803 #define B2056_TX_INTPAA_IMAIN_DYN	0x3B
804 #define B2056_TX_INTPAA_CASCBIAS	0x3C
805 #define B2056_TX_INTPAA_PASLOPE		0x3D
806 #define B2056_TX_INTPAA_PA_MISC		0x3E
807 #define B2056_TX_INTPAG_MASTER		0x3F
808 #define B2056_TX_INTPAG_GAIN		0x40
809 #define B2056_TX_INTPAG_BOOST_TUNE	0x41
810 #define B2056_TX_INTPAG_IAUX_STAT	0x42
811 #define B2056_TX_INTPAG_IAUX_DYN	0x43
812 #define B2056_TX_INTPAG_IMAIN_STAT	0x44
813 #define B2056_TX_INTPAG_IMAIN_DYN	0x45
814 #define B2056_TX_INTPAG_CASCBIAS	0x46
815 #define B2056_TX_INTPAG_PASLOPE		0x47
816 #define B2056_TX_INTPAG_PA_MISC		0x48
817 #define B2056_TX_PADA_MASTER		0x49
818 #define B2056_TX_PADA_IDAC		0x4A
819 #define B2056_TX_PADA_CASCBIAS		0x4B
820 #define B2056_TX_PADA_GAIN		0x4C
821 #define B2056_TX_PADA_BOOST_TUNE	0x4D
822 #define B2056_TX_PADA_SLOPE		0x4E
823 #define B2056_TX_PADG_MASTER		0x4F
824 #define B2056_TX_PADG_IDAC		0x50
825 #define B2056_TX_PADG_CASCBIAS		0x51
826 #define B2056_TX_PADG_GAIN		0x52
827 #define B2056_TX_PADG_BOOST_TUNE	0x53
828 #define B2056_TX_PADG_SLOPE		0x54
829 #define B2056_TX_PGAA_MASTER		0x55
830 #define B2056_TX_PGAA_IDAC		0x56
831 #define B2056_TX_PGAA_GAIN		0x57
832 #define B2056_TX_PGAA_BOOST_TUNE	0x58
833 #define B2056_TX_PGAA_SLOPE		0x59
834 #define B2056_TX_PGAA_MISC		0x5A
835 #define B2056_TX_PGAG_MASTER		0x5B
836 #define B2056_TX_PGAG_IDAC		0x5C
837 #define B2056_TX_PGAG_GAIN		0x5D
838 #define B2056_TX_PGAG_BOOST_TUNE	0x5E
839 #define B2056_TX_PGAG_SLOPE		0x5F
840 #define B2056_TX_PGAG_MISC		0x60
841 #define B2056_TX_MIXA_MASTER		0x61
842 #define B2056_TX_MIXA_BOOST_TUNE	0x62
843 #define B2056_TX_MIXG			0x63
844 #define B2056_TX_MIXG_BOOST_TUNE	0x64
845 #define B2056_TX_BB_GM_MASTER		0x65
846 #define B2056_TX_GMBB_GM		0x66
847 #define B2056_TX_GMBB_IDAC		0x67
848 #define B2056_TX_TXLPF_MASTER		0x68
849 #define B2056_TX_TXLPF_RCCAL		0x69
850 #define B2056_TX_TXLPF_RCCAL_OFF0	0x6A
851 #define B2056_TX_TXLPF_RCCAL_OFF1	0x6B
852 #define B2056_TX_TXLPF_RCCAL_OFF2	0x6C
853 #define B2056_TX_TXLPF_RCCAL_OFF3	0x6D
854 #define B2056_TX_TXLPF_RCCAL_OFF4	0x6E
855 #define B2056_TX_TXLPF_RCCAL_OFF5	0x6F
856 #define B2056_TX_TXLPF_RCCAL_OFF6	0x70
857 #define B2056_TX_TXLPF_BW		0x71
858 #define B2056_TX_TXLPF_GAIN		0x72
859 #define B2056_TX_TXLPF_IDAC		0x73
860 #define B2056_TX_TXLPF_IDAC_0		0x74
861 #define B2056_TX_TXLPF_IDAC_1		0x75
862 #define B2056_TX_TXLPF_IDAC_2		0x76
863 #define B2056_TX_TXLPF_IDAC_3		0x77
864 #define B2056_TX_TXLPF_IDAC_4		0x78
865 #define B2056_TX_TXLPF_IDAC_5		0x79
866 #define B2056_TX_TXLPF_IDAC_6		0x7A
867 #define B2056_TX_TXLPF_OPAMP_IDAC	0x7B
868 #define B2056_TX_TXLPF_MISC		0x7C
869 #define B2056_TX_TXSPARE1		0x7D
870 #define B2056_TX_TXSPARE2		0x7E
871 #define B2056_TX_TXSPARE3		0x7F
872 #define B2056_TX_TXSPARE4		0x80
873 #define B2056_TX_TXSPARE5		0x81
874 #define B2056_TX_TXSPARE6		0x82
875 #define B2056_TX_TXSPARE7		0x83
876 #define B2056_TX_TXSPARE8		0x84
877 #define B2056_TX_TXSPARE9		0x85
878 #define B2056_TX_TXSPARE10		0x86
879 #define B2056_TX_TXSPARE11		0x87
880 #define B2056_TX_TXSPARE12		0x88
881 #define B2056_TX_TXSPARE13		0x89
882 #define B2056_TX_TXSPARE14		0x8A
883 #define B2056_TX_TXSPARE15		0x8B
884 #define B2056_TX_TXSPARE16		0x8C
885 #define B2056_TX_STATUS_INTPA_GAIN	0x8D
886 #define B2056_TX_STATUS_PAD_GAIN	0x8E
887 #define B2056_TX_STATUS_PGA_GAIN	0x8F
888 #define B2056_TX_STATUS_GM_TXLPF_GAIN	0x90
889 #define B2056_TX_STATUS_TXLPF_BW	0x91
890 #define B2056_TX_STATUS_TXLPF_RC	0x92
891 #define B2056_TX_GMBB_IDAC0		0x93
892 #define B2056_TX_GMBB_IDAC1		0x94
893 #define B2056_TX_GMBB_IDAC2		0x95
894 #define B2056_TX_GMBB_IDAC3		0x96
895 #define B2056_TX_GMBB_IDAC4		0x97
896 #define B2056_TX_GMBB_IDAC5		0x98
897 #define B2056_TX_GMBB_IDAC6		0x99
898 #define B2056_TX_GMBB_IDAC7		0x9A
899 
900 #define B2056_RX_RESERVED_ADDR0		0x00
901 #define B2056_RX_IDCODE			0x01
902 #define B2056_RX_RESERVED_ADDR2		0x02
903 #define B2056_RX_RESERVED_ADDR3		0x03
904 #define B2056_RX_RESERVED_ADDR4		0x04
905 #define B2056_RX_RESERVED_ADDR5		0x05
906 #define B2056_RX_RESERVED_ADDR6		0x06
907 #define B2056_RX_RESERVED_ADDR7		0x07
908 #define B2056_RX_COM_CTRL		0x08
909 #define B2056_RX_COM_PU			0x09
910 #define B2056_RX_COM_OVR		0x0A
911 #define B2056_RX_COM_RESET		0x0B
912 #define B2056_RX_COM_RCAL		0x0C
913 #define B2056_RX_COM_RC_RXLPF		0x0D
914 #define B2056_RX_COM_RC_TXLPF		0x0E
915 #define B2056_RX_COM_RC_RXHPF		0x0F
916 #define B2056_RX_RESERVED_ADDR16	0x10
917 #define B2056_RX_RESERVED_ADDR17	0x11
918 #define B2056_RX_RESERVED_ADDR18	0x12
919 #define B2056_RX_RESERVED_ADDR19	0x13
920 #define B2056_RX_RESERVED_ADDR20	0x14
921 #define B2056_RX_RESERVED_ADDR21	0x15
922 #define B2056_RX_RESERVED_ADDR22	0x16
923 #define B2056_RX_RESERVED_ADDR23	0x17
924 #define B2056_RX_RESERVED_ADDR24	0x18
925 #define B2056_RX_RESERVED_ADDR25	0x19
926 #define B2056_RX_RESERVED_ADDR26	0x1A
927 #define B2056_RX_RESERVED_ADDR27	0x1B
928 #define B2056_RX_RESERVED_ADDR28	0x1C
929 #define B2056_RX_RESERVED_ADDR29	0x1D
930 #define B2056_RX_RESERVED_ADDR30	0x1E
931 #define B2056_RX_RESERVED_ADDR31	0x1F
932 #define B2056_RX_RXIQCAL_RXMUX		0x20
933 #define B2056_RX_RSSI_PU		0x21
934 #define B2056_RX_RSSI_SEL		0x22
935 #define B2056_RX_RSSI_GAIN		0x23
936 #define B2056_RX_RSSI_NB_IDAC		0x24
937 #define B2056_RX_RSSI_WB2I_IDAC_1	0x25
938 #define B2056_RX_RSSI_WB2I_IDAC_2	0x26
939 #define B2056_RX_RSSI_WB2Q_IDAC_1	0x27
940 #define B2056_RX_RSSI_WB2Q_IDAC_2	0x28
941 #define B2056_RX_RSSI_POLE		0x29
942 #define B2056_RX_RSSI_WB1_IDAC		0x2A
943 #define B2056_RX_RSSI_MISC		0x2B
944 #define B2056_RX_LNAA_MASTER		0x2C
945 #define B2056_RX_LNAA_TUNE		0x2D
946 #define B2056_RX_LNAA_GAIN		0x2E
947 #define B2056_RX_LNA_A_SLOPE		0x2F
948 #define B2056_RX_BIASPOLE_LNAA1_IDAC	0x30
949 #define B2056_RX_LNAA2_IDAC		0x31
950 #define B2056_RX_LNA1A_MISC		0x32
951 #define B2056_RX_LNAG_MASTER		0x33
952 #define B2056_RX_LNAG_TUNE		0x34
953 #define B2056_RX_LNAG_GAIN		0x35
954 #define B2056_RX_LNA_G_SLOPE		0x36
955 #define B2056_RX_BIASPOLE_LNAG1_IDAC	0x37
956 #define B2056_RX_LNAG2_IDAC		0x38
957 #define B2056_RX_LNA1G_MISC		0x39
958 #define B2056_RX_MIXA_MASTER		0x3A
959 #define B2056_RX_MIXA_VCM		0x3B
960 #define B2056_RX_MIXA_CTRLPTAT		0x3C
961 #define B2056_RX_MIXA_LOB_BIAS		0x3D
962 #define B2056_RX_MIXA_CORE_IDAC		0x3E
963 #define B2056_RX_MIXA_CMFB_IDAC		0x3F
964 #define B2056_RX_MIXA_BIAS_AUX		0x40
965 #define B2056_RX_MIXA_BIAS_MAIN		0x41
966 #define B2056_RX_MIXA_BIAS_MISC		0x42
967 #define B2056_RX_MIXA_MAST_BIAS		0x43
968 #define B2056_RX_MIXG_MASTER		0x44
969 #define B2056_RX_MIXG_VCM		0x45
970 #define B2056_RX_MIXG_CTRLPTAT		0x46
971 #define B2056_RX_MIXG_LOB_BIAS		0x47
972 #define B2056_RX_MIXG_CORE_IDAC		0x48
973 #define B2056_RX_MIXG_CMFB_IDAC		0x49
974 #define B2056_RX_MIXG_BIAS_AUX		0x4A
975 #define B2056_RX_MIXG_BIAS_MAIN		0x4B
976 #define B2056_RX_MIXG_BIAS_MISC		0x4C
977 #define B2056_RX_MIXG_MAST_BIAS		0x4D
978 #define B2056_RX_TIA_MASTER		0x4E
979 #define B2056_RX_TIA_IOPAMP		0x4F
980 #define B2056_RX_TIA_QOPAMP		0x50
981 #define B2056_RX_TIA_IMISC		0x51
982 #define B2056_RX_TIA_QMISC		0x52
983 #define B2056_RX_TIA_GAIN		0x53
984 #define B2056_RX_TIA_SPARE1		0x54
985 #define B2056_RX_TIA_SPARE2		0x55
986 #define B2056_RX_BB_LPF_MASTER		0x56
987 #define B2056_RX_AACI_MASTER		0x57
988 #define B2056_RX_RXLPF_IDAC		0x58
989 #define B2056_RX_RXLPF_OPAMPBIAS_LOWQ	0x59
990 #define B2056_RX_RXLPF_OPAMPBIAS_HIGHQ	0x5A
991 #define B2056_RX_RXLPF_BIAS_DCCANCEL	0x5B
992 #define B2056_RX_RXLPF_OUTVCM		0x5C
993 #define B2056_RX_RXLPF_INVCM_BODY	0x5D
994 #define B2056_RX_RXLPF_CC_OP		0x5E
995 #define B2056_RX_RXLPF_GAIN		0x5F
996 #define B2056_RX_RXLPF_Q_BW		0x60
997 #define B2056_RX_RXLPF_HP_CORNER_BW	0x61
998 #define B2056_RX_RXLPF_RCCAL_HPC	0x62
999 #define B2056_RX_RXHPF_OFF0		0x63
1000 #define B2056_RX_RXHPF_OFF1		0x64
1001 #define B2056_RX_RXHPF_OFF2		0x65
1002 #define B2056_RX_RXHPF_OFF3		0x66
1003 #define B2056_RX_RXHPF_OFF4		0x67
1004 #define B2056_RX_RXHPF_OFF5		0x68
1005 #define B2056_RX_RXHPF_OFF6		0x69
1006 #define B2056_RX_RXHPF_OFF7		0x6A
1007 #define B2056_RX_RXLPF_RCCAL_LPC	0x6B
1008 #define B2056_RX_RXLPF_OFF_0		0x6C
1009 #define B2056_RX_RXLPF_OFF_1		0x6D
1010 #define B2056_RX_RXLPF_OFF_2		0x6E
1011 #define B2056_RX_RXLPF_OFF_3		0x6F
1012 #define B2056_RX_RXLPF_OFF_4		0x70
1013 #define B2056_RX_UNUSED			0x71
1014 #define B2056_RX_VGA_MASTER		0x72
1015 #define B2056_RX_VGA_BIAS		0x73
1016 #define B2056_RX_VGA_BIAS_DCCANCEL	0x74
1017 #define B2056_RX_VGA_GAIN		0x75
1018 #define B2056_RX_VGA_HP_CORNER_BW	0x76
1019 #define B2056_RX_VGABUF_BIAS		0x77
1020 #define B2056_RX_VGABUF_GAIN_BW		0x78
1021 #define B2056_RX_TXFBMIX_A		0x79
1022 #define B2056_RX_TXFBMIX_G		0x7A
1023 #define B2056_RX_RXSPARE1		0x7B
1024 #define B2056_RX_RXSPARE2		0x7C
1025 #define B2056_RX_RXSPARE3		0x7D
1026 #define B2056_RX_RXSPARE4		0x7E
1027 #define B2056_RX_RXSPARE5		0x7F
1028 #define B2056_RX_RXSPARE6		0x80
1029 #define B2056_RX_RXSPARE7		0x81
1030 #define B2056_RX_RXSPARE8		0x82
1031 #define B2056_RX_RXSPARE9		0x83
1032 #define B2056_RX_RXSPARE10		0x84
1033 #define B2056_RX_RXSPARE11		0x85
1034 #define B2056_RX_RXSPARE12		0x86
1035 #define B2056_RX_RXSPARE13		0x87
1036 #define B2056_RX_RXSPARE14		0x88
1037 #define B2056_RX_RXSPARE15		0x89
1038 #define B2056_RX_RXSPARE16		0x8A
1039 #define B2056_RX_STATUS_LNAA_GAIN	0x8B
1040 #define B2056_RX_STATUS_LNAG_GAIN	0x8C
1041 #define B2056_RX_STATUS_MIXTIA_GAIN	0x8D
1042 #define B2056_RX_STATUS_RXLPF_GAIN	0x8E
1043 #define B2056_RX_STATUS_VGA_BUF_GAIN	0x8F
1044 #define B2056_RX_STATUS_RXLPF_Q		0x90
1045 #define B2056_RX_STATUS_RXLPF_BUF_BW	0x91
1046 #define B2056_RX_STATUS_RXLPF_VGA_HPC	0x92
1047 #define B2056_RX_STATUS_RXLPF_RC	0x93
1048 #define B2056_RX_STATUS_HPC_RC		0x94
1049 
1050 #define B2056_LNA1_A_PU			0x01
1051 #define B2056_LNA2_A_PU			0x02
1052 #define B2056_LNA1_G_PU			0x01
1053 #define B2056_LNA2_G_PU			0x02
1054 #define B2056_MIXA_PU_I			0x01
1055 #define B2056_MIXA_PU_Q			0x02
1056 #define B2056_MIXA_PU_GM		0x10
1057 #define B2056_MIXG_PU_I			0x01
1058 #define B2056_MIXG_PU_Q			0x02
1059 #define B2056_MIXG_PU_GM		0x10
1060 #define B2056_TIA_PU			0x01
1061 #define B2056_BB_LPF_PU			0x20
1062 #define B2056_W1_PU			0x02
1063 #define B2056_W2_PU			0x04
1064 #define B2056_NB_PU			0x08
1065 #define B2056_RSSI_W1_SEL		0x02
1066 #define B2056_RSSI_W2_SEL		0x04
1067 #define B2056_RSSI_NB_SEL		0x08
1068 #define B2056_VCM_MASK			0x1C
1069 #define B2056_RSSI_VCM_SHIFT		0x02
1070 
1071 struct bwn_nphy_channeltab_entry_rev3 {
1072 	/* The channel frequency in MHz */
1073 	uint16_t freq;
1074 	/* Radio register values on channelswitch */
1075 	uint8_t radio_syn_pll_vcocal1;
1076 	uint8_t radio_syn_pll_vcocal2;
1077 	uint8_t radio_syn_pll_refdiv;
1078 	uint8_t radio_syn_pll_mmd2;
1079 	uint8_t radio_syn_pll_mmd1;
1080 	uint8_t radio_syn_pll_loopfilter1;
1081 	uint8_t radio_syn_pll_loopfilter2;
1082 	uint8_t radio_syn_pll_loopfilter3;
1083 	uint8_t radio_syn_pll_loopfilter4;
1084 	uint8_t radio_syn_pll_loopfilter5;
1085 	uint8_t radio_syn_reserved_addr27;
1086 	uint8_t radio_syn_reserved_addr28;
1087 	uint8_t radio_syn_reserved_addr29;
1088 	uint8_t radio_syn_logen_vcobuf1;
1089 	uint8_t radio_syn_logen_mixer2;
1090 	uint8_t radio_syn_logen_buf3;
1091 	uint8_t radio_syn_logen_buf4;
1092 	uint8_t radio_rx0_lnaa_tune;
1093 	uint8_t radio_rx0_lnag_tune;
1094 	uint8_t radio_tx0_intpaa_boost_tune;
1095 	uint8_t radio_tx0_intpag_boost_tune;
1096 	uint8_t radio_tx0_pada_boost_tune;
1097 	uint8_t radio_tx0_padg_boost_tune;
1098 	uint8_t radio_tx0_pgaa_boost_tune;
1099 	uint8_t radio_tx0_pgag_boost_tune;
1100 	uint8_t radio_tx0_mixa_boost_tune;
1101 	uint8_t radio_tx0_mixg_boost_tune;
1102 	uint8_t radio_rx1_lnaa_tune;
1103 	uint8_t radio_rx1_lnag_tune;
1104 	uint8_t radio_tx1_intpaa_boost_tune;
1105 	uint8_t radio_tx1_intpag_boost_tune;
1106 	uint8_t radio_tx1_pada_boost_tune;
1107 	uint8_t radio_tx1_padg_boost_tune;
1108 	uint8_t radio_tx1_pgaa_boost_tune;
1109 	uint8_t radio_tx1_pgag_boost_tune;
1110 	uint8_t radio_tx1_mixa_boost_tune;
1111 	uint8_t radio_tx1_mixg_boost_tune;
1112 	/* PHY register values on channelswitch */
1113 	struct bwn_phy_n_sfo_cfg phy_regs;
1114 };
1115 
1116 void b2056_upload_inittabs(struct bwn_mac *mac,
1117 			   bool ghz5, bool ignore_uploadflag);
1118 void b2056_upload_syn_pll_cp2(struct bwn_mac *mac, bool ghz5);
1119 
1120 /* Get the NPHY Channel Switch Table entry for a channel.
1121  * Returns NULL on failure to find an entry. */
1122 const struct bwn_nphy_channeltab_entry_rev3 *
1123 bwn_nphy_get_chantabent_rev3(struct bwn_mac *mac, uint16_t freq);
1124 
1125 #endif	/* __IF_BWN_RADIO_2056_H__ */
1126