xref: /freebsd/sys/powerpc/include/ieee.h (revision 4f52dfbb)
1 /*-
2  * SPDX-License-Identifier: BSD-3-Clause
3  *
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. Neither the name of the University nor the names of its contributors
25  *    may be used to endorse or promote products derived from this software
26  *    without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38  * SUCH DAMAGE.
39  *
40  *	@(#)ieee.h	8.1 (Berkeley) 6/11/93
41  *	from: NetBSD: ieee.h,v 1.1.1.1 1998/06/20 04:58:51 eeh Exp
42  * $FreeBSD$
43  */
44 
45 #ifndef _MACHINE_IEEE_H_
46 #define	_MACHINE_IEEE_H_
47 
48 /*
49  * ieee.h defines the machine-dependent layout of the machine's IEEE
50  * floating point.  It does *not* define (yet?) any of the rounding
51  * mode bits, exceptions, and so forth.
52  */
53 
54 /*
55  * Define the number of bits in each fraction and exponent.
56  *
57  *		     k	         k+1
58  * Note that  1.0 x 2  == 0.1 x 2      and that denorms are represented
59  *
60  *					  (-exp_bias+1)
61  * as fractions that look like 0.fffff x 2             .  This means that
62  *
63  *			 -126
64  * the number 0.10000 x 2    , for instance, is the same as the normalized
65  *
66  *		-127			   -128
67  * float 1.0 x 2    .  Thus, to represent 2    , we need one leading zero
68  *
69  *				  -129
70  * in the fraction; to represent 2    , we need two, and so on.  This
71  *
72  *						     (-exp_bias-fracbits+1)
73  * implies that the smallest denormalized number is 2
74  *
75  * for whichever format we are talking about: for single precision, for
76  *
77  *						-126		-149
78  * instance, we get .00000000000000000000001 x 2    , or 1.0 x 2    , and
79  *
80  * -149 == -127 - 23 + 1.
81  */
82 #define	SNG_EXPBITS	8
83 #define	SNG_FRACBITS	23
84 
85 #define	DBL_EXPBITS	11
86 #define	DBL_FRACBITS	52
87 
88 #ifdef notyet
89 #define	E80_EXPBITS	15
90 #define	E80_FRACBITS	64
91 #endif
92 
93 #define	EXT_EXPBITS	15
94 #define	EXT_FRACBITS	112
95 
96 struct ieee_single {
97 	u_int	sng_sign:1;
98 	u_int	sng_exp:8;
99 	u_int	sng_frac:23;
100 };
101 
102 struct ieee_double {
103 	u_int	dbl_sign:1;
104 	u_int	dbl_exp:11;
105 	u_int	dbl_frach:20;
106 	u_int	dbl_fracl;
107 };
108 
109 struct ieee_ext {
110 	u_int	ext_sign:1;
111 	u_int	ext_exp:15;
112 	u_int	ext_frach:16;
113 	u_int	ext_frachm;
114 	u_int	ext_fraclm;
115 	u_int	ext_fracl;
116 };
117 
118 /*
119  * Floats whose exponent is in [1..INFNAN) (of whatever type) are
120  * `normal'.  Floats whose exponent is INFNAN are either Inf or NaN.
121  * Floats whose exponent is zero are either zero (iff all fraction
122  * bits are zero) or subnormal values.
123  *
124  * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its
125  * high fraction; if the bit is set, it is a `quiet NaN'.
126  */
127 #define	SNG_EXP_INFNAN	255
128 #define	DBL_EXP_INFNAN	2047
129 #define	EXT_EXP_INFNAN	32767
130 
131 #if 0
132 #define	SNG_QUIETNAN	(1 << 22)
133 #define	DBL_QUIETNAN	(1 << 19)
134 #define	EXT_QUIETNAN	(1 << 15)
135 #endif
136 
137 /*
138  * Exponent biases.
139  */
140 #define	SNG_EXP_BIAS	127
141 #define	DBL_EXP_BIAS	1023
142 #define	EXT_EXP_BIAS	16383
143 
144 #endif
145