1/*- 2 * Copyright (c) 2017-2018 QCM Technologies. 3 * Copyright (c) 2017-2018 Semihalf. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include "assym.inc" 29 30#include <machine/asm.h> 31 32 .p2align 3 33ENTRY(enter_idle_powerx) 34 mfsprg0 %r3 /* Get the pcpu pointer */ 35 ld %r3,PC_CURTHREAD(%r3) /* Get current thread */ 36 ld %r3,TD_PCB(%r3) /* Get PCB of current thread */ 37 std %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs. */ 38 std %r13,PCB_CONTEXT+1*8(%r3) 39 std %r14,PCB_CONTEXT+2*8(%r3) 40 std %r15,PCB_CONTEXT+3*8(%r3) 41 std %r16,PCB_CONTEXT+4*8(%r3) 42 std %r17,PCB_CONTEXT+5*8(%r3) 43 std %r18,PCB_CONTEXT+6*8(%r3) 44 std %r19,PCB_CONTEXT+7*8(%r3) 45 std %r20,PCB_CONTEXT+8*8(%r3) 46 std %r21,PCB_CONTEXT+9*8(%r3) 47 std %r22,PCB_CONTEXT+10*8(%r3) 48 std %r23,PCB_CONTEXT+11*8(%r3) 49 std %r24,PCB_CONTEXT+12*8(%r3) 50 std %r25,PCB_CONTEXT+13*8(%r3) 51 std %r26,PCB_CONTEXT+14*8(%r3) 52 std %r27,PCB_CONTEXT+15*8(%r3) 53 std %r28,PCB_CONTEXT+16*8(%r3) 54 std %r29,PCB_CONTEXT+17*8(%r3) 55 std %r30,PCB_CONTEXT+18*8(%r3) 56 std %r31,PCB_CONTEXT+19*8(%r3) 57 58 mfcr %r16 /* Save the condition register */ 59 std %r16,PCB_CR(%r3) 60 mflr %r16 /* Save the link register */ 61 std %r16,PCB_LR(%r3) 62 std %r1,PCB_SP(%r3) /* Save the stack pointer */ 63 std %r2,PCB_TOC(%r3) /* Save the TOC pointer */ 64 65 bl 1f 661: mflr %r3 67 addi %r3,%r3,power_save_sequence-1b 68 mtsrr0 %r3 69 70 /* Set MSR */ 71 li %r3,0 72#ifdef __LITTLE_ENDIAN__ 73 ori %r3,%r3,(PSL_ME | PSL_RI | PSL_LE) 74#else 75 ori %r3,%r3,(PSL_ME | PSL_RI) 76#endif 77 li %r8,0x9 /* PSL_SF and PSL_HV */ 78 insrdi %r3,%r8,4,0 79 mtsrr1 %r3 80 81 rfid 82 83 .p2align 2 84power_save_sequence: 85 bl 1f 86 .llong 0x0 /* Playground for power-save sequence */ 871: mflr %r3 88 89 /* Start power-save sequence */ 90 std %r2,0(%r3) 91 ptesync 92 ld %r2,0(%r3) 932: cmpd %r2,%r2 94 bne 2b 95 nap 96 b . 97END(enter_idle_powerx) 98