1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause AND BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 5 * Copyright (C) 1995, 1996 TooLs GmbH. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by TooLs GmbH. 19 * 4. The name of TooLs GmbH may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 /*- 34 * Copyright (C) 2001 Benno Rice 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 46 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 47 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 48 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 49 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 50 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 51 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 52 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 53 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 54 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 55 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 56 * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $ 57 */ 58 59 #include <sys/cdefs.h> 60 __FBSDID("$FreeBSD$"); 61 62 #include "opt_fpu_emu.h" 63 64 #include <sys/param.h> 65 #include <sys/proc.h> 66 #include <sys/systm.h> 67 #include <sys/bio.h> 68 #include <sys/buf.h> 69 #include <sys/bus.h> 70 #include <sys/cons.h> 71 #include <sys/cpu.h> 72 #include <sys/exec.h> 73 #include <sys/imgact.h> 74 #include <sys/kernel.h> 75 #include <sys/ktr.h> 76 #include <sys/lock.h> 77 #include <sys/malloc.h> 78 #include <sys/mutex.h> 79 #include <sys/reg.h> 80 #include <sys/signalvar.h> 81 #include <sys/syscallsubr.h> 82 #include <sys/syscall.h> 83 #include <sys/sysent.h> 84 #include <sys/sysproto.h> 85 #include <sys/ucontext.h> 86 #include <sys/uio.h> 87 88 #include <machine/altivec.h> 89 #include <machine/cpu.h> 90 #include <machine/elf.h> 91 #include <machine/fpu.h> 92 #include <machine/pcb.h> 93 #include <machine/sigframe.h> 94 #include <machine/trap.h> 95 #include <machine/vmparam.h> 96 97 #include <vm/pmap.h> 98 99 #ifdef FPU_EMU 100 #include <powerpc/fpu/fpu_extern.h> 101 #endif 102 103 #ifdef COMPAT_FREEBSD32 104 #include <compat/freebsd32/freebsd32_signal.h> 105 #include <compat/freebsd32/freebsd32_util.h> 106 #include <compat/freebsd32/freebsd32_proto.h> 107 108 typedef struct __ucontext32 { 109 sigset_t uc_sigmask; 110 mcontext32_t uc_mcontext; 111 uint32_t uc_link; 112 struct sigaltstack32 uc_stack; 113 uint32_t uc_flags; 114 uint32_t __spare__[4]; 115 } ucontext32_t; 116 117 struct sigframe32 { 118 ucontext32_t sf_uc; 119 struct siginfo32 sf_si; 120 }; 121 122 static int grab_mcontext32(struct thread *td, mcontext32_t *, int flags); 123 #endif 124 125 static int grab_mcontext(struct thread *, mcontext_t *, int); 126 127 static void cleanup_power_extras(struct thread *); 128 129 #ifdef __powerpc64__ 130 extern struct sysentvec elf64_freebsd_sysvec_v2; 131 #endif 132 133 #ifdef __powerpc64__ 134 _Static_assert(sizeof(mcontext_t) == 1392, "mcontext_t size incorrect"); 135 _Static_assert(sizeof(ucontext_t) == 1472, "ucontext_t size incorrect"); 136 _Static_assert(sizeof(siginfo_t) == 80, "siginfo_t size incorrect"); 137 #ifdef COMPAT_FREEBSD32 138 _Static_assert(sizeof(mcontext32_t) == 1224, "mcontext32_t size incorrect"); 139 _Static_assert(sizeof(ucontext32_t) == 1280, "ucontext32_t size incorrect"); 140 _Static_assert(sizeof(struct siginfo32) == 64, "struct siginfo32 size incorrect"); 141 #endif /* COMPAT_FREEBSD32 */ 142 #else /* powerpc */ 143 _Static_assert(sizeof(mcontext_t) == 1224, "mcontext_t size incorrect"); 144 _Static_assert(sizeof(ucontext_t) == 1280, "ucontext_t size incorrect"); 145 _Static_assert(sizeof(siginfo_t) == 64, "siginfo_t size incorrect"); 146 #endif 147 148 void 149 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 150 { 151 struct trapframe *tf; 152 struct sigacts *psp; 153 struct sigframe sf; 154 struct thread *td; 155 struct proc *p; 156 #ifdef COMPAT_FREEBSD32 157 struct siginfo32 siginfo32; 158 struct sigframe32 sf32; 159 #endif 160 size_t sfpsize; 161 caddr_t sfp, usfp; 162 register_t sp; 163 int oonstack, rndfsize; 164 int sig; 165 int code; 166 167 td = curthread; 168 p = td->td_proc; 169 PROC_LOCK_ASSERT(p, MA_OWNED); 170 171 psp = p->p_sigacts; 172 mtx_assert(&psp->ps_mtx, MA_OWNED); 173 tf = td->td_frame; 174 175 /* 176 * Fill siginfo structure. 177 */ 178 ksi->ksi_info.si_signo = ksi->ksi_signo; 179 ksi->ksi_info.si_addr = 180 (void *)((tf->exc == EXC_DSI || tf->exc == EXC_DSE) ? 181 tf->dar : tf->srr0); 182 183 #ifdef COMPAT_FREEBSD32 184 if (SV_PROC_FLAG(p, SV_ILP32)) { 185 siginfo_to_siginfo32(&ksi->ksi_info, &siginfo32); 186 sig = siginfo32.si_signo; 187 code = siginfo32.si_code; 188 sfp = (caddr_t)&sf32; 189 sfpsize = sizeof(sf32); 190 rndfsize = roundup(sizeof(sf32), 16); 191 sp = (uint32_t)tf->fixreg[1]; 192 oonstack = sigonstack(sp); 193 194 /* 195 * Save user context 196 */ 197 198 memset(&sf32, 0, sizeof(sf32)); 199 grab_mcontext32(td, &sf32.sf_uc.uc_mcontext, 0); 200 201 sf32.sf_uc.uc_sigmask = *mask; 202 sf32.sf_uc.uc_stack.ss_sp = (uintptr_t)td->td_sigstk.ss_sp; 203 sf32.sf_uc.uc_stack.ss_size = (uint32_t)td->td_sigstk.ss_size; 204 sf32.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 205 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 206 207 sf32.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 208 } else { 209 #endif 210 sig = ksi->ksi_signo; 211 code = ksi->ksi_code; 212 sfp = (caddr_t)&sf; 213 sfpsize = sizeof(sf); 214 #ifdef __powerpc64__ 215 /* 216 * 64-bit PPC defines a 288 byte scratch region 217 * below the stack. 218 */ 219 rndfsize = 288 + roundup(sizeof(sf), 48); 220 #else 221 rndfsize = roundup(sizeof(sf), 16); 222 #endif 223 sp = tf->fixreg[1]; 224 oonstack = sigonstack(sp); 225 226 /* 227 * Save user context 228 */ 229 230 memset(&sf, 0, sizeof(sf)); 231 grab_mcontext(td, &sf.sf_uc.uc_mcontext, 0); 232 233 sf.sf_uc.uc_sigmask = *mask; 234 sf.sf_uc.uc_stack = td->td_sigstk; 235 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 236 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 237 238 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 239 #ifdef COMPAT_FREEBSD32 240 } 241 #endif 242 243 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 244 catcher, sig); 245 246 /* 247 * Allocate and validate space for the signal handler context. 248 */ 249 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 250 SIGISMEMBER(psp->ps_sigonstack, sig)) { 251 usfp = (void *)(((uintptr_t)td->td_sigstk.ss_sp + 252 td->td_sigstk.ss_size - rndfsize) & ~0xFul); 253 } else { 254 usfp = (void *)((sp - rndfsize) & ~0xFul); 255 } 256 257 /* 258 * Set Floating Point facility to "Ignore Exceptions Mode" so signal 259 * handler can run. 260 */ 261 if (td->td_pcb->pcb_flags & PCB_FPU) 262 tf->srr1 = tf->srr1 & ~(PSL_FE0 | PSL_FE1); 263 264 /* 265 * Set up the registers to return to sigcode. 266 * 267 * r1/sp - sigframe ptr 268 * lr - sig function, dispatched to by blrl in trampoline 269 * r3 - sig number 270 * r4 - SIGINFO ? &siginfo : exception code 271 * r5 - user context 272 * srr0 - trampoline function addr 273 */ 274 tf->lr = (register_t)catcher; 275 tf->fixreg[1] = (register_t)usfp; 276 tf->fixreg[FIRSTARG] = sig; 277 #ifdef COMPAT_FREEBSD32 278 tf->fixreg[FIRSTARG+2] = (register_t)usfp + 279 ((SV_PROC_FLAG(p, SV_ILP32)) ? 280 offsetof(struct sigframe32, sf_uc) : 281 offsetof(struct sigframe, sf_uc)); 282 #else 283 tf->fixreg[FIRSTARG+2] = (register_t)usfp + 284 offsetof(struct sigframe, sf_uc); 285 #endif 286 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 287 /* 288 * Signal handler installed with SA_SIGINFO. 289 */ 290 #ifdef COMPAT_FREEBSD32 291 if (SV_PROC_FLAG(p, SV_ILP32)) { 292 sf32.sf_si = siginfo32; 293 tf->fixreg[FIRSTARG+1] = (register_t)usfp + 294 offsetof(struct sigframe32, sf_si); 295 sf32.sf_si = siginfo32; 296 } else { 297 #endif 298 tf->fixreg[FIRSTARG+1] = (register_t)usfp + 299 offsetof(struct sigframe, sf_si); 300 sf.sf_si = ksi->ksi_info; 301 #ifdef COMPAT_FREEBSD32 302 } 303 #endif 304 } else { 305 /* Old FreeBSD-style arguments. */ 306 tf->fixreg[FIRSTARG+1] = code; 307 tf->fixreg[FIRSTARG+3] = (tf->exc == EXC_DSI) ? 308 tf->dar : tf->srr0; 309 } 310 mtx_unlock(&psp->ps_mtx); 311 PROC_UNLOCK(p); 312 313 tf->srr0 = (register_t)p->p_sysent->sv_sigcode_base; 314 315 /* 316 * copy the frame out to userland. 317 */ 318 if (copyout(sfp, usfp, sfpsize) != 0) { 319 /* 320 * Process has trashed its stack. Kill it. 321 */ 322 CTR2(KTR_SIG, "sendsig: sigexit td=%p sfp=%p", td, sfp); 323 PROC_LOCK(p); 324 sigexit(td, SIGILL); 325 } 326 327 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, 328 tf->srr0, tf->fixreg[1]); 329 330 PROC_LOCK(p); 331 mtx_lock(&psp->ps_mtx); 332 } 333 334 int 335 sys_sigreturn(struct thread *td, struct sigreturn_args *uap) 336 { 337 ucontext_t uc; 338 int error; 339 340 CTR2(KTR_SIG, "sigreturn: td=%p ucp=%p", td, uap->sigcntxp); 341 342 if (copyin(uap->sigcntxp, &uc, sizeof(uc)) != 0) { 343 CTR1(KTR_SIG, "sigreturn: efault td=%p", td); 344 return (EFAULT); 345 } 346 347 error = set_mcontext(td, &uc.uc_mcontext); 348 if (error != 0) 349 return (error); 350 351 /* 352 * Save FPU state if needed. User may have changed it on 353 * signal handler 354 */ 355 if (uc.uc_mcontext.mc_srr1 & PSL_FP) 356 save_fpu(td); 357 358 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 359 360 CTR3(KTR_SIG, "sigreturn: return td=%p pc=%#x sp=%#x", 361 td, uc.uc_mcontext.mc_srr0, uc.uc_mcontext.mc_gpr[1]); 362 363 return (EJUSTRETURN); 364 } 365 366 #ifdef COMPAT_FREEBSD4 367 int 368 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 369 { 370 371 return sys_sigreturn(td, (struct sigreturn_args *)uap); 372 } 373 #endif 374 375 /* 376 * Construct a PCB from a trapframe. This is called from kdb_trap() where 377 * we want to start a backtrace from the function that caused us to enter 378 * the debugger. We have the context in the trapframe, but base the trace 379 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 380 * enough for a backtrace. 381 */ 382 void 383 makectx(struct trapframe *tf, struct pcb *pcb) 384 { 385 386 pcb->pcb_lr = tf->srr0; 387 pcb->pcb_sp = tf->fixreg[1]; 388 } 389 390 /* 391 * get_mcontext/sendsig helper routine that doesn't touch the 392 * proc lock 393 */ 394 static int 395 grab_mcontext(struct thread *td, mcontext_t *mcp, int flags) 396 { 397 struct pcb *pcb; 398 int i; 399 400 pcb = td->td_pcb; 401 402 memset(mcp, 0, sizeof(mcontext_t)); 403 404 mcp->mc_vers = _MC_VERSION; 405 mcp->mc_flags = 0; 406 memcpy(&mcp->mc_frame, td->td_frame, sizeof(struct trapframe)); 407 if (flags & GET_MC_CLEAR_RET) { 408 mcp->mc_gpr[3] = 0; 409 mcp->mc_gpr[4] = 0; 410 } 411 412 /* 413 * This assumes that floating-point context is *not* lazy, 414 * so if the thread has used FP there would have been a 415 * FP-unavailable exception that would have set things up 416 * correctly. 417 */ 418 if (pcb->pcb_flags & PCB_FPREGS) { 419 if (pcb->pcb_flags & PCB_FPU) { 420 KASSERT(td == curthread, 421 ("get_mcontext: fp save not curthread")); 422 critical_enter(); 423 save_fpu(td); 424 critical_exit(); 425 } 426 mcp->mc_flags |= _MC_FP_VALID; 427 memcpy(&mcp->mc_fpscr, &pcb->pcb_fpu.fpscr, sizeof(double)); 428 for (i = 0; i < 32; i++) 429 memcpy(&mcp->mc_fpreg[i], &pcb->pcb_fpu.fpr[i].fpr, 430 sizeof(double)); 431 } 432 433 if (pcb->pcb_flags & PCB_VSX) { 434 for (i = 0; i < 32; i++) 435 memcpy(&mcp->mc_vsxfpreg[i], 436 &pcb->pcb_fpu.fpr[i].vsr[2], sizeof(double)); 437 } 438 439 /* 440 * Repeat for Altivec context 441 */ 442 443 if (pcb->pcb_flags & PCB_VEC) { 444 KASSERT(td == curthread, 445 ("get_mcontext: fp save not curthread")); 446 critical_enter(); 447 save_vec(td); 448 critical_exit(); 449 mcp->mc_flags |= _MC_AV_VALID; 450 mcp->mc_vscr = pcb->pcb_vec.vscr; 451 mcp->mc_vrsave = pcb->pcb_vec.vrsave; 452 memcpy(mcp->mc_avec, pcb->pcb_vec.vr, sizeof(mcp->mc_avec)); 453 } 454 455 mcp->mc_len = sizeof(*mcp); 456 457 return (0); 458 } 459 460 int 461 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 462 { 463 int error; 464 465 error = grab_mcontext(td, mcp, flags); 466 if (error == 0) { 467 PROC_LOCK(curthread->td_proc); 468 mcp->mc_onstack = sigonstack(td->td_frame->fixreg[1]); 469 PROC_UNLOCK(curthread->td_proc); 470 } 471 472 return (error); 473 } 474 475 int 476 set_mcontext(struct thread *td, mcontext_t *mcp) 477 { 478 struct pcb *pcb; 479 struct trapframe *tf; 480 register_t tls; 481 int i; 482 483 pcb = td->td_pcb; 484 tf = td->td_frame; 485 486 if (mcp->mc_vers != _MC_VERSION || mcp->mc_len != sizeof(*mcp)) 487 return (EINVAL); 488 489 /* 490 * Don't let the user change privileged MSR bits. 491 * 492 * psl_userstatic is used here to mask off any bits that can 493 * legitimately vary between user contexts (Floating point 494 * exception control and any facilities that we are using the 495 * "enable on first use" pattern with.) 496 * 497 * All other bits are required to match psl_userset(32). 498 * 499 * Remember to update the platform cpu_init code when implementing 500 * support for a new conditional facility! 501 */ 502 if ((mcp->mc_srr1 & psl_userstatic) != (tf->srr1 & psl_userstatic)) { 503 return (EINVAL); 504 } 505 506 /* Copy trapframe, preserving TLS pointer across context change */ 507 if (SV_PROC_FLAG(td->td_proc, SV_LP64)) 508 tls = tf->fixreg[13]; 509 else 510 tls = tf->fixreg[2]; 511 memcpy(tf, mcp->mc_frame, sizeof(mcp->mc_frame)); 512 if (SV_PROC_FLAG(td->td_proc, SV_LP64)) 513 tf->fixreg[13] = tls; 514 else 515 tf->fixreg[2] = tls; 516 517 /* 518 * Force the FPU back off to ensure the new context will not bypass 519 * the enable_fpu() setup code accidentally. 520 * 521 * This prevents an issue where a process that uses floating point 522 * inside a signal handler could end up in a state where the MSR 523 * did not match pcb_flags. 524 * 525 * Additionally, ensure VSX is disabled as well, as it is illegal 526 * to leave it turned on when FP or VEC are off. 527 */ 528 tf->srr1 &= ~(PSL_FP | PSL_VSX); 529 pcb->pcb_flags &= ~(PCB_FPU | PCB_VSX); 530 531 if (mcp->mc_flags & _MC_FP_VALID) { 532 /* enable_fpu() will happen lazily on a fault */ 533 pcb->pcb_flags |= PCB_FPREGS; 534 memcpy(&pcb->pcb_fpu.fpscr, &mcp->mc_fpscr, sizeof(double)); 535 bzero(pcb->pcb_fpu.fpr, sizeof(pcb->pcb_fpu.fpr)); 536 for (i = 0; i < 32; i++) { 537 memcpy(&pcb->pcb_fpu.fpr[i].fpr, &mcp->mc_fpreg[i], 538 sizeof(double)); 539 memcpy(&pcb->pcb_fpu.fpr[i].vsr[2], 540 &mcp->mc_vsxfpreg[i], sizeof(double)); 541 } 542 } 543 544 if (mcp->mc_flags & _MC_AV_VALID) { 545 if ((pcb->pcb_flags & PCB_VEC) != PCB_VEC) { 546 critical_enter(); 547 enable_vec(td); 548 critical_exit(); 549 } 550 pcb->pcb_vec.vscr = mcp->mc_vscr; 551 pcb->pcb_vec.vrsave = mcp->mc_vrsave; 552 memcpy(pcb->pcb_vec.vr, mcp->mc_avec, sizeof(mcp->mc_avec)); 553 } else { 554 tf->srr1 &= ~PSL_VEC; 555 pcb->pcb_flags &= ~PCB_VEC; 556 } 557 558 return (0); 559 } 560 561 /* 562 * Clean up extra POWER state. Some per-process registers and states are not 563 * managed by the MSR, so must be cleaned up explicitly on thread exit. 564 * 565 * Currently this includes: 566 * DSCR -- Data stream control register (PowerISA 2.06+) 567 * FSCR -- Facility Status and Control Register (PowerISA 2.07+) 568 */ 569 static void 570 cleanup_power_extras(struct thread *td) 571 { 572 uint32_t pcb_flags; 573 574 if (td != curthread) 575 return; 576 577 pcb_flags = td->td_pcb->pcb_flags; 578 /* Clean up registers not managed by MSR. */ 579 if (pcb_flags & PCB_CFSCR) 580 mtspr(SPR_FSCR, 0); 581 if (pcb_flags & PCB_CDSCR) 582 mtspr(SPR_DSCRP, 0); 583 584 if (pcb_flags & PCB_FPU) 585 cleanup_fpscr(); 586 } 587 588 /* 589 * Ensure the PCB has been updated in preparation for copying a thread. 590 * 591 * This is needed because normally this only happens during switching tasks, 592 * but when we are cloning a thread, we need the updated state before doing 593 * the actual copy, so the new thread inherits the current state instead of 594 * the state at the last task switch. 595 * 596 * Keep this in sync with the assembly code in cpu_switch()! 597 */ 598 void 599 cpu_save_thread_regs(struct thread *td) 600 { 601 uint32_t pcb_flags; 602 struct pcb *pcb; 603 604 KASSERT(td == curthread, 605 ("cpu_save_thread_regs: td is not curthread")); 606 607 pcb = td->td_pcb; 608 609 pcb_flags = pcb->pcb_flags; 610 611 #if defined(__powerpc64__) 612 /* Are *any* FSCR flags in use? */ 613 if (pcb_flags & PCB_CFSCR) { 614 pcb->pcb_fscr = mfspr(SPR_FSCR); 615 616 if (pcb->pcb_fscr & FSCR_EBB) { 617 pcb->pcb_ebb.ebbhr = mfspr(SPR_EBBHR); 618 pcb->pcb_ebb.ebbrr = mfspr(SPR_EBBRR); 619 pcb->pcb_ebb.bescr = mfspr(SPR_BESCR); 620 } 621 if (pcb->pcb_fscr & FSCR_LM) { 622 pcb->pcb_lm.lmrr = mfspr(SPR_LMRR); 623 pcb->pcb_lm.lmser = mfspr(SPR_LMSER); 624 } 625 if (pcb->pcb_fscr & FSCR_TAR) 626 pcb->pcb_tar = mfspr(SPR_TAR); 627 } 628 629 /* 630 * This is outside of the PCB_CFSCR check because it can be set 631 * independently when running on POWER7/POWER8. 632 */ 633 if (pcb_flags & PCB_CDSCR) 634 pcb->pcb_dscr = mfspr(SPR_DSCRP); 635 #endif 636 637 #if defined(__SPE__) 638 /* 639 * On E500v2, single-precision scalar instructions and access to 640 * SPEFSCR may be used without PSL_VEC turned on, as long as they 641 * limit themselves to the low word of the registers. 642 * 643 * As such, we need to unconditionally save SPEFSCR, even though 644 * it is also updated in save_vec_nodrop(). 645 */ 646 pcb->pcb_vec.vscr = mfspr(SPR_SPEFSCR); 647 #endif 648 649 if (pcb_flags & PCB_FPU) 650 save_fpu_nodrop(td); 651 652 if (pcb_flags & PCB_VEC) 653 save_vec_nodrop(td); 654 } 655 656 /* 657 * Set set up registers on exec. 658 */ 659 void 660 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack) 661 { 662 struct trapframe *tf; 663 register_t argc; 664 665 tf = trapframe(td); 666 bzero(tf, sizeof *tf); 667 #ifdef __powerpc64__ 668 tf->fixreg[1] = -roundup(-stack + 48, 16); 669 #else 670 tf->fixreg[1] = -roundup(-stack + 8, 16); 671 #endif 672 673 /* 674 * Set up arguments for _start(): 675 * _start(argc, argv, envp, obj, cleanup, ps_strings); 676 * 677 * Notes: 678 * - obj and cleanup are the auxilliary and termination 679 * vectors. They are fixed up by ld.elf_so. 680 * - ps_strings is a NetBSD extention, and will be 681 * ignored by executables which are strictly 682 * compliant with the SVR4 ABI. 683 */ 684 685 /* Collect argc from the user stack */ 686 argc = fuword((void *)stack); 687 688 tf->fixreg[3] = argc; 689 tf->fixreg[4] = stack + sizeof(register_t); 690 tf->fixreg[5] = stack + (2 + argc)*sizeof(register_t); 691 tf->fixreg[6] = 0; /* auxillary vector */ 692 tf->fixreg[7] = 0; /* termination vector */ 693 tf->fixreg[8] = (register_t)imgp->ps_strings; /* NetBSD extension */ 694 695 tf->srr0 = imgp->entry_addr; 696 #ifdef __powerpc64__ 697 tf->fixreg[12] = imgp->entry_addr; 698 #endif 699 tf->srr1 = psl_userset | PSL_FE_DFLT; 700 cleanup_power_extras(td); 701 td->td_pcb->pcb_flags = 0; 702 } 703 704 #ifdef COMPAT_FREEBSD32 705 void 706 ppc32_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack) 707 { 708 struct trapframe *tf; 709 uint32_t argc; 710 711 tf = trapframe(td); 712 bzero(tf, sizeof *tf); 713 tf->fixreg[1] = -roundup(-stack + 8, 16); 714 715 argc = fuword32((void *)stack); 716 717 tf->fixreg[3] = argc; 718 tf->fixreg[4] = stack + sizeof(uint32_t); 719 tf->fixreg[5] = stack + (2 + argc)*sizeof(uint32_t); 720 tf->fixreg[6] = 0; /* auxillary vector */ 721 tf->fixreg[7] = 0; /* termination vector */ 722 tf->fixreg[8] = (register_t)imgp->ps_strings; /* NetBSD extension */ 723 724 tf->srr0 = imgp->entry_addr; 725 tf->srr1 = psl_userset32 | PSL_FE_DFLT; 726 cleanup_power_extras(td); 727 td->td_pcb->pcb_flags = 0; 728 } 729 #endif 730 731 int 732 fill_regs(struct thread *td, struct reg *regs) 733 { 734 struct trapframe *tf; 735 736 tf = td->td_frame; 737 memcpy(regs, tf, sizeof(struct reg)); 738 739 return (0); 740 } 741 742 int 743 fill_dbregs(struct thread *td, struct dbreg *dbregs) 744 { 745 /* No debug registers on PowerPC */ 746 return (ENOSYS); 747 } 748 749 int 750 fill_fpregs(struct thread *td, struct fpreg *fpregs) 751 { 752 struct pcb *pcb; 753 int i; 754 755 pcb = td->td_pcb; 756 757 if ((pcb->pcb_flags & PCB_FPREGS) == 0) 758 memset(fpregs, 0, sizeof(struct fpreg)); 759 else { 760 memcpy(&fpregs->fpscr, &pcb->pcb_fpu.fpscr, sizeof(double)); 761 for (i = 0; i < 32; i++) 762 memcpy(&fpregs->fpreg[i], &pcb->pcb_fpu.fpr[i].fpr, 763 sizeof(double)); 764 } 765 766 return (0); 767 } 768 769 int 770 set_regs(struct thread *td, struct reg *regs) 771 { 772 struct trapframe *tf; 773 774 tf = td->td_frame; 775 memcpy(tf, regs, sizeof(struct reg)); 776 777 return (0); 778 } 779 780 int 781 set_dbregs(struct thread *td, struct dbreg *dbregs) 782 { 783 /* No debug registers on PowerPC */ 784 return (ENOSYS); 785 } 786 787 int 788 set_fpregs(struct thread *td, struct fpreg *fpregs) 789 { 790 struct pcb *pcb; 791 int i; 792 793 pcb = td->td_pcb; 794 pcb->pcb_flags |= PCB_FPREGS; 795 memcpy(&pcb->pcb_fpu.fpscr, &fpregs->fpscr, sizeof(double)); 796 for (i = 0; i < 32; i++) { 797 memcpy(&pcb->pcb_fpu.fpr[i].fpr, &fpregs->fpreg[i], 798 sizeof(double)); 799 } 800 801 return (0); 802 } 803 804 #ifdef COMPAT_FREEBSD32 805 int 806 set_regs32(struct thread *td, struct reg32 *regs) 807 { 808 struct trapframe *tf; 809 int i; 810 811 tf = td->td_frame; 812 for (i = 0; i < 32; i++) 813 tf->fixreg[i] = regs->fixreg[i]; 814 tf->lr = regs->lr; 815 tf->cr = regs->cr; 816 tf->xer = regs->xer; 817 tf->ctr = regs->ctr; 818 tf->srr0 = regs->pc; 819 820 return (0); 821 } 822 823 int 824 fill_regs32(struct thread *td, struct reg32 *regs) 825 { 826 struct trapframe *tf; 827 int i; 828 829 tf = td->td_frame; 830 for (i = 0; i < 32; i++) 831 regs->fixreg[i] = tf->fixreg[i]; 832 regs->lr = tf->lr; 833 regs->cr = tf->cr; 834 regs->xer = tf->xer; 835 regs->ctr = tf->ctr; 836 regs->pc = tf->srr0; 837 838 return (0); 839 } 840 841 static int 842 grab_mcontext32(struct thread *td, mcontext32_t *mcp, int flags) 843 { 844 mcontext_t mcp64; 845 int i, error; 846 847 error = grab_mcontext(td, &mcp64, flags); 848 if (error != 0) 849 return (error); 850 851 mcp->mc_vers = mcp64.mc_vers; 852 mcp->mc_flags = mcp64.mc_flags; 853 mcp->mc_onstack = mcp64.mc_onstack; 854 mcp->mc_len = mcp64.mc_len; 855 memcpy(mcp->mc_avec,mcp64.mc_avec,sizeof(mcp64.mc_avec)); 856 memcpy(mcp->mc_av,mcp64.mc_av,sizeof(mcp64.mc_av)); 857 for (i = 0; i < 42; i++) 858 mcp->mc_frame[i] = mcp64.mc_frame[i]; 859 memcpy(mcp->mc_fpreg,mcp64.mc_fpreg,sizeof(mcp64.mc_fpreg)); 860 memcpy(mcp->mc_vsxfpreg,mcp64.mc_vsxfpreg,sizeof(mcp64.mc_vsxfpreg)); 861 862 return (0); 863 } 864 865 static int 866 get_mcontext32(struct thread *td, mcontext32_t *mcp, int flags) 867 { 868 int error; 869 870 error = grab_mcontext32(td, mcp, flags); 871 if (error == 0) { 872 PROC_LOCK(curthread->td_proc); 873 mcp->mc_onstack = sigonstack(td->td_frame->fixreg[1]); 874 PROC_UNLOCK(curthread->td_proc); 875 } 876 877 return (error); 878 } 879 880 static int 881 set_mcontext32(struct thread *td, mcontext32_t *mcp) 882 { 883 mcontext_t mcp64; 884 int i, error; 885 886 mcp64.mc_vers = mcp->mc_vers; 887 mcp64.mc_flags = mcp->mc_flags; 888 mcp64.mc_onstack = mcp->mc_onstack; 889 mcp64.mc_len = mcp->mc_len; 890 memcpy(mcp64.mc_avec,mcp->mc_avec,sizeof(mcp64.mc_avec)); 891 memcpy(mcp64.mc_av,mcp->mc_av,sizeof(mcp64.mc_av)); 892 for (i = 0; i < 42; i++) 893 mcp64.mc_frame[i] = mcp->mc_frame[i]; 894 mcp64.mc_srr1 |= (td->td_frame->srr1 & 0xFFFFFFFF00000000ULL); 895 memcpy(mcp64.mc_fpreg,mcp->mc_fpreg,sizeof(mcp64.mc_fpreg)); 896 memcpy(mcp64.mc_vsxfpreg,mcp->mc_vsxfpreg,sizeof(mcp64.mc_vsxfpreg)); 897 898 error = set_mcontext(td, &mcp64); 899 900 return (error); 901 } 902 #endif 903 904 #ifdef COMPAT_FREEBSD32 905 int 906 freebsd32_sigreturn(struct thread *td, struct freebsd32_sigreturn_args *uap) 907 { 908 ucontext32_t uc; 909 int error; 910 911 CTR2(KTR_SIG, "sigreturn: td=%p ucp=%p", td, uap->sigcntxp); 912 913 if (copyin(uap->sigcntxp, &uc, sizeof(uc)) != 0) { 914 CTR1(KTR_SIG, "sigreturn: efault td=%p", td); 915 return (EFAULT); 916 } 917 918 error = set_mcontext32(td, &uc.uc_mcontext); 919 if (error != 0) 920 return (error); 921 922 /* 923 * Save FPU state if needed. User may have changed it on 924 * signal handler 925 */ 926 if (uc.uc_mcontext.mc_srr1 & PSL_FP) 927 save_fpu(td); 928 929 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 930 931 CTR3(KTR_SIG, "sigreturn: return td=%p pc=%#x sp=%#x", 932 td, uc.uc_mcontext.mc_srr0, uc.uc_mcontext.mc_gpr[1]); 933 934 return (EJUSTRETURN); 935 } 936 937 /* 938 * The first two fields of a ucontext_t are the signal mask and the machine 939 * context. The next field is uc_link; we want to avoid destroying the link 940 * when copying out contexts. 941 */ 942 #define UC32_COPY_SIZE offsetof(ucontext32_t, uc_link) 943 944 int 945 freebsd32_getcontext(struct thread *td, struct freebsd32_getcontext_args *uap) 946 { 947 ucontext32_t uc; 948 int ret; 949 950 if (uap->ucp == NULL) 951 ret = EINVAL; 952 else { 953 bzero(&uc, sizeof(uc)); 954 get_mcontext32(td, &uc.uc_mcontext, GET_MC_CLEAR_RET); 955 PROC_LOCK(td->td_proc); 956 uc.uc_sigmask = td->td_sigmask; 957 PROC_UNLOCK(td->td_proc); 958 ret = copyout(&uc, uap->ucp, UC32_COPY_SIZE); 959 } 960 return (ret); 961 } 962 963 int 964 freebsd32_setcontext(struct thread *td, struct freebsd32_setcontext_args *uap) 965 { 966 ucontext32_t uc; 967 int ret; 968 969 if (uap->ucp == NULL) 970 ret = EINVAL; 971 else { 972 ret = copyin(uap->ucp, &uc, UC32_COPY_SIZE); 973 if (ret == 0) { 974 ret = set_mcontext32(td, &uc.uc_mcontext); 975 if (ret == 0) { 976 kern_sigprocmask(td, SIG_SETMASK, 977 &uc.uc_sigmask, NULL, 0); 978 } 979 } 980 } 981 return (ret == 0 ? EJUSTRETURN : ret); 982 } 983 984 int 985 freebsd32_swapcontext(struct thread *td, struct freebsd32_swapcontext_args *uap) 986 { 987 ucontext32_t uc; 988 int ret; 989 990 if (uap->oucp == NULL || uap->ucp == NULL) 991 ret = EINVAL; 992 else { 993 bzero(&uc, sizeof(uc)); 994 get_mcontext32(td, &uc.uc_mcontext, GET_MC_CLEAR_RET); 995 PROC_LOCK(td->td_proc); 996 uc.uc_sigmask = td->td_sigmask; 997 PROC_UNLOCK(td->td_proc); 998 ret = copyout(&uc, uap->oucp, UC32_COPY_SIZE); 999 if (ret == 0) { 1000 ret = copyin(uap->ucp, &uc, UC32_COPY_SIZE); 1001 if (ret == 0) { 1002 ret = set_mcontext32(td, &uc.uc_mcontext); 1003 if (ret == 0) { 1004 kern_sigprocmask(td, SIG_SETMASK, 1005 &uc.uc_sigmask, NULL, 0); 1006 } 1007 } 1008 } 1009 } 1010 return (ret == 0 ? EJUSTRETURN : ret); 1011 } 1012 1013 #endif 1014 1015 void 1016 cpu_set_syscall_retval(struct thread *td, int error) 1017 { 1018 struct proc *p; 1019 struct trapframe *tf; 1020 int fixup; 1021 1022 if (error == EJUSTRETURN) 1023 return; 1024 1025 p = td->td_proc; 1026 tf = td->td_frame; 1027 1028 if (tf->fixreg[0] == SYS___syscall && 1029 (SV_PROC_FLAG(p, SV_ILP32))) { 1030 int code = tf->fixreg[FIRSTARG + 1]; 1031 fixup = ( 1032 #if defined(COMPAT_FREEBSD6) && defined(SYS_freebsd6_lseek) 1033 code != SYS_freebsd6_lseek && 1034 #endif 1035 code != SYS_lseek) ? 1 : 0; 1036 } else 1037 fixup = 0; 1038 1039 switch (error) { 1040 case 0: 1041 if (fixup) { 1042 /* 1043 * 64-bit return, 32-bit syscall. Fixup byte order 1044 */ 1045 tf->fixreg[FIRSTARG] = 0; 1046 tf->fixreg[FIRSTARG + 1] = td->td_retval[0]; 1047 } else { 1048 tf->fixreg[FIRSTARG] = td->td_retval[0]; 1049 tf->fixreg[FIRSTARG + 1] = td->td_retval[1]; 1050 } 1051 tf->cr &= ~0x10000000; /* Unset summary overflow */ 1052 break; 1053 case ERESTART: 1054 /* 1055 * Set user's pc back to redo the system call. 1056 */ 1057 tf->srr0 -= 4; 1058 break; 1059 default: 1060 tf->fixreg[FIRSTARG] = error; 1061 tf->cr |= 0x10000000; /* Set summary overflow */ 1062 break; 1063 } 1064 } 1065 1066 /* 1067 * Threading functions 1068 */ 1069 void 1070 cpu_thread_exit(struct thread *td) 1071 { 1072 cleanup_power_extras(td); 1073 } 1074 1075 void 1076 cpu_thread_clean(struct thread *td) 1077 { 1078 } 1079 1080 void 1081 cpu_thread_alloc(struct thread *td) 1082 { 1083 struct pcb *pcb; 1084 1085 pcb = (struct pcb *)((td->td_kstack + td->td_kstack_pages * PAGE_SIZE - 1086 sizeof(struct pcb)) & ~0x2fUL); 1087 td->td_pcb = pcb; 1088 td->td_frame = (struct trapframe *)pcb - 1; 1089 } 1090 1091 void 1092 cpu_thread_free(struct thread *td) 1093 { 1094 } 1095 1096 int 1097 cpu_set_user_tls(struct thread *td, void *tls_base) 1098 { 1099 1100 if (SV_PROC_FLAG(td->td_proc, SV_LP64)) 1101 td->td_frame->fixreg[13] = (register_t)tls_base + 0x7010; 1102 else 1103 td->td_frame->fixreg[2] = (register_t)tls_base + 0x7008; 1104 return (0); 1105 } 1106 1107 void 1108 cpu_copy_thread(struct thread *td, struct thread *td0) 1109 { 1110 struct pcb *pcb2; 1111 struct trapframe *tf; 1112 struct callframe *cf; 1113 1114 /* Ensure td0 pcb is up to date. */ 1115 if (td0 == curthread) 1116 cpu_save_thread_regs(td0); 1117 1118 pcb2 = td->td_pcb; 1119 1120 /* Copy the upcall pcb */ 1121 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2)); 1122 1123 /* Create a stack for the new thread */ 1124 tf = td->td_frame; 1125 bcopy(td0->td_frame, tf, sizeof(struct trapframe)); 1126 tf->fixreg[FIRSTARG] = 0; 1127 tf->fixreg[FIRSTARG + 1] = 0; 1128 tf->cr &= ~0x10000000; 1129 1130 /* Set registers for trampoline to user mode. */ 1131 cf = (struct callframe *)tf - 1; 1132 memset(cf, 0, sizeof(struct callframe)); 1133 cf->cf_func = (register_t)fork_return; 1134 cf->cf_arg0 = (register_t)td; 1135 cf->cf_arg1 = (register_t)tf; 1136 1137 pcb2->pcb_sp = (register_t)cf; 1138 #if defined(__powerpc64__) && (!defined(_CALL_ELF) || _CALL_ELF == 1) 1139 pcb2->pcb_lr = ((register_t *)fork_trampoline)[0]; 1140 pcb2->pcb_toc = ((register_t *)fork_trampoline)[1]; 1141 #else 1142 pcb2->pcb_lr = (register_t)fork_trampoline; 1143 pcb2->pcb_context[0] = pcb2->pcb_lr; 1144 #endif 1145 pcb2->pcb_cpu.aim.usr_vsid = 0; 1146 #ifdef __SPE__ 1147 pcb2->pcb_vec.vscr = SPEFSCR_DFLT; 1148 #endif 1149 1150 /* Setup to release spin count in fork_exit(). */ 1151 td->td_md.md_spinlock_count = 1; 1152 td->td_md.md_saved_msr = psl_kernset; 1153 } 1154 1155 void 1156 cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg, 1157 stack_t *stack) 1158 { 1159 struct trapframe *tf; 1160 uintptr_t sp; 1161 1162 tf = td->td_frame; 1163 /* align stack and alloc space for frame ptr and saved LR */ 1164 #ifdef __powerpc64__ 1165 sp = ((uintptr_t)stack->ss_sp + stack->ss_size - 48) & 1166 ~0x1f; 1167 #else 1168 sp = ((uintptr_t)stack->ss_sp + stack->ss_size - 8) & 1169 ~0x1f; 1170 #endif 1171 bzero(tf, sizeof(struct trapframe)); 1172 1173 tf->fixreg[1] = (register_t)sp; 1174 tf->fixreg[3] = (register_t)arg; 1175 if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) { 1176 tf->srr0 = (register_t)entry; 1177 #ifdef __powerpc64__ 1178 tf->srr1 = psl_userset32 | PSL_FE_DFLT; 1179 #else 1180 tf->srr1 = psl_userset | PSL_FE_DFLT; 1181 #endif 1182 } else { 1183 #ifdef __powerpc64__ 1184 if (td->td_proc->p_sysent == &elf64_freebsd_sysvec_v2) { 1185 tf->srr0 = (register_t)entry; 1186 /* ELFv2 ABI requires that the global entry point be in r12. */ 1187 tf->fixreg[12] = (register_t)entry; 1188 } 1189 else { 1190 register_t entry_desc[3]; 1191 (void)copyin((void *)entry, entry_desc, sizeof(entry_desc)); 1192 tf->srr0 = entry_desc[0]; 1193 tf->fixreg[2] = entry_desc[1]; 1194 tf->fixreg[11] = entry_desc[2]; 1195 } 1196 tf->srr1 = psl_userset | PSL_FE_DFLT; 1197 #endif 1198 } 1199 1200 td->td_pcb->pcb_flags = 0; 1201 #ifdef __SPE__ 1202 td->td_pcb->pcb_vec.vscr = SPEFSCR_DFLT; 1203 #endif 1204 1205 td->td_retval[0] = (register_t)entry; 1206 td->td_retval[1] = 0; 1207 } 1208 1209 static int 1210 emulate_mfspr(int spr, int reg, struct trapframe *frame){ 1211 struct thread *td; 1212 1213 td = curthread; 1214 1215 if (spr == SPR_DSCR || spr == SPR_DSCRP) { 1216 if (!(cpu_features2 & PPC_FEATURE2_DSCR)) 1217 return (SIGILL); 1218 // If DSCR was never set, get the default DSCR 1219 if ((td->td_pcb->pcb_flags & PCB_CDSCR) == 0) 1220 td->td_pcb->pcb_dscr = mfspr(SPR_DSCRP); 1221 1222 frame->fixreg[reg] = td->td_pcb->pcb_dscr; 1223 frame->srr0 += 4; 1224 return (0); 1225 } else 1226 return (SIGILL); 1227 } 1228 1229 static int 1230 emulate_mtspr(int spr, int reg, struct trapframe *frame){ 1231 struct thread *td; 1232 1233 td = curthread; 1234 1235 if (spr == SPR_DSCR || spr == SPR_DSCRP) { 1236 if (!(cpu_features2 & PPC_FEATURE2_DSCR)) 1237 return (SIGILL); 1238 td->td_pcb->pcb_flags |= PCB_CDSCR; 1239 td->td_pcb->pcb_dscr = frame->fixreg[reg]; 1240 mtspr(SPR_DSCRP, frame->fixreg[reg]); 1241 frame->srr0 += 4; 1242 return (0); 1243 } else 1244 return (SIGILL); 1245 } 1246 1247 #define XFX 0xFC0007FF 1248 int 1249 ppc_instr_emulate(struct trapframe *frame, struct thread *td) 1250 { 1251 struct pcb *pcb; 1252 uint32_t instr; 1253 int reg, sig; 1254 int rs, spr; 1255 1256 instr = fuword32((void *)frame->srr0); 1257 sig = SIGILL; 1258 1259 if ((instr & 0xfc1fffff) == 0x7c1f42a6) { /* mfpvr */ 1260 reg = (instr & ~0xfc1fffff) >> 21; 1261 frame->fixreg[reg] = mfpvr(); 1262 frame->srr0 += 4; 1263 return (0); 1264 } else if ((instr & XFX) == 0x7c0002a6) { /* mfspr */ 1265 rs = (instr & 0x3e00000) >> 21; 1266 spr = (instr & 0x1ff800) >> 16; 1267 return emulate_mfspr(spr, rs, frame); 1268 } else if ((instr & XFX) == 0x7c0003a6) { /* mtspr */ 1269 rs = (instr & 0x3e00000) >> 21; 1270 spr = (instr & 0x1ff800) >> 16; 1271 return emulate_mtspr(spr, rs, frame); 1272 } else if ((instr & 0xfc000ffe) == 0x7c0004ac) { /* various sync */ 1273 powerpc_sync(); /* Do a heavy-weight sync */ 1274 frame->srr0 += 4; 1275 return (0); 1276 } 1277 1278 pcb = td->td_pcb; 1279 #ifdef FPU_EMU 1280 if (!(pcb->pcb_flags & PCB_FPREGS)) { 1281 bzero(&pcb->pcb_fpu, sizeof(pcb->pcb_fpu)); 1282 pcb->pcb_flags |= PCB_FPREGS; 1283 } else if (pcb->pcb_flags & PCB_FPU) 1284 save_fpu(td); 1285 sig = fpu_emulate(frame, &pcb->pcb_fpu); 1286 if ((sig == 0 || sig == SIGFPE) && pcb->pcb_flags & PCB_FPU) 1287 enable_fpu(td); 1288 #endif 1289 if (sig == SIGILL) { 1290 if (pcb->pcb_lastill != frame->srr0) { 1291 /* Allow a second chance, in case of cache sync issues. */ 1292 sig = 0; 1293 pmap_sync_icache(PCPU_GET(curpmap), frame->srr0, 4); 1294 pcb->pcb_lastill = frame->srr0; 1295 } 1296 } 1297 1298 return (sig); 1299 } 1300