xref: /freebsd/sys/riscv/include/cpu.h (revision a0ee8cc6)
1 /*-
2  * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
3  * All rights reserved.
4  *
5  * Portions of this software were developed by SRI International and the
6  * University of Cambridge Computer Laboratory under DARPA/AFRL contract
7  * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
8  *
9  * Portions of this software were developed by the University of Cambridge
10  * Computer Laboratory as part of the CTSRD Project, with support from the
11  * UK Higher Education Innovation Fund (HEIF).
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  * 1. Redistributions of source code must retain the above copyright
17  *    notice, this list of conditions and the following disclaimer.
18  * 2. Redistributions in binary form must reproduce the above copyright
19  *    notice, this list of conditions and the following disclaimer in the
20  *    documentation and/or other materials provided with the distribution.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  * $FreeBSD$
35  */
36 
37 #ifndef _MACHINE_CPU_H_
38 #define	_MACHINE_CPU_H_
39 
40 #include <machine/atomic.h>
41 #include <machine/frame.h>
42 
43 #define	TRAPF_PC(tfp)		((tfp)->tf_ra)
44 #define	TRAPF_USERMODE(tfp)	(((tfp)->tf_sepc & (1ul << 63)) == 0)
45 
46 #define	cpu_getstack(td)	((td)->td_frame->tf_sp)
47 #define	cpu_setstack(td, sp)	((td)->td_frame->tf_sp = (sp))
48 #define	cpu_spinwait()		/* nothing */
49 
50 #ifdef _KERNEL
51 
52 /*
53  * 0x0000         CPU ID unimplemented
54  * 0x0001         UC Berkeley Rocket repo
55  * 0x0002­0x7FFE  Reserved for open-source repos
56  * 0x7FFF         Reserved for extension
57  * 0x8000         Reserved for anonymous source
58  * 0x8001­0xFFFE  Reserved for proprietary implementations
59  * 0xFFFF         Reserved for extension
60  */
61 
62 #define	CPU_IMPL_SHIFT		0
63 #define	CPU_IMPL_MASK		(0xffff << CPU_IMPL_SHIFT)
64 #define	CPU_IMPL(mimpid)	((mimpid & CPU_IMPL_MASK) >> CPU_IMPL_SHIFT)
65 #define	CPU_IMPL_UNIMPLEMEN	0x0
66 #define	CPU_IMPL_UCB_ROCKET	0x1
67 
68 #define	CPU_PART_SHIFT		62
69 #define	CPU_PART_MASK		(0x3ul << CPU_PART_SHIFT)
70 #define	CPU_PART(mcpuid)	((mcpuid & CPU_PART_MASK) >> CPU_PART_SHIFT)
71 #define	CPU_PART_RV32I		0x0
72 #define	CPU_PART_RV32E		0x1
73 #define	CPU_PART_RV64I		0x2
74 #define	CPU_PART_RV128I		0x3
75 
76 extern char btext[];
77 extern char etext[];
78 
79 void	cpu_halt(void) __dead2;
80 void	cpu_reset(void) __dead2;
81 void	fork_trampoline(void);
82 void	identify_cpu(void);
83 void	swi_vm(void *v);
84 
85 static __inline uint64_t
86 get_cyclecount(void)
87 {
88 
89 	/* TODO: This is bogus */
90 	return (1);
91 }
92 
93 #endif
94 
95 #endif /* !_MACHINE_CPU_H_ */
96