1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 2006 Yahoo!, Inc. 5 * All rights reserved. 6 * Written by: John Baldwin <jhb@FreeBSD.org> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 /* 34 * Support for PCI Message Signalled Interrupts (MSI). MSI interrupts on 35 * x86 are basically APIC messages that the northbridge delivers directly 36 * to the local APICs as if they had come from an I/O APIC. 37 */ 38 39 #include <sys/cdefs.h> 40 __FBSDID("$FreeBSD$"); 41 42 #include "opt_acpi.h" 43 44 #include <sys/param.h> 45 #include <sys/bus.h> 46 #include <sys/kernel.h> 47 #include <sys/lock.h> 48 #include <sys/malloc.h> 49 #include <sys/mutex.h> 50 #include <sys/sx.h> 51 #include <sys/sysctl.h> 52 #include <sys/systm.h> 53 #include <x86/apicreg.h> 54 #include <machine/cputypes.h> 55 #include <machine/md_var.h> 56 #include <machine/frame.h> 57 #include <machine/intr_machdep.h> 58 #include <x86/apicvar.h> 59 #include <x86/iommu/iommu_intrmap.h> 60 #include <machine/specialreg.h> 61 #include <dev/pci/pcivar.h> 62 63 /* Fields in address for Intel MSI messages. */ 64 #define MSI_INTEL_ADDR_DEST 0x000ff000 65 #define MSI_INTEL_ADDR_RH 0x00000008 66 # define MSI_INTEL_ADDR_RH_ON 0x00000008 67 # define MSI_INTEL_ADDR_RH_OFF 0x00000000 68 #define MSI_INTEL_ADDR_DM 0x00000004 69 # define MSI_INTEL_ADDR_DM_PHYSICAL 0x00000000 70 # define MSI_INTEL_ADDR_DM_LOGICAL 0x00000004 71 72 /* Fields in data for Intel MSI messages. */ 73 #define MSI_INTEL_DATA_TRGRMOD IOART_TRGRMOD /* Trigger mode. */ 74 # define MSI_INTEL_DATA_TRGREDG IOART_TRGREDG 75 # define MSI_INTEL_DATA_TRGRLVL IOART_TRGRLVL 76 #define MSI_INTEL_DATA_LEVEL 0x00004000 /* Polarity. */ 77 # define MSI_INTEL_DATA_DEASSERT 0x00000000 78 # define MSI_INTEL_DATA_ASSERT 0x00004000 79 #define MSI_INTEL_DATA_DELMOD IOART_DELMOD /* Delivery mode. */ 80 # define MSI_INTEL_DATA_DELFIXED IOART_DELFIXED 81 # define MSI_INTEL_DATA_DELLOPRI IOART_DELLOPRI 82 # define MSI_INTEL_DATA_DELSMI IOART_DELSMI 83 # define MSI_INTEL_DATA_DELNMI IOART_DELNMI 84 # define MSI_INTEL_DATA_DELINIT IOART_DELINIT 85 # define MSI_INTEL_DATA_DELEXINT IOART_DELEXINT 86 #define MSI_INTEL_DATA_INTVEC IOART_INTVEC /* Interrupt vector. */ 87 88 /* 89 * Build Intel MSI message and data values from a source. AMD64 systems 90 * seem to be compatible, so we use the same function for both. 91 */ 92 #define INTEL_ADDR(msi) \ 93 (MSI_INTEL_ADDR_BASE | (msi)->msi_cpu << 12 | \ 94 MSI_INTEL_ADDR_RH_OFF | MSI_INTEL_ADDR_DM_PHYSICAL) 95 #define INTEL_DATA(msi) \ 96 (MSI_INTEL_DATA_TRGREDG | MSI_INTEL_DATA_DELFIXED | (msi)->msi_vector) 97 98 static MALLOC_DEFINE(M_MSI, "msi", "PCI MSI"); 99 100 /* 101 * MSI sources are bunched into groups. This is because MSI forces 102 * all of the messages to share the address and data registers and 103 * thus certain properties (such as the local APIC ID target on x86). 104 * Each group has a 'first' source that contains information global to 105 * the group. These fields are marked with (g) below. 106 * 107 * Note that local APIC ID is kind of special. Each message will be 108 * assigned an ID by the system; however, a group will use the ID from 109 * the first message. 110 * 111 * For MSI-X, each message is isolated. 112 */ 113 struct msi_intsrc { 114 struct intsrc msi_intsrc; 115 device_t msi_dev; /* Owning device. (g) */ 116 struct msi_intsrc *msi_first; /* First source in group. */ 117 u_int msi_irq; /* IRQ cookie. */ 118 u_int msi_msix; /* MSI-X message. */ 119 u_int msi_vector:8; /* IDT vector. */ 120 u_int msi_cpu; /* Local APIC ID. (g) */ 121 u_int msi_count:8; /* Messages in this group. (g) */ 122 u_int msi_maxcount:8; /* Alignment for this group. (g) */ 123 u_int *msi_irqs; /* Group's IRQ list. (g) */ 124 u_int msi_remap_cookie; 125 }; 126 127 static void msi_create_source(void); 128 static void msi_enable_source(struct intsrc *isrc); 129 static void msi_disable_source(struct intsrc *isrc, int eoi); 130 static void msi_eoi_source(struct intsrc *isrc); 131 static void msi_enable_intr(struct intsrc *isrc); 132 static void msi_disable_intr(struct intsrc *isrc); 133 static int msi_vector(struct intsrc *isrc); 134 static int msi_source_pending(struct intsrc *isrc); 135 static int msi_config_intr(struct intsrc *isrc, enum intr_trigger trig, 136 enum intr_polarity pol); 137 static int msi_assign_cpu(struct intsrc *isrc, u_int apic_id); 138 139 struct pic msi_pic = { 140 .pic_enable_source = msi_enable_source, 141 .pic_disable_source = msi_disable_source, 142 .pic_eoi_source = msi_eoi_source, 143 .pic_enable_intr = msi_enable_intr, 144 .pic_disable_intr = msi_disable_intr, 145 .pic_vector = msi_vector, 146 .pic_source_pending = msi_source_pending, 147 .pic_suspend = NULL, 148 .pic_resume = NULL, 149 .pic_config_intr = msi_config_intr, 150 .pic_assign_cpu = msi_assign_cpu, 151 .pic_reprogram_pin = NULL, 152 }; 153 154 u_int first_msi_irq; 155 156 #ifdef SMP 157 /** 158 * Xen hypervisors prior to 4.6.0 do not properly handle updates to 159 * enabled MSI-X table entries. Allow migration of MSI-X interrupts 160 * to be disabled via a tunable. Values have the following meaning: 161 * 162 * -1: automatic detection by FreeBSD 163 * 0: enable migration 164 * 1: disable migration 165 */ 166 int msix_disable_migration = -1; 167 SYSCTL_INT(_machdep, OID_AUTO, disable_msix_migration, CTLFLAG_RDTUN, 168 &msix_disable_migration, 0, 169 "Disable migration of MSI-X interrupts between CPUs"); 170 #endif 171 172 static int msi_enabled; 173 static u_int msi_last_irq; 174 static struct mtx msi_lock; 175 176 static void 177 msi_enable_source(struct intsrc *isrc) 178 { 179 } 180 181 static void 182 msi_disable_source(struct intsrc *isrc, int eoi) 183 { 184 185 if (eoi == PIC_EOI) 186 lapic_eoi(); 187 } 188 189 static void 190 msi_eoi_source(struct intsrc *isrc) 191 { 192 193 lapic_eoi(); 194 } 195 196 static void 197 msi_enable_intr(struct intsrc *isrc) 198 { 199 struct msi_intsrc *msi = (struct msi_intsrc *)isrc; 200 201 apic_enable_vector(msi->msi_cpu, msi->msi_vector); 202 } 203 204 static void 205 msi_disable_intr(struct intsrc *isrc) 206 { 207 struct msi_intsrc *msi = (struct msi_intsrc *)isrc; 208 209 apic_disable_vector(msi->msi_cpu, msi->msi_vector); 210 } 211 212 static int 213 msi_vector(struct intsrc *isrc) 214 { 215 struct msi_intsrc *msi = (struct msi_intsrc *)isrc; 216 217 return (msi->msi_irq); 218 } 219 220 static int 221 msi_source_pending(struct intsrc *isrc) 222 { 223 224 return (0); 225 } 226 227 static int 228 msi_config_intr(struct intsrc *isrc, enum intr_trigger trig, 229 enum intr_polarity pol) 230 { 231 232 return (ENODEV); 233 } 234 235 static int 236 msi_assign_cpu(struct intsrc *isrc, u_int apic_id) 237 { 238 struct msi_intsrc *sib, *msi = (struct msi_intsrc *)isrc; 239 int old_vector; 240 u_int old_id; 241 int i, vector; 242 243 /* 244 * Only allow CPUs to be assigned to the first message for an 245 * MSI group. 246 */ 247 if (msi->msi_first != msi) 248 return (EINVAL); 249 250 #ifdef SMP 251 if (msix_disable_migration && msi->msi_msix) 252 return (EINVAL); 253 #endif 254 255 /* Store information to free existing irq. */ 256 old_vector = msi->msi_vector; 257 old_id = msi->msi_cpu; 258 if (old_id == apic_id) 259 return (0); 260 261 /* Allocate IDT vectors on this cpu. */ 262 if (msi->msi_count > 1) { 263 KASSERT(msi->msi_msix == 0, ("MSI-X message group")); 264 vector = apic_alloc_vectors(apic_id, msi->msi_irqs, 265 msi->msi_count, msi->msi_maxcount); 266 } else 267 vector = apic_alloc_vector(apic_id, msi->msi_irq); 268 if (vector == 0) 269 return (ENOSPC); 270 271 msi->msi_cpu = apic_id; 272 msi->msi_vector = vector; 273 if (msi->msi_intsrc.is_handlers > 0) 274 apic_enable_vector(msi->msi_cpu, msi->msi_vector); 275 if (bootverbose) 276 printf("msi: Assigning %s IRQ %d to local APIC %u vector %u\n", 277 msi->msi_msix ? "MSI-X" : "MSI", msi->msi_irq, 278 msi->msi_cpu, msi->msi_vector); 279 for (i = 1; i < msi->msi_count; i++) { 280 sib = (struct msi_intsrc *)intr_lookup_source(msi->msi_irqs[i]); 281 sib->msi_cpu = apic_id; 282 sib->msi_vector = vector + i; 283 if (sib->msi_intsrc.is_handlers > 0) 284 apic_enable_vector(sib->msi_cpu, sib->msi_vector); 285 if (bootverbose) 286 printf( 287 "msi: Assigning MSI IRQ %d to local APIC %u vector %u\n", 288 sib->msi_irq, sib->msi_cpu, sib->msi_vector); 289 } 290 BUS_REMAP_INTR(device_get_parent(msi->msi_dev), msi->msi_dev, 291 msi->msi_irq); 292 293 /* 294 * Free the old vector after the new one is established. This is done 295 * to prevent races where we could miss an interrupt. 296 */ 297 if (msi->msi_intsrc.is_handlers > 0) 298 apic_disable_vector(old_id, old_vector); 299 apic_free_vector(old_id, old_vector, msi->msi_irq); 300 for (i = 1; i < msi->msi_count; i++) { 301 sib = (struct msi_intsrc *)intr_lookup_source(msi->msi_irqs[i]); 302 if (sib->msi_intsrc.is_handlers > 0) 303 apic_disable_vector(old_id, old_vector + i); 304 apic_free_vector(old_id, old_vector + i, msi->msi_irqs[i]); 305 } 306 return (0); 307 } 308 309 void 310 msi_init(void) 311 { 312 313 /* Check if we have a supported CPU. */ 314 switch (cpu_vendor_id) { 315 case CPU_VENDOR_INTEL: 316 case CPU_VENDOR_AMD: 317 break; 318 case CPU_VENDOR_CENTAUR: 319 if (CPUID_TO_FAMILY(cpu_id) == 0x6 && 320 CPUID_TO_MODEL(cpu_id) >= 0xf) 321 break; 322 /* FALLTHROUGH */ 323 default: 324 return; 325 } 326 327 #ifdef SMP 328 if (msix_disable_migration == -1) { 329 /* The default is to allow migration of MSI-X interrupts. */ 330 msix_disable_migration = 0; 331 } 332 #endif 333 334 first_msi_irq = max(MINIMUM_MSI_INT, num_io_irqs); 335 num_io_irqs = first_msi_irq + NUM_MSI_INTS; 336 337 msi_enabled = 1; 338 intr_register_pic(&msi_pic); 339 mtx_init(&msi_lock, "msi", NULL, MTX_DEF); 340 } 341 342 static void 343 msi_create_source(void) 344 { 345 struct msi_intsrc *msi; 346 u_int irq; 347 348 mtx_lock(&msi_lock); 349 if (msi_last_irq >= NUM_MSI_INTS) { 350 mtx_unlock(&msi_lock); 351 return; 352 } 353 irq = msi_last_irq + first_msi_irq; 354 msi_last_irq++; 355 mtx_unlock(&msi_lock); 356 357 msi = malloc(sizeof(struct msi_intsrc), M_MSI, M_WAITOK | M_ZERO); 358 msi->msi_intsrc.is_pic = &msi_pic; 359 msi->msi_irq = irq; 360 intr_register_source(&msi->msi_intsrc); 361 nexus_add_irq(irq); 362 } 363 364 /* 365 * Try to allocate 'count' interrupt sources with contiguous IDT values. 366 */ 367 int 368 msi_alloc(device_t dev, int count, int maxcount, int *irqs) 369 { 370 struct msi_intsrc *msi, *fsrc; 371 u_int cpu, domain, *mirqs; 372 int cnt, i, vector; 373 #ifdef ACPI_DMAR 374 u_int cookies[count]; 375 int error; 376 #endif 377 378 if (!msi_enabled) 379 return (ENXIO); 380 381 if (bus_get_domain(dev, &domain) != 0) 382 domain = 0; 383 384 if (count > 1) 385 mirqs = malloc(count * sizeof(*mirqs), M_MSI, M_WAITOK); 386 else 387 mirqs = NULL; 388 again: 389 mtx_lock(&msi_lock); 390 391 /* Try to find 'count' free IRQs. */ 392 cnt = 0; 393 for (i = first_msi_irq; i < first_msi_irq + NUM_MSI_INTS; i++) { 394 msi = (struct msi_intsrc *)intr_lookup_source(i); 395 396 /* End of allocated sources, so break. */ 397 if (msi == NULL) 398 break; 399 400 /* If this is a free one, save its IRQ in the array. */ 401 if (msi->msi_dev == NULL) { 402 irqs[cnt] = i; 403 cnt++; 404 if (cnt == count) 405 break; 406 } 407 } 408 409 /* Do we need to create some new sources? */ 410 if (cnt < count) { 411 /* If we would exceed the max, give up. */ 412 if (i + (count - cnt) >= first_msi_irq + NUM_MSI_INTS) { 413 mtx_unlock(&msi_lock); 414 free(mirqs, M_MSI); 415 return (ENXIO); 416 } 417 mtx_unlock(&msi_lock); 418 419 /* We need count - cnt more sources. */ 420 while (cnt < count) { 421 msi_create_source(); 422 cnt++; 423 } 424 goto again; 425 } 426 427 /* Ok, we now have the IRQs allocated. */ 428 KASSERT(cnt == count, ("count mismatch")); 429 430 /* Allocate 'count' IDT vectors. */ 431 cpu = intr_next_cpu(domain); 432 vector = apic_alloc_vectors(cpu, irqs, count, maxcount); 433 if (vector == 0) { 434 mtx_unlock(&msi_lock); 435 free(mirqs, M_MSI); 436 return (ENOSPC); 437 } 438 439 #ifdef ACPI_DMAR 440 mtx_unlock(&msi_lock); 441 error = iommu_alloc_msi_intr(dev, cookies, count); 442 mtx_lock(&msi_lock); 443 if (error == EOPNOTSUPP) 444 error = 0; 445 if (error != 0) { 446 for (i = 0; i < count; i++) 447 apic_free_vector(cpu, vector + i, irqs[i]); 448 free(mirqs, M_MSI); 449 return (error); 450 } 451 for (i = 0; i < count; i++) { 452 msi = (struct msi_intsrc *)intr_lookup_source(irqs[i]); 453 msi->msi_remap_cookie = cookies[i]; 454 } 455 #endif 456 457 /* Assign IDT vectors and make these messages owned by 'dev'. */ 458 fsrc = (struct msi_intsrc *)intr_lookup_source(irqs[0]); 459 for (i = 0; i < count; i++) { 460 msi = (struct msi_intsrc *)intr_lookup_source(irqs[i]); 461 msi->msi_cpu = cpu; 462 msi->msi_dev = dev; 463 msi->msi_vector = vector + i; 464 if (bootverbose) 465 printf( 466 "msi: routing MSI IRQ %d to local APIC %u vector %u\n", 467 msi->msi_irq, msi->msi_cpu, msi->msi_vector); 468 msi->msi_first = fsrc; 469 KASSERT(msi->msi_intsrc.is_handlers == 0, 470 ("dead MSI has handlers")); 471 } 472 fsrc->msi_count = count; 473 fsrc->msi_maxcount = maxcount; 474 if (count > 1) 475 bcopy(irqs, mirqs, count * sizeof(*mirqs)); 476 fsrc->msi_irqs = mirqs; 477 mtx_unlock(&msi_lock); 478 return (0); 479 } 480 481 int 482 msi_release(int *irqs, int count) 483 { 484 struct msi_intsrc *msi, *first; 485 int i; 486 487 mtx_lock(&msi_lock); 488 first = (struct msi_intsrc *)intr_lookup_source(irqs[0]); 489 if (first == NULL) { 490 mtx_unlock(&msi_lock); 491 return (ENOENT); 492 } 493 494 /* Make sure this isn't an MSI-X message. */ 495 if (first->msi_msix) { 496 mtx_unlock(&msi_lock); 497 return (EINVAL); 498 } 499 500 /* Make sure this message is allocated to a group. */ 501 if (first->msi_first == NULL) { 502 mtx_unlock(&msi_lock); 503 return (ENXIO); 504 } 505 506 /* 507 * Make sure this is the start of a group and that we are releasing 508 * the entire group. 509 */ 510 if (first->msi_first != first || first->msi_count != count) { 511 mtx_unlock(&msi_lock); 512 return (EINVAL); 513 } 514 KASSERT(first->msi_dev != NULL, ("unowned group")); 515 516 /* Clear all the extra messages in the group. */ 517 for (i = 1; i < count; i++) { 518 msi = (struct msi_intsrc *)intr_lookup_source(irqs[i]); 519 KASSERT(msi->msi_first == first, ("message not in group")); 520 KASSERT(msi->msi_dev == first->msi_dev, ("owner mismatch")); 521 #ifdef ACPI_DMAR 522 iommu_unmap_msi_intr(first->msi_dev, msi->msi_remap_cookie); 523 #endif 524 msi->msi_first = NULL; 525 msi->msi_dev = NULL; 526 apic_free_vector(msi->msi_cpu, msi->msi_vector, msi->msi_irq); 527 msi->msi_vector = 0; 528 } 529 530 /* Clear out the first message. */ 531 #ifdef ACPI_DMAR 532 mtx_unlock(&msi_lock); 533 iommu_unmap_msi_intr(first->msi_dev, first->msi_remap_cookie); 534 mtx_lock(&msi_lock); 535 #endif 536 first->msi_first = NULL; 537 first->msi_dev = NULL; 538 apic_free_vector(first->msi_cpu, first->msi_vector, first->msi_irq); 539 first->msi_vector = 0; 540 first->msi_count = 0; 541 first->msi_maxcount = 0; 542 free(first->msi_irqs, M_MSI); 543 first->msi_irqs = NULL; 544 545 mtx_unlock(&msi_lock); 546 return (0); 547 } 548 549 int 550 msi_map(int irq, uint64_t *addr, uint32_t *data) 551 { 552 struct msi_intsrc *msi; 553 int error; 554 #ifdef ACPI_DMAR 555 struct msi_intsrc *msi1; 556 int i, k; 557 #endif 558 559 mtx_lock(&msi_lock); 560 msi = (struct msi_intsrc *)intr_lookup_source(irq); 561 if (msi == NULL) { 562 mtx_unlock(&msi_lock); 563 return (ENOENT); 564 } 565 566 /* Make sure this message is allocated to a device. */ 567 if (msi->msi_dev == NULL) { 568 mtx_unlock(&msi_lock); 569 return (ENXIO); 570 } 571 572 /* 573 * If this message isn't an MSI-X message, make sure it's part 574 * of a group, and switch to the first message in the 575 * group. 576 */ 577 if (!msi->msi_msix) { 578 if (msi->msi_first == NULL) { 579 mtx_unlock(&msi_lock); 580 return (ENXIO); 581 } 582 msi = msi->msi_first; 583 } 584 585 #ifdef ACPI_DMAR 586 if (!msi->msi_msix) { 587 for (k = msi->msi_count - 1, i = first_msi_irq; k > 0 && 588 i < first_msi_irq + NUM_MSI_INTS; i++) { 589 if (i == msi->msi_irq) 590 continue; 591 msi1 = (struct msi_intsrc *)intr_lookup_source(i); 592 if (!msi1->msi_msix && msi1->msi_first == msi) { 593 mtx_unlock(&msi_lock); 594 iommu_map_msi_intr(msi1->msi_dev, 595 msi1->msi_cpu, msi1->msi_vector, 596 msi1->msi_remap_cookie, NULL, NULL); 597 k--; 598 mtx_lock(&msi_lock); 599 } 600 } 601 } 602 mtx_unlock(&msi_lock); 603 error = iommu_map_msi_intr(msi->msi_dev, msi->msi_cpu, 604 msi->msi_vector, msi->msi_remap_cookie, addr, data); 605 #else 606 mtx_unlock(&msi_lock); 607 error = EOPNOTSUPP; 608 #endif 609 if (error == EOPNOTSUPP) { 610 *addr = INTEL_ADDR(msi); 611 *data = INTEL_DATA(msi); 612 error = 0; 613 } 614 return (error); 615 } 616 617 int 618 msix_alloc(device_t dev, int *irq) 619 { 620 struct msi_intsrc *msi; 621 u_int cpu, domain; 622 int i, vector; 623 #ifdef ACPI_DMAR 624 u_int cookie; 625 int error; 626 #endif 627 628 if (!msi_enabled) 629 return (ENXIO); 630 631 if (bus_get_domain(dev, &domain) != 0) 632 domain = 0; 633 634 again: 635 mtx_lock(&msi_lock); 636 637 /* Find a free IRQ. */ 638 for (i = first_msi_irq; i < first_msi_irq + NUM_MSI_INTS; i++) { 639 msi = (struct msi_intsrc *)intr_lookup_source(i); 640 641 /* End of allocated sources, so break. */ 642 if (msi == NULL) 643 break; 644 645 /* Stop at the first free source. */ 646 if (msi->msi_dev == NULL) 647 break; 648 } 649 650 /* Do we need to create a new source? */ 651 if (msi == NULL) { 652 /* If we would exceed the max, give up. */ 653 if (i + 1 >= first_msi_irq + NUM_MSI_INTS) { 654 mtx_unlock(&msi_lock); 655 return (ENXIO); 656 } 657 mtx_unlock(&msi_lock); 658 659 /* Create a new source. */ 660 msi_create_source(); 661 goto again; 662 } 663 664 /* Allocate an IDT vector. */ 665 cpu = intr_next_cpu(domain); 666 vector = apic_alloc_vector(cpu, i); 667 if (vector == 0) { 668 mtx_unlock(&msi_lock); 669 return (ENOSPC); 670 } 671 672 msi->msi_dev = dev; 673 #ifdef ACPI_DMAR 674 mtx_unlock(&msi_lock); 675 error = iommu_alloc_msi_intr(dev, &cookie, 1); 676 mtx_lock(&msi_lock); 677 if (error == EOPNOTSUPP) 678 error = 0; 679 if (error != 0) { 680 msi->msi_dev = NULL; 681 apic_free_vector(cpu, vector, i); 682 return (error); 683 } 684 msi->msi_remap_cookie = cookie; 685 #endif 686 687 if (bootverbose) 688 printf("msi: routing MSI-X IRQ %d to local APIC %u vector %u\n", 689 msi->msi_irq, cpu, vector); 690 691 /* Setup source. */ 692 msi->msi_cpu = cpu; 693 msi->msi_first = msi; 694 msi->msi_vector = vector; 695 msi->msi_msix = 1; 696 msi->msi_count = 1; 697 msi->msi_maxcount = 1; 698 msi->msi_irqs = NULL; 699 700 KASSERT(msi->msi_intsrc.is_handlers == 0, ("dead MSI-X has handlers")); 701 mtx_unlock(&msi_lock); 702 703 *irq = i; 704 return (0); 705 } 706 707 int 708 msix_release(int irq) 709 { 710 struct msi_intsrc *msi; 711 712 mtx_lock(&msi_lock); 713 msi = (struct msi_intsrc *)intr_lookup_source(irq); 714 if (msi == NULL) { 715 mtx_unlock(&msi_lock); 716 return (ENOENT); 717 } 718 719 /* Make sure this is an MSI-X message. */ 720 if (!msi->msi_msix) { 721 mtx_unlock(&msi_lock); 722 return (EINVAL); 723 } 724 725 KASSERT(msi->msi_dev != NULL, ("unowned message")); 726 727 /* Clear out the message. */ 728 #ifdef ACPI_DMAR 729 mtx_unlock(&msi_lock); 730 iommu_unmap_msi_intr(msi->msi_dev, msi->msi_remap_cookie); 731 mtx_lock(&msi_lock); 732 #endif 733 msi->msi_first = NULL; 734 msi->msi_dev = NULL; 735 apic_free_vector(msi->msi_cpu, msi->msi_vector, msi->msi_irq); 736 msi->msi_vector = 0; 737 msi->msi_msix = 0; 738 msi->msi_count = 0; 739 msi->msi_maxcount = 0; 740 741 mtx_unlock(&msi_lock); 742 return (0); 743 } 744