1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2015 Nahanni Systems, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <sys/types.h> 35 #include <sys/mman.h> 36 37 #include <machine/vmm.h> 38 #include <machine/vmm_snapshot.h> 39 #include <vmmapi.h> 40 41 #include <stdio.h> 42 #include <stdlib.h> 43 #include <string.h> 44 45 #include <errno.h> 46 #include <unistd.h> 47 48 #include "bhyvegc.h" 49 #include "bhyverun.h" 50 #include "config.h" 51 #include "debug.h" 52 #include "console.h" 53 #include "inout.h" 54 #include "pci_emul.h" 55 #include "rfb.h" 56 #include "vga.h" 57 58 /* 59 * bhyve Framebuffer device emulation. 60 * BAR0 points to the current mode information. 61 * BAR1 is the 32-bit framebuffer address. 62 * 63 * -s <b>,fbuf,wait,vga=on|io|off,rfb=<ip>:port,w=width,h=height 64 */ 65 66 static int fbuf_debug = 1; 67 #define DEBUG_INFO 1 68 #define DEBUG_VERBOSE 4 69 #define DPRINTF(level, params) if (level <= fbuf_debug) PRINTLN params 70 71 72 #define KB (1024UL) 73 #define MB (1024 * 1024UL) 74 75 #define DMEMSZ 128 76 77 #define FB_SIZE (16*MB) 78 79 #define COLS_MAX 1920 80 #define ROWS_MAX 1200 81 82 #define COLS_DEFAULT 1024 83 #define ROWS_DEFAULT 768 84 85 #define COLS_MIN 640 86 #define ROWS_MIN 480 87 88 struct pci_fbuf_softc { 89 struct pci_devinst *fsc_pi; 90 struct { 91 uint32_t fbsize; 92 uint16_t width; 93 uint16_t height; 94 uint16_t depth; 95 uint16_t refreshrate; 96 uint8_t reserved[116]; 97 } __packed memregs; 98 99 /* rfb server */ 100 char *rfb_host; 101 char *rfb_password; 102 int rfb_port; 103 int rfb_wait; 104 int vga_enabled; 105 int vga_full; 106 107 uint32_t fbaddr; 108 char *fb_base; 109 uint16_t gc_width; 110 uint16_t gc_height; 111 void *vgasc; 112 struct bhyvegc_image *gc_image; 113 }; 114 115 static struct pci_fbuf_softc *fbuf_sc; 116 117 #define PCI_FBUF_MSI_MSGS 4 118 119 static void 120 pci_fbuf_write(struct vmctx *ctx __unused, int vcpu __unused, 121 struct pci_devinst *pi, int baridx, uint64_t offset, int size, 122 uint64_t value) 123 { 124 struct pci_fbuf_softc *sc; 125 uint8_t *p; 126 127 assert(baridx == 0); 128 129 sc = pi->pi_arg; 130 131 DPRINTF(DEBUG_VERBOSE, 132 ("fbuf wr: offset 0x%lx, size: %d, value: 0x%lx", 133 offset, size, value)); 134 135 if (offset + size > DMEMSZ) { 136 printf("fbuf: write too large, offset %ld size %d\n", 137 offset, size); 138 return; 139 } 140 141 p = (uint8_t *)&sc->memregs + offset; 142 143 switch (size) { 144 case 1: 145 *p = value; 146 break; 147 case 2: 148 *(uint16_t *)p = value; 149 break; 150 case 4: 151 *(uint32_t *)p = value; 152 break; 153 case 8: 154 *(uint64_t *)p = value; 155 break; 156 default: 157 printf("fbuf: write unknown size %d\n", size); 158 break; 159 } 160 161 if (!sc->gc_image->vgamode && sc->memregs.width == 0 && 162 sc->memregs.height == 0) { 163 DPRINTF(DEBUG_INFO, ("switching to VGA mode")); 164 sc->gc_image->vgamode = 1; 165 sc->gc_width = 0; 166 sc->gc_height = 0; 167 } else if (sc->gc_image->vgamode && sc->memregs.width != 0 && 168 sc->memregs.height != 0) { 169 DPRINTF(DEBUG_INFO, ("switching to VESA mode")); 170 sc->gc_image->vgamode = 0; 171 } 172 } 173 174 static uint64_t 175 pci_fbuf_read(struct vmctx *ctx __unused, int vcpu __unused, 176 struct pci_devinst *pi, int baridx, uint64_t offset, int size) 177 { 178 struct pci_fbuf_softc *sc; 179 uint8_t *p; 180 uint64_t value; 181 182 assert(baridx == 0); 183 184 sc = pi->pi_arg; 185 186 187 if (offset + size > DMEMSZ) { 188 printf("fbuf: read too large, offset %ld size %d\n", 189 offset, size); 190 return (0); 191 } 192 193 p = (uint8_t *)&sc->memregs + offset; 194 value = 0; 195 switch (size) { 196 case 1: 197 value = *p; 198 break; 199 case 2: 200 value = *(uint16_t *)p; 201 break; 202 case 4: 203 value = *(uint32_t *)p; 204 break; 205 case 8: 206 value = *(uint64_t *)p; 207 break; 208 default: 209 printf("fbuf: read unknown size %d\n", size); 210 break; 211 } 212 213 DPRINTF(DEBUG_VERBOSE, 214 ("fbuf rd: offset 0x%lx, size: %d, value: 0x%lx", 215 offset, size, value)); 216 217 return (value); 218 } 219 220 static void 221 pci_fbuf_baraddr(struct vmctx *ctx, struct pci_devinst *pi, int baridx, 222 int enabled, uint64_t address) 223 { 224 struct pci_fbuf_softc *sc; 225 int prot; 226 227 if (baridx != 1) 228 return; 229 230 sc = pi->pi_arg; 231 if (!enabled) { 232 if (vm_munmap_memseg(ctx, sc->fbaddr, FB_SIZE) != 0) 233 EPRINTLN("pci_fbuf: munmap_memseg failed"); 234 sc->fbaddr = 0; 235 } else { 236 prot = PROT_READ | PROT_WRITE; 237 if (vm_mmap_memseg(ctx, address, VM_FRAMEBUFFER, 0, FB_SIZE, prot) != 0) 238 EPRINTLN("pci_fbuf: mmap_memseg failed"); 239 sc->fbaddr = address; 240 } 241 } 242 243 244 static int 245 pci_fbuf_parse_config(struct pci_fbuf_softc *sc, nvlist_t *nvl) 246 { 247 const char *value; 248 char *cp; 249 250 sc->rfb_wait = get_config_bool_node_default(nvl, "wait", false); 251 252 /* Prefer "rfb" to "tcp". */ 253 value = get_config_value_node(nvl, "rfb"); 254 if (value == NULL) 255 value = get_config_value_node(nvl, "tcp"); 256 if (value != NULL) { 257 /* 258 * IPv4 -- host-ip:port 259 * IPv6 -- [host-ip%zone]:port 260 * XXX for now port is mandatory for IPv4. 261 */ 262 if (value[0] == '[') { 263 cp = strchr(value + 1, ']'); 264 if (cp == NULL || cp == value + 1) { 265 EPRINTLN("fbuf: Invalid IPv6 address: \"%s\"", 266 value); 267 return (-1); 268 } 269 sc->rfb_host = strndup(value + 1, cp - (value + 1)); 270 cp++; 271 if (*cp == ':') { 272 cp++; 273 if (*cp == '\0') { 274 EPRINTLN( 275 "fbuf: Missing port number: \"%s\"", 276 value); 277 return (-1); 278 } 279 sc->rfb_port = atoi(cp); 280 } else if (*cp != '\0') { 281 EPRINTLN("fbuf: Invalid IPv6 address: \"%s\"", 282 value); 283 return (-1); 284 } 285 } else { 286 cp = strchr(value, ':'); 287 if (cp == NULL) { 288 sc->rfb_port = atoi(value); 289 } else { 290 sc->rfb_host = strndup(value, cp - value); 291 cp++; 292 if (*cp == '\0') { 293 EPRINTLN( 294 "fbuf: Missing port number: \"%s\"", 295 value); 296 return (-1); 297 } 298 sc->rfb_port = atoi(cp); 299 } 300 } 301 } 302 303 value = get_config_value_node(nvl, "vga"); 304 if (value != NULL) { 305 if (strcmp(value, "off") == 0) { 306 sc->vga_enabled = 0; 307 } else if (strcmp(value, "io") == 0) { 308 sc->vga_enabled = 1; 309 sc->vga_full = 0; 310 } else if (strcmp(value, "on") == 0) { 311 sc->vga_enabled = 1; 312 sc->vga_full = 1; 313 } else { 314 EPRINTLN("fbuf: Invalid vga setting: \"%s\"", value); 315 return (-1); 316 } 317 } 318 319 value = get_config_value_node(nvl, "w"); 320 if (value != NULL) { 321 sc->memregs.width = atoi(value); 322 if (sc->memregs.width > COLS_MAX) { 323 EPRINTLN("fbuf: width %d too large", sc->memregs.width); 324 return (-1); 325 } 326 if (sc->memregs.width == 0) 327 sc->memregs.width = 1920; 328 } 329 330 value = get_config_value_node(nvl, "h"); 331 if (value != NULL) { 332 sc->memregs.height = atoi(value); 333 if (sc->memregs.height > ROWS_MAX) { 334 EPRINTLN("fbuf: height %d too large", 335 sc->memregs.height); 336 return (-1); 337 } 338 if (sc->memregs.height == 0) 339 sc->memregs.height = 1080; 340 } 341 342 value = get_config_value_node(nvl, "password"); 343 if (value != NULL) 344 sc->rfb_password = strdup(value); 345 346 return (0); 347 } 348 349 350 extern void vga_render(struct bhyvegc *gc, void *arg); 351 352 static void 353 pci_fbuf_render(struct bhyvegc *gc, void *arg) 354 { 355 struct pci_fbuf_softc *sc; 356 357 sc = arg; 358 359 if (sc->vga_full && sc->gc_image->vgamode) { 360 /* TODO: mode switching to vga and vesa should use the special 361 * EFI-bhyve protocol port. 362 */ 363 vga_render(gc, sc->vgasc); 364 return; 365 } 366 if (sc->gc_width != sc->memregs.width || 367 sc->gc_height != sc->memregs.height) { 368 bhyvegc_resize(gc, sc->memregs.width, sc->memregs.height); 369 sc->gc_width = sc->memregs.width; 370 sc->gc_height = sc->memregs.height; 371 } 372 373 return; 374 } 375 376 static int 377 pci_fbuf_init(struct vmctx *ctx, struct pci_devinst *pi, nvlist_t *nvl) 378 { 379 int error; 380 struct pci_fbuf_softc *sc; 381 382 if (fbuf_sc != NULL) { 383 EPRINTLN("Only one frame buffer device is allowed."); 384 return (-1); 385 } 386 387 sc = calloc(1, sizeof(struct pci_fbuf_softc)); 388 389 pi->pi_arg = sc; 390 391 /* initialize config space */ 392 pci_set_cfgdata16(pi, PCIR_DEVICE, 0x40FB); 393 pci_set_cfgdata16(pi, PCIR_VENDOR, 0xFB5D); 394 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_DISPLAY); 395 pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_DISPLAY_VGA); 396 397 sc->fb_base = vm_create_devmem( 398 ctx, VM_FRAMEBUFFER, "framebuffer", FB_SIZE); 399 if (sc->fb_base == MAP_FAILED) { 400 error = -1; 401 goto done; 402 } 403 404 error = pci_emul_alloc_bar(pi, 0, PCIBAR_MEM32, DMEMSZ); 405 assert(error == 0); 406 407 error = pci_emul_alloc_bar(pi, 1, PCIBAR_MEM32, FB_SIZE); 408 assert(error == 0); 409 410 error = pci_emul_add_msicap(pi, PCI_FBUF_MSI_MSGS); 411 assert(error == 0); 412 413 sc->memregs.fbsize = FB_SIZE; 414 sc->memregs.width = COLS_DEFAULT; 415 sc->memregs.height = ROWS_DEFAULT; 416 sc->memregs.depth = 32; 417 418 sc->vga_enabled = 1; 419 sc->vga_full = 0; 420 421 sc->fsc_pi = pi; 422 423 error = pci_fbuf_parse_config(sc, nvl); 424 if (error != 0) 425 goto done; 426 427 /* XXX until VGA rendering is enabled */ 428 if (sc->vga_full != 0) { 429 EPRINTLN("pci_fbuf: VGA rendering not enabled"); 430 goto done; 431 } 432 433 DPRINTF(DEBUG_INFO, ("fbuf frame buffer base: %p [sz %lu]", 434 sc->fb_base, FB_SIZE)); 435 436 console_init(sc->memregs.width, sc->memregs.height, sc->fb_base); 437 console_fb_register(pci_fbuf_render, sc); 438 439 if (sc->vga_enabled) 440 sc->vgasc = vga_init(!sc->vga_full); 441 sc->gc_image = console_get_image(); 442 443 fbuf_sc = sc; 444 445 memset((void *)sc->fb_base, 0, FB_SIZE); 446 447 error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, sc->rfb_password); 448 done: 449 if (error) 450 free(sc); 451 452 return (error); 453 } 454 455 #ifdef BHYVE_SNAPSHOT 456 static int 457 pci_fbuf_snapshot(struct vm_snapshot_meta *meta) 458 { 459 int ret; 460 461 SNAPSHOT_BUF_OR_LEAVE(fbuf_sc->fb_base, FB_SIZE, meta, ret, err); 462 463 err: 464 return (ret); 465 } 466 #endif 467 468 static const struct pci_devemu pci_fbuf = { 469 .pe_emu = "fbuf", 470 .pe_init = pci_fbuf_init, 471 .pe_barwrite = pci_fbuf_write, 472 .pe_barread = pci_fbuf_read, 473 .pe_baraddr = pci_fbuf_baraddr, 474 #ifdef BHYVE_SNAPSHOT 475 .pe_snapshot = pci_fbuf_snapshot, 476 #endif 477 }; 478 PCI_EMUL_SET(pci_fbuf); 479