1 /*- 2 * Copyright (c) 2015 Nahanni Systems, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/types.h> 33 #include <sys/mman.h> 34 35 #include <machine/vmm.h> 36 #include <vmmapi.h> 37 38 #include <stdio.h> 39 #include <stdlib.h> 40 #include <string.h> 41 42 #include <errno.h> 43 #include <unistd.h> 44 45 #include "bhyvegc.h" 46 #include "bhyverun.h" 47 #include "console.h" 48 #include "inout.h" 49 #include "pci_emul.h" 50 #include "rfb.h" 51 #include "vga.h" 52 53 /* 54 * bhyve Framebuffer device emulation. 55 * BAR0 points to the current mode information. 56 * BAR1 is the 32-bit framebuffer address. 57 * 58 * -s <b>,fbuf,wait,vga=on|io|off,rfb=<ip>:port,w=width,h=height 59 */ 60 61 static int fbuf_debug = 1; 62 #define DEBUG_INFO 1 63 #define DEBUG_VERBOSE 4 64 #define DPRINTF(level, params) if (level <= fbuf_debug) printf params 65 66 67 #define KB (1024UL) 68 #define MB (1024 * 1024UL) 69 70 #define DMEMSZ 128 71 72 #define FB_SIZE (16*MB) 73 74 #define COLS_MAX 1920 75 #define ROWS_MAX 1200 76 77 #define COLS_DEFAULT 1024 78 #define ROWS_DEFAULT 768 79 80 #define COLS_MIN 640 81 #define ROWS_MIN 480 82 83 struct pci_fbuf_softc { 84 struct pci_devinst *fsc_pi; 85 struct { 86 uint32_t fbsize; 87 uint16_t width; 88 uint16_t height; 89 uint16_t depth; 90 uint16_t refreshrate; 91 uint8_t reserved[116]; 92 } __packed memregs; 93 94 /* rfb server */ 95 char *rfb_host; 96 char *rfb_password; 97 int rfb_port; 98 int rfb_wait; 99 int vga_enabled; 100 int vga_full; 101 102 uint32_t fbaddr; 103 char *fb_base; 104 uint16_t gc_width; 105 uint16_t gc_height; 106 void *vgasc; 107 struct bhyvegc_image *gc_image; 108 }; 109 110 static struct pci_fbuf_softc *fbuf_sc; 111 112 #define PCI_FBUF_MSI_MSGS 4 113 114 static void 115 pci_fbuf_usage(char *opt) 116 { 117 118 fprintf(stderr, "Invalid fbuf emulation \"%s\"\r\n", opt); 119 fprintf(stderr, "fbuf: {wait,}{vga=on|io|off,}rfb=<ip>:port\r\n"); 120 } 121 122 static void 123 pci_fbuf_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, 124 int baridx, uint64_t offset, int size, uint64_t value) 125 { 126 struct pci_fbuf_softc *sc; 127 uint8_t *p; 128 129 assert(baridx == 0); 130 131 sc = pi->pi_arg; 132 133 DPRINTF(DEBUG_VERBOSE, 134 ("fbuf wr: offset 0x%lx, size: %d, value: 0x%lx\n", 135 offset, size, value)); 136 137 if (offset + size > DMEMSZ) { 138 printf("fbuf: write too large, offset %ld size %d\n", 139 offset, size); 140 return; 141 } 142 143 p = (uint8_t *)&sc->memregs + offset; 144 145 switch (size) { 146 case 1: 147 *p = value; 148 break; 149 case 2: 150 *(uint16_t *)p = value; 151 break; 152 case 4: 153 *(uint32_t *)p = value; 154 break; 155 case 8: 156 *(uint64_t *)p = value; 157 break; 158 default: 159 printf("fbuf: write unknown size %d\n", size); 160 break; 161 } 162 163 if (!sc->gc_image->vgamode && sc->memregs.width == 0 && 164 sc->memregs.height == 0) { 165 DPRINTF(DEBUG_INFO, ("switching to VGA mode\r\n")); 166 sc->gc_image->vgamode = 1; 167 sc->gc_width = 0; 168 sc->gc_height = 0; 169 } else if (sc->gc_image->vgamode && sc->memregs.width != 0 && 170 sc->memregs.height != 0) { 171 DPRINTF(DEBUG_INFO, ("switching to VESA mode\r\n")); 172 sc->gc_image->vgamode = 0; 173 } 174 } 175 176 uint64_t 177 pci_fbuf_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, 178 int baridx, uint64_t offset, int size) 179 { 180 struct pci_fbuf_softc *sc; 181 uint8_t *p; 182 uint64_t value; 183 184 assert(baridx == 0); 185 186 sc = pi->pi_arg; 187 188 189 if (offset + size > DMEMSZ) { 190 printf("fbuf: read too large, offset %ld size %d\n", 191 offset, size); 192 return (0); 193 } 194 195 p = (uint8_t *)&sc->memregs + offset; 196 value = 0; 197 switch (size) { 198 case 1: 199 value = *p; 200 break; 201 case 2: 202 value = *(uint16_t *)p; 203 break; 204 case 4: 205 value = *(uint32_t *)p; 206 break; 207 case 8: 208 value = *(uint64_t *)p; 209 break; 210 default: 211 printf("fbuf: read unknown size %d\n", size); 212 break; 213 } 214 215 DPRINTF(DEBUG_VERBOSE, 216 ("fbuf rd: offset 0x%lx, size: %d, value: 0x%lx\n", 217 offset, size, value)); 218 219 return (value); 220 } 221 222 static int 223 pci_fbuf_parse_opts(struct pci_fbuf_softc *sc, char *opts) 224 { 225 char *uopts, *xopts, *config; 226 char *tmpstr; 227 int ret; 228 229 ret = 0; 230 uopts = strdup(opts); 231 for (xopts = strtok(uopts, ","); 232 xopts != NULL; 233 xopts = strtok(NULL, ",")) { 234 if (strcmp(xopts, "wait") == 0) { 235 sc->rfb_wait = 1; 236 continue; 237 } 238 239 if ((config = strchr(xopts, '=')) == NULL) { 240 pci_fbuf_usage(xopts); 241 ret = -1; 242 goto done; 243 } 244 245 *config++ = '\0'; 246 247 DPRINTF(DEBUG_VERBOSE, ("pci_fbuf option %s = %s\r\n", 248 xopts, config)); 249 250 if (!strcmp(xopts, "tcp") || !strcmp(xopts, "rfb")) { 251 /* parse host-ip:port */ 252 tmpstr = strsep(&config, ":"); 253 if (!config) 254 sc->rfb_port = atoi(tmpstr); 255 else { 256 sc->rfb_port = atoi(config); 257 sc->rfb_host = tmpstr; 258 } 259 } else if (!strcmp(xopts, "vga")) { 260 if (!strcmp(config, "off")) { 261 sc->vga_enabled = 0; 262 } else if (!strcmp(config, "io")) { 263 sc->vga_enabled = 1; 264 sc->vga_full = 0; 265 } else if (!strcmp(config, "on")) { 266 sc->vga_enabled = 1; 267 sc->vga_full = 1; 268 } else { 269 pci_fbuf_usage(opts); 270 ret = -1; 271 goto done; 272 } 273 } else if (!strcmp(xopts, "w")) { 274 sc->memregs.width = atoi(config); 275 if (sc->memregs.width > COLS_MAX) { 276 pci_fbuf_usage(xopts); 277 ret = -1; 278 goto done; 279 } else if (sc->memregs.width == 0) 280 sc->memregs.width = 1920; 281 } else if (!strcmp(xopts, "h")) { 282 sc->memregs.height = atoi(config); 283 if (sc->memregs.height > ROWS_MAX) { 284 pci_fbuf_usage(xopts); 285 ret = -1; 286 goto done; 287 } else if (sc->memregs.height == 0) 288 sc->memregs.height = 1080; 289 } else if (!strcmp(xopts, "password")) { 290 sc->rfb_password = config; 291 } else { 292 pci_fbuf_usage(xopts); 293 ret = -1; 294 goto done; 295 } 296 } 297 298 done: 299 return (ret); 300 } 301 302 303 extern void vga_render(struct bhyvegc *gc, void *arg); 304 305 void 306 pci_fbuf_render(struct bhyvegc *gc, void *arg) 307 { 308 struct pci_fbuf_softc *sc; 309 310 sc = arg; 311 312 if (sc->vga_full && sc->gc_image->vgamode) { 313 /* TODO: mode switching to vga and vesa should use the special 314 * EFI-bhyve protocol port. 315 */ 316 vga_render(gc, sc->vgasc); 317 return; 318 } 319 if (sc->gc_width != sc->memregs.width || 320 sc->gc_height != sc->memregs.height) { 321 bhyvegc_resize(gc, sc->memregs.width, sc->memregs.height); 322 sc->gc_width = sc->memregs.width; 323 sc->gc_height = sc->memregs.height; 324 } 325 326 return; 327 } 328 329 static int 330 pci_fbuf_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts) 331 { 332 int error, prot; 333 struct pci_fbuf_softc *sc; 334 335 if (fbuf_sc != NULL) { 336 fprintf(stderr, "Only one frame buffer device is allowed.\n"); 337 return (-1); 338 } 339 340 sc = calloc(1, sizeof(struct pci_fbuf_softc)); 341 342 pi->pi_arg = sc; 343 344 /* initialize config space */ 345 pci_set_cfgdata16(pi, PCIR_DEVICE, 0x40FB); 346 pci_set_cfgdata16(pi, PCIR_VENDOR, 0xFB5D); 347 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_DISPLAY); 348 pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_DISPLAY_VGA); 349 350 error = pci_emul_alloc_bar(pi, 0, PCIBAR_MEM32, DMEMSZ); 351 assert(error == 0); 352 353 error = pci_emul_alloc_bar(pi, 1, PCIBAR_MEM32, FB_SIZE); 354 assert(error == 0); 355 356 error = pci_emul_add_msicap(pi, PCI_FBUF_MSI_MSGS); 357 assert(error == 0); 358 359 sc->fbaddr = pi->pi_bar[1].addr; 360 sc->memregs.fbsize = FB_SIZE; 361 sc->memregs.width = COLS_DEFAULT; 362 sc->memregs.height = ROWS_DEFAULT; 363 sc->memregs.depth = 32; 364 365 sc->vga_enabled = 1; 366 sc->vga_full = 0; 367 368 sc->fsc_pi = pi; 369 370 error = pci_fbuf_parse_opts(sc, opts); 371 if (error != 0) 372 goto done; 373 374 /* XXX until VGA rendering is enabled */ 375 if (sc->vga_full != 0) { 376 fprintf(stderr, "pci_fbuf: VGA rendering not enabled"); 377 goto done; 378 } 379 380 sc->fb_base = vm_create_devmem(ctx, VM_FRAMEBUFFER, "framebuffer", FB_SIZE); 381 if (sc->fb_base == MAP_FAILED) { 382 error = -1; 383 goto done; 384 } 385 DPRINTF(DEBUG_INFO, ("fbuf frame buffer base: %p [sz %lu]\r\n", 386 sc->fb_base, FB_SIZE)); 387 388 /* 389 * Map the framebuffer into the guest address space. 390 * XXX This may fail if the BAR is different than a prior 391 * run. In this case flag the error. This will be fixed 392 * when a change_memseg api is available. 393 */ 394 prot = PROT_READ | PROT_WRITE; 395 if (vm_mmap_memseg(ctx, sc->fbaddr, VM_FRAMEBUFFER, 0, FB_SIZE, prot) != 0) { 396 fprintf(stderr, "pci_fbuf: mapseg failed - try deleting VM and restarting\n"); 397 error = -1; 398 goto done; 399 } 400 401 console_init(sc->memregs.width, sc->memregs.height, sc->fb_base); 402 console_fb_register(pci_fbuf_render, sc); 403 404 if (sc->vga_enabled) 405 sc->vgasc = vga_init(!sc->vga_full); 406 sc->gc_image = console_get_image(); 407 408 fbuf_sc = sc; 409 410 memset((void *)sc->fb_base, 0, FB_SIZE); 411 412 error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, sc->rfb_password); 413 done: 414 if (error) 415 free(sc); 416 417 return (error); 418 } 419 420 struct pci_devemu pci_fbuf = { 421 .pe_emu = "fbuf", 422 .pe_init = pci_fbuf_init, 423 .pe_barwrite = pci_fbuf_write, 424 .pe_barread = pci_fbuf_read 425 }; 426 PCI_EMUL_SET(pci_fbuf); 427