1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2013 Chris Torek <torek @ torek net> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #ifndef _BHYVE_VIRTIO_H_ 32 #define _BHYVE_VIRTIO_H_ 33 34 #include <machine/atomic.h> 35 36 #include <dev/virtio/virtio.h> 37 #include <dev/virtio/virtio_ring.h> 38 #include <dev/virtio/pci/virtio_pci_var.h> 39 40 /* 41 * These are derived from several virtio specifications. 42 * 43 * Some useful links: 44 * https://github.com/rustyrussell/virtio-spec 45 * http://people.redhat.com/pbonzini/virtio-spec.pdf 46 */ 47 48 /* 49 * A virtual device has zero or more "virtual queues" (virtqueue). 50 * Each virtqueue uses at least two 4096-byte pages, laid out thus: 51 * 52 * +-----------------------------------------------+ 53 * | "desc": <N> descriptors, 16 bytes each | 54 * | ----------------------------------------- | 55 * | "avail": 2 uint16; <N> uint16; 1 uint16 | 56 * | ----------------------------------------- | 57 * | pad to 4k boundary | 58 * +-----------------------------------------------+ 59 * | "used": 2 x uint16; <N> elems; 1 uint16 | 60 * | ----------------------------------------- | 61 * | pad to 4k boundary | 62 * +-----------------------------------------------+ 63 * 64 * The number <N> that appears here is always a power of two and is 65 * limited to no more than 32768 (as it must fit in a 16-bit field). 66 * If <N> is sufficiently large, the above will occupy more than 67 * two pages. In any case, all pages must be physically contiguous 68 * within the guest's physical address space. 69 * 70 * The <N> 16-byte "desc" descriptors consist of a 64-bit guest 71 * physical address <addr>, a 32-bit length <len>, a 16-bit 72 * <flags>, and a 16-bit <next> field (all in guest byte order). 73 * 74 * There are three flags that may be set : 75 * NEXT descriptor is chained, so use its "next" field 76 * WRITE descriptor is for host to write into guest RAM 77 * (else host is to read from guest RAM) 78 * INDIRECT descriptor address field is (guest physical) 79 * address of a linear array of descriptors 80 * 81 * Unless INDIRECT is set, <len> is the number of bytes that may 82 * be read/written from guest physical address <addr>. If 83 * INDIRECT is set, WRITE is ignored and <len> provides the length 84 * of the indirect descriptors (and <len> must be a multiple of 85 * 16). Note that NEXT may still be set in the main descriptor 86 * pointing to the indirect, and should be set in each indirect 87 * descriptor that uses the next descriptor (these should generally 88 * be numbered sequentially). However, INDIRECT must not be set 89 * in the indirect descriptors. Upon reaching an indirect descriptor 90 * without a NEXT bit, control returns to the direct descriptors. 91 * 92 * Except inside an indirect, each <next> value must be in the 93 * range [0 .. N) (i.e., the half-open interval). (Inside an 94 * indirect, each <next> must be in the range [0 .. <len>/16).) 95 * 96 * The "avail" data structures reside in the same pages as the 97 * "desc" structures since both together are used by the device to 98 * pass information to the hypervisor's virtual driver. These 99 * begin with a 16-bit <flags> field and 16-bit index <idx>, then 100 * have <N> 16-bit <ring> values, followed by one final 16-bit 101 * field <used_event>. The <N> <ring> entries are simply indices 102 * indices into the descriptor ring (and thus must meet the same 103 * constraints as each <next> value). However, <idx> is counted 104 * up from 0 (initially) and simply wraps around after 65535; it 105 * is taken mod <N> to find the next available entry. 106 * 107 * The "used" ring occupies a separate page or pages, and contains 108 * values written from the virtual driver back to the guest OS. 109 * This begins with a 16-bit <flags> and 16-bit <idx>, then there 110 * are <N> "vring_used" elements, followed by a 16-bit <avail_event>. 111 * The <N> "vring_used" elements consist of a 32-bit <id> and a 112 * 32-bit <len> (vu_tlen below). The <id> is simply the index of 113 * the head of a descriptor chain the guest made available 114 * earlier, and the <len> is the number of bytes actually written, 115 * e.g., in the case of a network driver that provided a large 116 * receive buffer but received only a small amount of data. 117 * 118 * The two event fields, <used_event> and <avail_event>, in the 119 * avail and used rings (respectively -- note the reversal!), are 120 * always provided, but are used only if the virtual device 121 * negotiates the VIRTIO_RING_F_EVENT_IDX feature during feature 122 * negotiation. Similarly, both rings provide a flag -- 123 * VRING_AVAIL_F_NO_INTERRUPT and VRING_USED_F_NO_NOTIFY -- in 124 * their <flags> field, indicating that the guest does not need an 125 * interrupt, or that the hypervisor driver does not need a 126 * notify, when descriptors are added to the corresponding ring. 127 * (These are provided only for interrupt optimization and need 128 * not be implemented.) 129 */ 130 #define VRING_ALIGN 4096 131 132 /* 133 * The address of any given virtual queue is determined by a single 134 * Page Frame Number register. The guest writes the PFN into the 135 * PCI config space. However, a device that has two or more 136 * virtqueues can have a different PFN, and size, for each queue. 137 * The number of queues is determinable via the PCI config space 138 * VTCFG_R_QSEL register. Writes to QSEL select the queue: 0 means 139 * queue #0, 1 means queue#1, etc. Once a queue is selected, the 140 * remaining PFN and QNUM registers refer to that queue. 141 * 142 * QNUM is a read-only register containing a nonzero power of two 143 * that indicates the (hypervisor's) queue size. Or, if reading it 144 * produces zero, the hypervisor does not have a corresponding 145 * queue. (The number of possible queues depends on the virtual 146 * device. The block device has just one; the network device 147 * provides either two -- 0 = receive, 1 = transmit -- or three, 148 * with 2 = control.) 149 * 150 * PFN is a read/write register giving the physical page address of 151 * the virtqueue in guest memory (the guest must allocate enough space 152 * based on the hypervisor's provided QNUM). 153 * 154 * QNOTIFY is effectively write-only: when the guest writes a queue 155 * number to the register, the hypervisor should scan the specified 156 * virtqueue. (Reading QNOTIFY currently always gets 0). 157 */ 158 159 /* 160 * PFN register shift amount 161 */ 162 #define VRING_PFN 12 163 164 /* 165 * PCI vendor/device IDs 166 */ 167 #define VIRTIO_VENDOR 0x1AF4 168 #define VIRTIO_DEV_NET 0x1000 169 #define VIRTIO_DEV_BLOCK 0x1001 170 #define VIRTIO_DEV_CONSOLE 0x1003 171 #define VIRTIO_DEV_RANDOM 0x1005 172 #define VIRTIO_DEV_SCSI 0x1008 173 #define VIRTIO_DEV_9P 0x1009 174 #define VIRTIO_DEV_INPUT 0x1052 175 176 /* 177 * PCI revision IDs 178 */ 179 #define VIRTIO_REV_INPUT 1 180 181 /* 182 * PCI subvendor IDs 183 */ 184 #define VIRTIO_SUBVEN_INPUT 0x108E 185 186 /* 187 * PCI subdevice IDs 188 */ 189 #define VIRTIO_SUBDEV_INPUT 0x1100 190 191 /* From section 2.3, "Virtqueue Configuration", of the virtio specification */ 192 static inline int 193 vring_size_aligned(u_int qsz) 194 { 195 return (roundup2(vring_size(qsz, VRING_ALIGN), VRING_ALIGN)); 196 } 197 198 struct vmctx; 199 struct pci_devinst; 200 struct vqueue_info; 201 struct vm_snapshot_meta; 202 203 /* 204 * A virtual device, with some number (possibly 0) of virtual 205 * queues and some size (possibly 0) of configuration-space 206 * registers private to the device. The virtio_softc should come 207 * at the front of each "derived class", so that a pointer to the 208 * virtio_softc is also a pointer to the more specific, derived- 209 * from-virtio driver's softc. 210 * 211 * Note: inside each hypervisor virtio driver, changes to these 212 * data structures must be locked against other threads, if any. 213 * Except for PCI config space register read/write, we assume each 214 * driver does the required locking, but we need a pointer to the 215 * lock (if there is one) for PCI config space read/write ops. 216 * 217 * When the guest reads or writes the device's config space, the 218 * generic layer checks for operations on the special registers 219 * described above. If the offset of the register(s) being read 220 * or written is past the CFG area (CFG0 or CFG1), the request is 221 * passed on to the virtual device, after subtracting off the 222 * generic-layer size. (So, drivers can just use the offset as 223 * an offset into "struct config", for instance.) 224 * 225 * (The virtio layer also makes sure that the read or write is to/ 226 * from a "good" config offset, hence vc_cfgsize, and on BAR #0. 227 * However, the driver must verify the read or write size and offset 228 * and that no one is writing a readonly register.) 229 * 230 * The BROKED flag ("this thing done gone and broked") is for future 231 * use. 232 */ 233 #define VIRTIO_USE_MSIX 0x01 234 #define VIRTIO_EVENT_IDX 0x02 /* use the event-index values */ 235 #define VIRTIO_BROKED 0x08 /* ??? */ 236 237 struct virtio_softc { 238 struct virtio_consts *vs_vc; /* constants (see below) */ 239 int vs_flags; /* VIRTIO_* flags from above */ 240 pthread_mutex_t *vs_mtx; /* POSIX mutex, if any */ 241 struct pci_devinst *vs_pi; /* PCI device instance */ 242 uint32_t vs_negotiated_caps; /* negotiated capabilities */ 243 struct vqueue_info *vs_queues; /* one per vc_nvq */ 244 int vs_curq; /* current queue */ 245 uint8_t vs_status; /* value from last status write */ 246 uint8_t vs_isr; /* ISR flags, if not MSI-X */ 247 uint16_t vs_msix_cfg_idx; /* MSI-X vector for config event */ 248 }; 249 250 #define VS_LOCK(vs) \ 251 do { \ 252 if (vs->vs_mtx) \ 253 pthread_mutex_lock(vs->vs_mtx); \ 254 } while (0) 255 256 #define VS_UNLOCK(vs) \ 257 do { \ 258 if (vs->vs_mtx) \ 259 pthread_mutex_unlock(vs->vs_mtx); \ 260 } while (0) 261 262 struct virtio_consts { 263 const char *vc_name; /* name of driver (for diagnostics) */ 264 int vc_nvq; /* number of virtual queues */ 265 size_t vc_cfgsize; /* size of dev-specific config regs */ 266 void (*vc_reset)(void *); /* called on virtual device reset */ 267 void (*vc_qnotify)(void *, struct vqueue_info *); 268 /* called on QNOTIFY if no VQ notify */ 269 int (*vc_cfgread)(void *, int, int, uint32_t *); 270 /* called to read config regs */ 271 int (*vc_cfgwrite)(void *, int, int, uint32_t); 272 /* called to write config regs */ 273 void (*vc_apply_features)(void *, uint64_t); 274 /* called to apply negotiated features */ 275 uint64_t vc_hv_caps; /* hypervisor-provided capabilities */ 276 void (*vc_pause)(void *); /* called to pause device activity */ 277 void (*vc_resume)(void *); /* called to resume device activity */ 278 int (*vc_snapshot)(void *, struct vm_snapshot_meta *); 279 /* called to save / restore device state */ 280 }; 281 282 /* 283 * Data structure allocated (statically) per virtual queue. 284 * 285 * Drivers may change vq_qsize after a reset. When the guest OS 286 * requests a device reset, the hypervisor first calls 287 * vs->vs_vc->vc_reset(); then the data structure below is 288 * reinitialized (for each virtqueue: vs->vs_vc->vc_nvq). 289 * 290 * The remaining fields should only be fussed-with by the generic 291 * code. 292 * 293 * Note: the addresses of vq_desc, vq_avail, and vq_used are all 294 * computable from each other, but it's a lot simpler if we just 295 * keep a pointer to each one. The event indices are similarly 296 * (but more easily) computable, and this time we'll compute them: 297 * they're just XX_ring[N]. 298 */ 299 #define VQ_ALLOC 0x01 /* set once we have a pfn */ 300 #define VQ_BROKED 0x02 /* ??? */ 301 struct vqueue_info { 302 uint16_t vq_qsize; /* size of this queue (a power of 2) */ 303 void (*vq_notify)(void *, struct vqueue_info *); 304 /* called instead of vc_notify, if not NULL */ 305 306 struct virtio_softc *vq_vs; /* backpointer to softc */ 307 uint16_t vq_num; /* we're the num'th queue in the softc */ 308 309 uint16_t vq_flags; /* flags (see above) */ 310 uint16_t vq_last_avail; /* a recent value of vq_avail->idx */ 311 uint16_t vq_next_used; /* index of the next used slot to be filled */ 312 uint16_t vq_save_used; /* saved vq_used->idx; see vq_endchains */ 313 uint16_t vq_msix_idx; /* MSI-X index, or VIRTIO_MSI_NO_VECTOR */ 314 315 uint32_t vq_pfn; /* PFN of virt queue (not shifted!) */ 316 317 volatile struct vring_desc *vq_desc; /* descriptor array */ 318 volatile struct vring_avail *vq_avail; /* the "avail" ring */ 319 volatile struct vring_used *vq_used; /* the "used" ring */ 320 321 }; 322 /* as noted above, these are sort of backwards, name-wise */ 323 #define VQ_AVAIL_EVENT_IDX(vq) \ 324 (*(volatile uint16_t *)&(vq)->vq_used->ring[(vq)->vq_qsize]) 325 #define VQ_USED_EVENT_IDX(vq) \ 326 ((vq)->vq_avail->ring[(vq)->vq_qsize]) 327 328 /* 329 * Is this ring ready for I/O? 330 */ 331 static inline int 332 vq_ring_ready(struct vqueue_info *vq) 333 { 334 335 return (vq->vq_flags & VQ_ALLOC); 336 } 337 338 /* 339 * Are there "available" descriptors? (This does not count 340 * how many, just returns True if there are some.) 341 */ 342 static inline int 343 vq_has_descs(struct vqueue_info *vq) 344 { 345 346 return (vq_ring_ready(vq) && vq->vq_last_avail != 347 vq->vq_avail->idx); 348 } 349 350 /* 351 * Deliver an interrupt to the guest for a specific MSI-X queue or 352 * event. 353 */ 354 static inline void 355 vi_interrupt(struct virtio_softc *vs, uint8_t isr, uint16_t msix_idx) 356 { 357 358 if (pci_msix_enabled(vs->vs_pi)) 359 pci_generate_msix(vs->vs_pi, msix_idx); 360 else { 361 VS_LOCK(vs); 362 vs->vs_isr |= isr; 363 pci_generate_msi(vs->vs_pi, 0); 364 pci_lintr_assert(vs->vs_pi); 365 VS_UNLOCK(vs); 366 } 367 } 368 369 /* 370 * Deliver an interrupt to the guest on the given virtual queue (if 371 * possible, or a generic MSI interrupt if not using MSI-X). 372 */ 373 static inline void 374 vq_interrupt(struct virtio_softc *vs, struct vqueue_info *vq) 375 { 376 377 vi_interrupt(vs, VIRTIO_PCI_ISR_INTR, vq->vq_msix_idx); 378 } 379 380 static inline void 381 vq_kick_enable(struct vqueue_info *vq) 382 { 383 384 vq->vq_used->flags &= ~VRING_USED_F_NO_NOTIFY; 385 /* 386 * Full memory barrier to make sure the store to vq_used->flags 387 * happens before the load from vq_avail->idx, which results from a 388 * subsequent call to vq_has_descs(). 389 */ 390 atomic_thread_fence_seq_cst(); 391 } 392 393 static inline void 394 vq_kick_disable(struct vqueue_info *vq) 395 { 396 397 vq->vq_used->flags |= VRING_USED_F_NO_NOTIFY; 398 } 399 400 struct iovec; 401 402 /* 403 * Request description returned by vq_getchain. 404 * 405 * Writable iovecs start at iov[req.readable]. 406 */ 407 struct vi_req { 408 int readable; /* num of readable iovecs */ 409 int writable; /* num of writable iovecs */ 410 unsigned int idx; /* ring index */ 411 }; 412 413 void vi_softc_linkup(struct virtio_softc *vs, struct virtio_consts *vc, 414 void *dev_softc, struct pci_devinst *pi, 415 struct vqueue_info *queues); 416 int vi_intr_init(struct virtio_softc *vs, int barnum, int use_msix); 417 void vi_reset_dev(struct virtio_softc *); 418 void vi_set_io_bar(struct virtio_softc *, int); 419 420 int vq_getchain(struct vqueue_info *vq, struct iovec *iov, int niov, 421 struct vi_req *reqp); 422 void vq_retchains(struct vqueue_info *vq, uint16_t n_chains); 423 void vq_relchain_prepare(struct vqueue_info *vq, uint16_t idx, 424 uint32_t iolen); 425 void vq_relchain_publish(struct vqueue_info *vq); 426 void vq_relchain(struct vqueue_info *vq, uint16_t idx, uint32_t iolen); 427 void vq_endchains(struct vqueue_info *vq, int used_all_avail); 428 429 uint64_t vi_pci_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, 430 int baridx, uint64_t offset, int size); 431 void vi_pci_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, 432 int baridx, uint64_t offset, int size, uint64_t value); 433 #ifdef BHYVE_SNAPSHOT 434 int vi_pci_snapshot(struct vm_snapshot_meta *meta); 435 int vi_pci_pause(struct vmctx *ctx, struct pci_devinst *pi); 436 int vi_pci_resume(struct vmctx *ctx, struct pci_devinst *pi); 437 #endif 438 #endif /* _BHYVE_VIRTIO_H_ */ 439