xref: /freebsd/usr.sbin/cpucontrol/amd10h.c (revision 190cef3d)
1 /*-
2  * Copyright (c) 2012 Andriy Gapon <avg@FreeBSD.org>.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24  */
25 
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
28 
29 #include <sys/types.h>
30 #include <sys/stat.h>
31 #include <sys/mman.h>
32 #include <sys/ioctl.h>
33 #include <sys/ioccom.h>
34 #include <sys/cpuctl.h>
35 
36 #include <machine/cpufunc.h>
37 #include <machine/specialreg.h>
38 
39 #include <assert.h>
40 #include <stdio.h>
41 #include <stdlib.h>
42 #include <string.h>
43 #include <unistd.h>
44 #include <fcntl.h>
45 #include <err.h>
46 
47 #include "cpucontrol.h"
48 #include "amd.h"
49 
50 int
51 amd10h_probe(int fd)
52 {
53 	char vendor[13];
54 	cpuctl_cpuid_args_t idargs;
55 	uint32_t family;
56 	uint32_t signature;
57 	int error;
58 
59 	idargs.level = 0;
60 	error = ioctl(fd, CPUCTL_CPUID, &idargs);
61 	if (error < 0) {
62 		WARN(0, "ioctl()");
63 		return (1);
64 	}
65 	((uint32_t *)vendor)[0] = idargs.data[1];
66 	((uint32_t *)vendor)[1] = idargs.data[3];
67 	((uint32_t *)vendor)[2] = idargs.data[2];
68 	vendor[12] = '\0';
69 	if (strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) != 0)
70 		return (1);
71 
72 	idargs.level = 1;
73 	error = ioctl(fd, CPUCTL_CPUID, &idargs);
74 	if (error < 0) {
75 		WARN(0, "ioctl()");
76 		return (1);
77 	}
78 	signature = idargs.data[0];
79 	family = ((signature >> 8) & 0x0f) + ((signature >> 20) & 0xff);
80 	if (family < 0x10)
81 		return (1);
82 	return (0);
83 }
84 
85 /*
86  * NB: the format of microcode update files is not documented by AMD.
87  * It has been reverse engineered from studying Coreboot, illumos and Linux
88  * source code.
89  */
90 void
91 amd10h_update(const char *dev, const char *path)
92 {
93 	struct stat st;
94 	cpuctl_cpuid_args_t idargs;
95 	cpuctl_msr_args_t msrargs;
96 	cpuctl_update_args_t args;
97 	const amd_10h_fw_header_t *fw_header;
98 	const amd_10h_fw_header_t *selected_fw;
99 	const equiv_cpu_entry_t *equiv_cpu_table;
100 	const section_header_t *section_header;
101 	const container_header_t *container_header;
102 	const uint8_t *fw_data;
103 	uint8_t *fw_image;
104 	size_t fw_size;
105 	size_t selected_size;
106 	uint32_t revision;
107 	uint32_t new_rev;
108 	uint32_t signature;
109 	uint16_t equiv_id;
110 	int fd, devfd;
111 	unsigned int i;
112 	int error;
113 
114 	assert(path);
115 	assert(dev);
116 
117 	fd = -1;
118 	fw_image = MAP_FAILED;
119 	devfd = open(dev, O_RDWR);
120 	if (devfd < 0) {
121 		WARN(0, "could not open %s for writing", dev);
122 		return;
123 	}
124 	idargs.level = 1;
125 	error = ioctl(devfd, CPUCTL_CPUID, &idargs);
126 	if (error < 0) {
127 		WARN(0, "ioctl()");
128 		goto done;
129 	}
130 	signature = idargs.data[0];
131 
132 	msrargs.msr = MSR_BIOS_SIGN;
133 	error = ioctl(devfd, CPUCTL_RDMSR, &msrargs);
134 	if (error < 0) {
135 		WARN(0, "ioctl(%s)", dev);
136 		goto done;
137 	}
138 	revision = (uint32_t)msrargs.data;
139 
140 	WARNX(1, "found cpu family %#x model %#x "
141 	    "stepping %#x extfamily %#x extmodel %#x.",
142 	    ((signature >> 8) & 0x0f) + ((signature >> 20) & 0xff),
143 	    (signature >> 4) & 0x0f,
144 	    (signature >> 0) & 0x0f, (signature >> 20) & 0xff,
145 	    (signature >> 16) & 0x0f);
146 	WARNX(1, "microcode revision %#x", revision);
147 
148 	/*
149 	 * Open the firmware file.
150 	 */
151 	WARNX(1, "checking %s for update.", path);
152 	fd = open(path, O_RDONLY, 0);
153 	if (fd < 0) {
154 		WARN(0, "open(%s)", path);
155 		goto done;
156 	}
157 	error = fstat(fd, &st);
158 	if (error != 0) {
159 		WARN(0, "fstat(%s)", path);
160 		goto done;
161 	}
162 	if (st.st_size < 0 || (size_t)st.st_size <
163 	    (sizeof(*container_header) + sizeof(*section_header))) {
164 		WARNX(2, "file too short: %s", path);
165 		goto done;
166 	}
167 	fw_size = st.st_size;
168 
169 	/*
170 	 * mmap the whole image.
171 	 */
172 	fw_image = (uint8_t *)mmap(NULL, st.st_size, PROT_READ,
173 	    MAP_PRIVATE, fd, 0);
174 	if (fw_image == MAP_FAILED) {
175 		WARN(0, "mmap(%s)", path);
176 		goto done;
177 	}
178 
179 	fw_data = fw_image;
180 	container_header = (const container_header_t *)fw_data;
181 	if (container_header->magic != AMD_10H_MAGIC) {
182 		WARNX(2, "%s is not a valid amd firmware: bad magic", path);
183 		goto done;
184 	}
185 	fw_data += sizeof(*container_header);
186 	fw_size -= sizeof(*container_header);
187 
188 	section_header = (const section_header_t *)fw_data;
189 	if (section_header->type != AMD_10H_EQUIV_TABLE_TYPE) {
190 		WARNX(2, "%s is not a valid amd firmware: "
191 		    "first section is not CPU equivalence table", path);
192 		goto done;
193 	}
194 	if (section_header->size == 0) {
195 		WARNX(2, "%s is not a valid amd firmware: "
196 		    "first section is empty", path);
197 		goto done;
198 	}
199 	fw_data += sizeof(*section_header);
200 	fw_size -= sizeof(*section_header);
201 
202 	if (section_header->size > fw_size) {
203 		WARNX(2, "%s is not a valid amd firmware: "
204 		    "file is truncated", path);
205 		goto done;
206 	}
207 	if (section_header->size < sizeof(*equiv_cpu_table)) {
208 		WARNX(2, "%s is not a valid amd firmware: "
209 		    "first section is too short", path);
210 		goto done;
211 	}
212 	equiv_cpu_table = (const equiv_cpu_entry_t *)fw_data;
213 	fw_data += section_header->size;
214 	fw_size -= section_header->size;
215 
216 	equiv_id = 0;
217 	for (i = 0; equiv_cpu_table[i].installed_cpu != 0; i++) {
218 		if (signature == equiv_cpu_table[i].installed_cpu) {
219 			equiv_id = equiv_cpu_table[i].equiv_cpu;
220 			WARNX(3, "equiv_id: %x, signature %8x,"
221 			    " equiv_cpu_table[%d] %8x", equiv_id, signature,
222 			    i, equiv_cpu_table[i].installed_cpu);
223 			break;
224 		}
225 	}
226 	if (equiv_id == 0) {
227 		WARNX(2, "CPU is not found in the equivalence table");
228 		goto done;
229 	}
230 
231 	selected_fw = NULL;
232 	selected_size = 0;
233 	while (fw_size >= sizeof(*section_header)) {
234 		section_header = (const section_header_t *)fw_data;
235 		fw_data += sizeof(*section_header);
236 		fw_size -= sizeof(*section_header);
237 		if (section_header->type != AMD_10H_uCODE_TYPE) {
238 			WARNX(2, "%s is not a valid amd firmware: "
239 			    "section has incorret type", path);
240 			goto done;
241 		}
242 		if (section_header->size > fw_size) {
243 			WARNX(2, "%s is not a valid amd firmware: "
244 			    "file is truncated", path);
245 			goto done;
246 		}
247 		if (section_header->size < sizeof(*fw_header)) {
248 			WARNX(2, "%s is not a valid amd firmware: "
249 			    "section is too short", path);
250 			goto done;
251 		}
252 		fw_header = (const amd_10h_fw_header_t *)fw_data;
253 		fw_data += section_header->size;
254 		fw_size -= section_header->size;
255 
256 		if (fw_header->processor_rev_id != equiv_id) {
257 			WARNX(1, "firmware processort_rev_id %x, equiv_id %x",
258 			    fw_header->processor_rev_id, equiv_id);
259 			continue; /* different cpu */
260 		}
261 		if (fw_header->patch_id <= revision) {
262 			WARNX(1, "patch_id %x, revision %x",
263 			    fw_header->patch_id, revision);
264 			continue; /* not newer revision */
265 		}
266 		if (fw_header->nb_dev_id != 0 || fw_header->sb_dev_id != 0) {
267 			WARNX(2, "Chipset-specific microcode is not supported");
268 		}
269 
270 		WARNX(3, "selecting revision: %x", fw_header->patch_id);
271 		revision = fw_header->patch_id;
272 		selected_fw = fw_header;
273 		selected_size = section_header->size;
274 	}
275 
276 	if (fw_size != 0) {
277 		WARNX(2, "%s is not a valid amd firmware: "
278 		    "file is truncated", path);
279 		goto done;
280 	}
281 
282 	if (selected_fw != NULL) {
283 		WARNX(1, "selected ucode size is %zu", selected_size);
284 		fprintf(stderr, "%s: updating cpu %s to revision %#x... ",
285 		    path, dev, revision);
286 
287 		args.data = __DECONST(void *, selected_fw);
288 		args.size = selected_size;
289 		error = ioctl(devfd, CPUCTL_UPDATE, &args);
290 		if (error < 0) {
291 			fprintf(stderr, "failed.\n");
292 			warn("ioctl()");
293 			goto done;
294 		}
295 		fprintf(stderr, "done.\n");
296 	}
297 
298 	msrargs.msr = MSR_BIOS_SIGN;
299 	error = ioctl(devfd, CPUCTL_RDMSR, &msrargs);
300 	if (error < 0) {
301 		WARN(0, "ioctl(%s)", dev);
302 		goto done;
303 	}
304 	new_rev = (uint32_t)msrargs.data;
305 	if (new_rev != revision)
306 		WARNX(0, "revision after update %#x", new_rev);
307 
308 done:
309 	if (fd >= 0)
310 		close(fd);
311 	if (devfd >= 0)
312 		close(devfd);
313 	if (fw_image != MAP_FAILED)
314 		if (munmap(fw_image, st.st_size) != 0)
315 			warn("munmap(%s)", path);
316 	return;
317 }
318