184ab085aSmws /* 284ab085aSmws * CDDL HEADER START 384ab085aSmws * 484ab085aSmws * The contents of this file are subject to the terms of the 5074bb90dSTom Pothier * Common Development and Distribution License (the "License"). 6074bb90dSTom Pothier * You may not use this file except in compliance with the License. 784ab085aSmws * 884ab085aSmws * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 984ab085aSmws * or http://www.opensolaris.org/os/licensing. 1084ab085aSmws * See the License for the specific language governing permissions 1184ab085aSmws * and limitations under the License. 1284ab085aSmws * 1384ab085aSmws * When distributing Covered Code, include this CDDL HEADER in each 1484ab085aSmws * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 1584ab085aSmws * If applicable, add the following below this CDDL HEADER, with the 1684ab085aSmws * fields enclosed by brackets "[]" replaced with your own identifying 1784ab085aSmws * information: Portions Copyright [yyyy] [name of copyright owner] 1884ab085aSmws * 1984ab085aSmws * CDDL HEADER END 2084ab085aSmws */ 2184ab085aSmws 2284ab085aSmws /* 234e901881SDale Ghent * Copyright 2015 OmniTI Computer Consulting, Inc. All rights reserved. 246734c4b0SRobert Mustacchi * Copyright 2015 Joyent, Inc. 2503f9f63dSTom Pothier * Copyright 2010 Sun Microsystems, Inc. All rights reserved. 2684ab085aSmws * Use is subject to license terms. 2784ab085aSmws */ 2884ab085aSmws 2984ab085aSmws /* 3084ab085aSmws * This header file defines the implementation structures for the SMBIOS access 3184ab085aSmws * library, libsmbios, and an equivalent kernel module. Clients should use 3284ab085aSmws * the <smbios.h> or <sys/smbios.h> header files to access DMTF SMBIOS 3384ab085aSmws * information, NOT these underlying implementation structures from the spec. 3484ab085aSmws * In short, do not user this header file or these routines for any purpose. 3584ab085aSmws */ 3684ab085aSmws 3784ab085aSmws #ifndef _SYS_SMBIOS_IMPL_H 3884ab085aSmws #define _SYS_SMBIOS_IMPL_H 3984ab085aSmws 4084ab085aSmws #include <sys/smbios.h> 4184ab085aSmws #include <sys/sysmacros.h> 4284ab085aSmws 4384ab085aSmws #ifdef _KERNEL 4484ab085aSmws #include <sys/systm.h> 4584ab085aSmws #else 4684ab085aSmws #include <strings.h> 4784ab085aSmws #include <stddef.h> 4884ab085aSmws #endif 4984ab085aSmws 5084ab085aSmws #ifdef __cplusplus 5184ab085aSmws extern "C" { 5284ab085aSmws #endif 5384ab085aSmws 5484ab085aSmws #pragma pack(1) 5584ab085aSmws 5684ab085aSmws typedef struct smb_header { 5784ab085aSmws uint8_t smbh_type; /* structure type (SMB_TYPE_* value) */ 5884ab085aSmws uint8_t smbh_len; /* length in bytes of formatted area */ 5984ab085aSmws uint16_t smbh_hdl; /* structure handle */ 6084ab085aSmws } smb_header_t; 6184ab085aSmws 6284ab085aSmws typedef struct smb_bios { 6384ab085aSmws smb_header_t smbbi_hdr; /* structure header */ 6484ab085aSmws uint8_t smbbi_vendor; /* bios vendor string */ 6584ab085aSmws uint8_t smbbi_version; /* bios version string */ 6684ab085aSmws uint16_t smbbi_segment; /* segment location of bios address */ 6784ab085aSmws uint8_t smbbi_reldate; /* bios release date */ 6884ab085aSmws uint8_t smbbi_romsize; /* bios rom size (64k * (n + 1)) */ 6984ab085aSmws uint64_t smbbi_cflags; /* bios characteristics */ 7084ab085aSmws uint8_t smbbi_xcflags[1]; /* bios characteristics extensions */ 7184ab085aSmws } smb_bios_t; 7284ab085aSmws 7384ab085aSmws typedef struct smb_system { 7484ab085aSmws smb_header_t smbsi_hdr; /* structure header */ 7584ab085aSmws uint8_t smbsi_manufacturer; /* manufacturer */ 7684ab085aSmws uint8_t smbsi_product; /* product name */ 7784ab085aSmws uint8_t smbsi_version; /* version */ 7884ab085aSmws uint8_t smbsi_serial; /* serial number */ 7984ab085aSmws uint8_t smbsi_uuid[16]; /* UUID */ 8084ab085aSmws uint8_t smbsi_wakeup; /* wake-up type */ 8184ab085aSmws uint8_t smbsi_sku; /* SKU number */ 8284ab085aSmws uint8_t smbsi_family; /* family */ 8384ab085aSmws } smb_system_t; 8484ab085aSmws 8584ab085aSmws typedef struct smb_bboard { 8684ab085aSmws smb_header_t smbbb_hdr; /* structure header */ 8784ab085aSmws uint8_t smbbb_manufacturer; /* manufacturer */ 8884ab085aSmws uint8_t smbbb_product; /* product name */ 8984ab085aSmws uint8_t smbbb_version; /* version */ 9084ab085aSmws uint8_t smbbb_serial; /* serial number */ 9184ab085aSmws uint8_t smbbb_asset; /* asset tag */ 9284ab085aSmws uint8_t smbbb_flags; /* feature flags */ 9384ab085aSmws uint8_t smbbb_location; /* location in chassis */ 9484ab085aSmws uint16_t smbbb_chassis; /* chassis handle */ 9584ab085aSmws uint8_t smbbb_type; /* board type */ 9684ab085aSmws uint8_t smbbb_cn; /* number of contained handles */ 9784ab085aSmws uint16_t smbbb_cv[1]; /* array of contained handles */ 9884ab085aSmws } smb_bboard_t; 9984ab085aSmws 10084ab085aSmws typedef struct smb_chassis { 10184ab085aSmws smb_header_t smbch_hdr; /* structure header */ 10284ab085aSmws uint8_t smbch_manufacturer; /* manufacturer */ 10384ab085aSmws uint8_t smbch_type; /* type */ 10484ab085aSmws uint8_t smbch_version; /* version */ 10584ab085aSmws uint8_t smbch_serial; /* serial number */ 10684ab085aSmws uint8_t smbch_asset; /* asset tag */ 10784ab085aSmws uint8_t smbch_bustate; /* boot-up state */ 10884ab085aSmws uint8_t smbch_psstate; /* power supply state */ 10984ab085aSmws uint8_t smbch_thstate; /* thermal state */ 11084ab085aSmws uint8_t smbch_security; /* security state */ 11184ab085aSmws uint32_t smbch_oemdata; /* OEM-specific data */ 11284ab085aSmws uint8_t smbch_uheight; /* enclosure height */ 11384ab085aSmws uint8_t smbch_cords; /* number of power cords */ 11484ab085aSmws uint8_t smbch_cn; /* number of contained records */ 11584ab085aSmws uint8_t smbch_cm; /* size of contained records */ 11684ab085aSmws uint8_t smbch_cv[1]; /* array of contained records */ 11784ab085aSmws } smb_chassis_t; 11884ab085aSmws 1194e901881SDale Ghent /* WARNING: the argument is evaluated three times! */ 1204e901881SDale Ghent #define SMB_CH_SKU(smbcp) ((char *) \ 1214e901881SDale Ghent (smbcp)->smbch_cv + ((smbcp)->smbch_cn * (smbcp)->smbch_cm)) 12284ab085aSmws #define SMB_CHT_LOCK 0x80 /* lock bit within smbch_type */ 12384ab085aSmws 12484ab085aSmws typedef struct smb_processor { 12584ab085aSmws smb_header_t smbpr_hdr; /* structure header */ 12684ab085aSmws uint8_t smbpr_socket; /* socket designation */ 12784ab085aSmws uint8_t smbpr_type; /* processor type (see <smbios.h>) */ 12884ab085aSmws uint8_t smbpr_family; /* processor family (see <smbios.h>) */ 12984ab085aSmws uint8_t smbpr_manufacturer; /* manufacturer */ 13084ab085aSmws uint64_t smbpr_cpuid; /* processor cpuid information */ 13184ab085aSmws uint8_t smbpr_version; /* version */ 13284ab085aSmws uint8_t smbpr_voltage; /* voltage */ 13384ab085aSmws uint16_t smbpr_clkspeed; /* external clock speed in MHz */ 13484ab085aSmws uint16_t smbpr_maxspeed; /* maximum speed in MHz */ 13584ab085aSmws uint16_t smbpr_curspeed; /* current speed in MHz */ 13684ab085aSmws uint8_t smbpr_status; /* status (see <smbios.h>) */ 13784ab085aSmws uint8_t smbpr_upgrade; /* upgrade */ 13884ab085aSmws uint16_t smbpr_l1cache; /* L1 cache handle (if any) */ 13984ab085aSmws uint16_t smbpr_l2cache; /* L2 cache handle (if any) */ 14084ab085aSmws uint16_t smbpr_l3cache; /* L3 cache handle (if any) */ 14184ab085aSmws uint8_t smbpr_serial; /* serial number */ 14284ab085aSmws uint8_t smbpr_asset; /* asset tag */ 14384ab085aSmws uint8_t smbpr_part; /* part number */ 1444e901881SDale Ghent uint8_t smbpr_corecount; /* number of cores per socket */ 1454e901881SDale Ghent uint8_t smbpr_coresenabled; /* number of enabled cores per socket */ 1464e901881SDale Ghent uint8_t smbpr_threadcount; /* number of threads per socket */ 1474e901881SDale Ghent uint16_t smbpr_cflags; /* cpu characteristics (see <smbios.h>) */ 1484e901881SDale Ghent uint16_t smbpr_family2; /* processor family2 (see <smbios.h>) */ 1496734c4b0SRobert Mustacchi uint16_t smbpr_corecount2; /* second number of cores per socket */ 1506734c4b0SRobert Mustacchi uint16_t smbpr_coresenabled2; /* second number of enabled cores */ 1516734c4b0SRobert Mustacchi uint16_t smbpr_threadcount2; /* second number of enabled threads */ 15284ab085aSmws } smb_processor_t; 15384ab085aSmws 15484ab085aSmws typedef struct smb_cache { 15584ab085aSmws smb_header_t smbca_hdr; /* structure header */ 15684ab085aSmws uint8_t smbca_socket; /* socket designation */ 15784ab085aSmws uint16_t smbca_config; /* cache configuration */ 15884ab085aSmws uint16_t smbca_maxsize; /* maximum installed size */ 15984ab085aSmws uint16_t smbca_size; /* installed size */ 16084ab085aSmws uint16_t smbca_stype; /* supported SRAM type */ 16184ab085aSmws uint16_t smbca_ctype; /* current SRAM type */ 16284ab085aSmws uint8_t smbca_speed; /* speed in nanoseconds */ 16384ab085aSmws uint8_t smbca_etype; /* error correction type */ 16484ab085aSmws uint8_t smbca_ltype; /* logical cache type */ 16584ab085aSmws uint8_t smbca_assoc; /* associativity */ 16684ab085aSmws } smb_cache_t; 16784ab085aSmws 168e4586ebfSmws /* 1694e901881SDale Ghent * Convert encoded cache size to bytes: DSP0134 Section 7.8 explains the 170e4586ebfSmws * encoding. The highest bit is 0 for 1k units, 1 for 64k units, and this 171e4586ebfSmws * macro decodes the value into bytes for exporting to our clients. 172e4586ebfSmws */ 173e4586ebfSmws #define SMB_CACHE_SIZE(s) (((s) & 0x8000) ? \ 174e4586ebfSmws ((uint32_t)((s) & 0x7FFF) * 64 * 1024) : ((uint32_t)(s) * 1024)) 17584ab085aSmws 17684ab085aSmws #define SMB_CACHE_CFG_MODE(c) (((c) >> 8) & 3) 17784ab085aSmws #define SMB_CACHE_CFG_ENABLED(c) (((c) >> 7) & 1) 17884ab085aSmws #define SMB_CACHE_CFG_LOCATION(c) (((c) >> 5) & 3) 17984ab085aSmws #define SMB_CACHE_CFG_SOCKETED(c) (((c) >> 3) & 1) 18084ab085aSmws #define SMB_CACHE_CFG_LEVEL(c) (((c) & 7) + 1) 18184ab085aSmws 18284ab085aSmws typedef struct smb_port { 18384ab085aSmws smb_header_t smbpo_hdr; /* structure header */ 18484ab085aSmws uint8_t smbpo_iref; /* internal reference designator */ 18584ab085aSmws uint8_t smbpo_itype; /* internal connector type */ 18684ab085aSmws uint8_t smbpo_eref; /* external reference designator */ 18784ab085aSmws uint8_t smbpo_etype; /* external connector type */ 18884ab085aSmws uint8_t smbpo_ptype; /* port type */ 18984ab085aSmws } smb_port_t; 19084ab085aSmws 19184ab085aSmws typedef struct smb_slot { 19284ab085aSmws smb_header_t smbsl_hdr; /* structure header */ 19384ab085aSmws uint8_t smbsl_name; /* reference designation */ 19484ab085aSmws uint8_t smbsl_type; /* slot type */ 19584ab085aSmws uint8_t smbsl_width; /* slot data bus width */ 19684ab085aSmws uint8_t smbsl_usage; /* current usage */ 19784ab085aSmws uint8_t smbsl_length; /* slot length */ 19884ab085aSmws uint16_t smbsl_id; /* slot ID */ 19984ab085aSmws uint8_t smbsl_ch1; /* slot characteristics 1 */ 20084ab085aSmws uint8_t smbsl_ch2; /* slot characteristics 2 */ 20103f9f63dSTom Pothier uint16_t smbsl_sg; /* segment group number */ 20203f9f63dSTom Pothier uint8_t smbsl_bus; /* bus number */ 20303f9f63dSTom Pothier uint8_t smbsl_df; /* device/function number */ 20484ab085aSmws } smb_slot_t; 20584ab085aSmws 20684ab085aSmws typedef struct smb_obdev { 20784ab085aSmws uint8_t smbob_type; /* encoded type and enable bit */ 2084e901881SDale Ghent uint8_t smbob_name; /* description string */ 20984ab085aSmws } smb_obdev_t; 21084ab085aSmws 21184ab085aSmws #define SMB_OBT_ENABLED 0x80 /* enable bit within smbob_type */ 21284ab085aSmws 21384ab085aSmws typedef struct smb_strtab { 21484ab085aSmws smb_header_t smbtb_hdr; /* structure header */ 21584ab085aSmws uint8_t smbtb_count; /* number of strings */ 21684ab085aSmws } smb_strtab_t; 21784ab085aSmws 21884ab085aSmws typedef struct smb_lang { 21984ab085aSmws smb_header_t smblang_hdr; /* structure header */ 22084ab085aSmws uint8_t smblang_num; /* number of installed languages */ 22184ab085aSmws uint8_t smblang_flags; /* flags */ 22284ab085aSmws uint8_t smblang_resv[15]; /* reserved for future use */ 22384ab085aSmws uint8_t smblang_cur; /* current language string */ 22484ab085aSmws } smb_lang_t; 22584ab085aSmws 22684ab085aSmws typedef struct smb_sel { 22784ab085aSmws smb_header_t smbsel_hdr; /* structure header */ 22884ab085aSmws uint16_t smbsel_len; /* log area length */ 22984ab085aSmws uint16_t smbsel_hdroff; /* header offset */ 23084ab085aSmws uint16_t smbsel_dataoff; /* data offset */ 23184ab085aSmws uint8_t smbsel_method; /* access method */ 23284ab085aSmws uint8_t smbsel_status; /* status flags */ 23384ab085aSmws uint32_t smbsel_token; /* change token */ 23484ab085aSmws uint32_t smbsel_addr; /* access method address */ 23584ab085aSmws uint8_t smbsel_format; /* header format */ 23684ab085aSmws uint8_t smbsel_typec; /* number of type descriptors */ 23784ab085aSmws uint8_t smbsel_typesz; /* size of each type descriptor */ 23884ab085aSmws uint8_t smbsel_typev[1]; /* array of type descriptors */ 23984ab085aSmws } smb_sel_t; 24084ab085aSmws 24184ab085aSmws typedef struct smb_memarray { 24284ab085aSmws smb_header_t smbmarr_hdr; /* structure header */ 24384ab085aSmws uint8_t smbmarr_loc; /* location */ 24484ab085aSmws uint8_t smbmarr_use; /* use */ 24584ab085aSmws uint8_t smbmarr_ecc; /* error detect/correct mechanism */ 24684ab085aSmws uint32_t smbmarr_cap; /* maximum capacity */ 24784ab085aSmws uint16_t smbmarr_err; /* error handle */ 24884ab085aSmws uint16_t smbmarr_ndevs; /* number of slots or sockets */ 2494e901881SDale Ghent uint64_t smbmarr_extcap; /* extended maximum capacity */ 25084ab085aSmws } smb_memarray_t; 25184ab085aSmws 25284ab085aSmws typedef struct smb_memarrmap { 25384ab085aSmws smb_header_t smbamap_hdr; /* structure header */ 25484ab085aSmws uint32_t smbamap_start; /* starting address in kilobytes */ 25584ab085aSmws uint32_t smbamap_end; /* ending address in kilobytes */ 25684ab085aSmws uint16_t smbamap_array; /* physical memory array handle */ 25784ab085aSmws uint8_t smbamap_width; /* partition width */ 2584e901881SDale Ghent uint64_t smbamap_extstart; /* extended starting address in bytes */ 2594e901881SDale Ghent uint64_t smbamap_extend; /* extended ending address in bytes */ 26084ab085aSmws } smb_memarrmap_t; 26184ab085aSmws 26284ab085aSmws typedef struct smb_memdevice { 26384ab085aSmws smb_header_t smbmdev_hdr; /* structure header */ 26484ab085aSmws uint16_t smbmdev_array; /* array handle */ 26584ab085aSmws uint16_t smbmdev_error; /* error handle */ 26684ab085aSmws uint16_t smbmdev_twidth; /* total width */ 26784ab085aSmws uint16_t smbmdev_dwidth; /* data width */ 26884ab085aSmws uint16_t smbmdev_size; /* size in either K or MB */ 26984ab085aSmws uint8_t smbmdev_form; /* form factor */ 27084ab085aSmws uint8_t smbmdev_set; /* device set */ 27184ab085aSmws uint8_t smbmdev_dloc; /* device locator */ 27284ab085aSmws uint8_t smbmdev_bloc; /* bank locator */ 27384ab085aSmws uint8_t smbmdev_type; /* memory type */ 27484ab085aSmws uint16_t smbmdev_flags; /* detail flags */ 27584ab085aSmws uint16_t smbmdev_speed; /* speed in MHz */ 27684ab085aSmws uint8_t smbmdev_manufacturer; /* manufacturer */ 27784ab085aSmws uint8_t smbmdev_serial; /* serial number */ 27884ab085aSmws uint8_t smbmdev_asset; /* asset tag */ 27984ab085aSmws uint8_t smbmdev_part; /* part number */ 2804e901881SDale Ghent uint8_t smbmdev_attrs; /* attributes */ 2814e901881SDale Ghent uint32_t smbmdev_extsize; /* extended size */ 2824e901881SDale Ghent uint16_t smbmdev_clkspeed; /* configured clock speed */ 2834e901881SDale Ghent uint16_t smbmdev_minvolt; /* minimum voltage */ 2844e901881SDale Ghent uint16_t smbmdev_maxvolt; /* maximum voltage */ 2854e901881SDale Ghent uint16_t smbmdev_confvolt; /* configured voltage */ 28684ab085aSmws } smb_memdevice_t; 28784ab085aSmws 28884ab085aSmws #define SMB_MDS_KBYTES 0x8000 /* size in specified in kilobytes */ 28984ab085aSmws 29084ab085aSmws typedef struct smb_memdevmap { 29184ab085aSmws smb_header_t smbdmap_hdr; /* structure header */ 29284ab085aSmws uint32_t smbdmap_start; /* starting address in kilobytes */ 29384ab085aSmws uint32_t smbdmap_end; /* ending address in kilobytes */ 29484ab085aSmws uint16_t smbdmap_device; /* memory device handle */ 29584ab085aSmws uint16_t smbdmap_array; /* memory array mapped address handle */ 29684ab085aSmws uint8_t smbdmap_rpos; /* row position */ 29784ab085aSmws uint8_t smbdmap_ipos; /* interleave position */ 29884ab085aSmws uint8_t smbdmap_idepth; /* interleave depth */ 2994e901881SDale Ghent uint64_t smbdmap_extstart; /* extended starting address */ 3004e901881SDale Ghent uint64_t smbdmap_extend; /* extended ending address */ 30184ab085aSmws } smb_memdevmap_t; 30284ab085aSmws 30384ab085aSmws typedef struct smb_battery { 30484ab085aSmws smb_header_t smbbat_hdr; /* structure header */ 30584ab085aSmws uint8_t smbbat_loc; /* location */ 30684ab085aSmws uint8_t smbbat_manufacturer; /* manufacturer */ 30784ab085aSmws uint8_t smbbat_date; /* manufacture date */ 30884ab085aSmws uint8_t smbbat_serial; /* serial number */ 30984ab085aSmws uint8_t smbbat_devname; /* device name */ 31084ab085aSmws uint8_t smbbat_chem; /* device chemistry */ 31184ab085aSmws uint16_t smbbat_cap; /* design capacity in mW hours */ 31284ab085aSmws uint16_t smbbat_volt; /* design voltage in mV */ 31384ab085aSmws uint8_t smbbat_version; /* SBDS version string */ 31484ab085aSmws uint8_t smbbat_err; /* error percentage */ 31584ab085aSmws uint16_t smbbat_ssn; /* SBDS serial number */ 31684ab085aSmws uint16_t smbbat_sdate; /* SBDS manufacture date */ 31784ab085aSmws uint8_t smbbat_schem; /* SBDS chemistry string */ 31884ab085aSmws uint8_t smbbat_mult; /* design capacity multiplier */ 31984ab085aSmws uint32_t smbbat_oemdata; /* OEM-specific data */ 32084ab085aSmws } smb_battery_t; 32184ab085aSmws 32284ab085aSmws typedef struct smb_hwsec { 32384ab085aSmws smb_header_t smbhs_hdr; /* structure header */ 32484ab085aSmws uint8_t smbhs_settings; /* settings byte */ 32584ab085aSmws } smb_hwsec_t; 32684ab085aSmws 32784ab085aSmws #define SMB_HWS_PWR_PS(x) (((x) & 0xC0) >> 6) 32884ab085aSmws #define SMB_HWS_KBD_PS(x) (((x) & 0x30) >> 4) 32984ab085aSmws #define SMB_HWS_ADM_PS(x) (((x) & 0x0C) >> 2) 33084ab085aSmws #define SMB_HWS_PAN_PS(x) (((x) & 0x03) >> 0) 33184ab085aSmws 33284ab085aSmws typedef struct smb_boot { 33384ab085aSmws smb_header_t smbbo_hdr; /* structure header */ 33484ab085aSmws uint8_t smbbo_pad[6]; /* reserved for future use */ 33584ab085aSmws uint8_t smbbo_status[1]; /* variable-length status buffer */ 33684ab085aSmws } smb_boot_t; 33784ab085aSmws 33884ab085aSmws typedef struct smb_ipmi { 33984ab085aSmws smb_header_t smbipm_hdr; /* structure header */ 34084ab085aSmws uint8_t smbipm_type; /* interface type */ 34184ab085aSmws uint8_t smbipm_spec; /* specification revision */ 34284ab085aSmws uint8_t smbipm_i2c; /* i2C slave address */ 34384ab085aSmws uint8_t smbipm_bus; /* NV storage device bus ID */ 34484ab085aSmws uint64_t smbipm_addr; /* base address */ 34584ab085aSmws uint8_t smbipm_info; /* base address modifier/intr info */ 34684ab085aSmws uint8_t smbipm_intr; /* interrupt number */ 34784ab085aSmws } smb_ipmi_t; 34884ab085aSmws 34984ab085aSmws #define SMB_IPM_SPEC_MAJOR(x) (((x) & 0xF0) >> 4) 35084ab085aSmws #define SMB_IPM_SPEC_MINOR(x) ((x) & 0x0F) 35184ab085aSmws 35284ab085aSmws #define SMB_IPM_ADDR_IO 1ULL 35384ab085aSmws 35484ab085aSmws #define SMB_IPM_INFO_REGS(x) (((x) & 0xC0) >> 6) 35584ab085aSmws #define SMB_IPM_INFO_LSB(x) (((x) & 0x10) >> 4) 35684ab085aSmws #define SMB_IPM_INFO_ISPEC(x) (((x) & 0x08) >> 3) 35784ab085aSmws #define SMB_IPM_INFO_IPOL(x) (((x) & 0x02) >> 1) 35884ab085aSmws #define SMB_IPM_INFO_IMODE(x) (((x) & 0x01) >> 0) 35984ab085aSmws 36084ab085aSmws #define SMB_IPM_REGS_1B 0 36184ab085aSmws #define SMB_IPM_REGS_4B 1 36284ab085aSmws #define SMB_IPM_REGS_16B 2 36384ab085aSmws 36484ab085aSmws #define SMB_IPM_IPOL_LO 0 36584ab085aSmws #define SMB_IPM_IPOL_HI 1 36684ab085aSmws 36784ab085aSmws #define SMB_IPM_IMODE_EDGE 0 36884ab085aSmws #define SMB_IPM_IMODE_LEVEL 1 36984ab085aSmws 37084ab085aSmws typedef struct smb_powersup { 37184ab085aSmws smb_header_t smbpsup_hdr; /* structure header */ 37284ab085aSmws uint8_t smbpsup_group; /* group id */ 37384ab085aSmws uint8_t smbpsup_loc; /* location tag */ 37484ab085aSmws uint8_t smbpsup_devname; /* device name */ 37584ab085aSmws uint8_t smbpsup_manufacturer; /* manufacturer */ 37684ab085aSmws uint8_t smbpsup_serial; /* serial number */ 37784ab085aSmws uint8_t smbpsup_asset; /* asset tag */ 37884ab085aSmws uint8_t smbpsup_part; /* part number */ 37984ab085aSmws uint8_t smbpsup_rev; /* revision string */ 38084ab085aSmws uint16_t smbpsup_max; /* max output in milliwatts */ 38184ab085aSmws uint16_t smbpsup_char; /* characteristics */ 38284ab085aSmws uint16_t smbpsup_vprobe; /* voltage probe handle */ 38384ab085aSmws uint16_t smbpsup_cooldev; /* cooling device handle */ 38484ab085aSmws uint16_t smbpsup_iprobe; /* current probe handle */ 38584ab085aSmws } smb_powersup_t; 38684ab085aSmws 38703f9f63dSTom Pothier typedef struct smb_obdev_ext { 38803f9f63dSTom Pothier smb_header_t smbobe_hdr; /* structure header */ 38903f9f63dSTom Pothier uint8_t smbobe_name; /* reference designation */ 39003f9f63dSTom Pothier uint8_t smbobe_dtype; /* device type */ 39103f9f63dSTom Pothier uint8_t smbobe_dti; /* device type instance */ 39203f9f63dSTom Pothier uint16_t smbobe_sg; /* segment group number */ 39303f9f63dSTom Pothier uint8_t smbobe_bus; /* bus number */ 39403f9f63dSTom Pothier uint8_t smbobe_df; /* device/function number */ 39503f9f63dSTom Pothier } smb_obdev_ext_t; 39603f9f63dSTom Pothier 397074bb90dSTom Pothier typedef struct smb_processor_ext { 398074bb90dSTom Pothier smb_header_t smbpre_hdr; /* structure header */ 399074bb90dSTom Pothier uint16_t smbpre_processor; /* processor handle */ 400074bb90dSTom Pothier uint8_t smbpre_fru; /* FRU indicator */ 401074bb90dSTom Pothier uint8_t smbpre_n; /* number of APIC IDs */ 402074bb90dSTom Pothier uint16_t smbpre_apicid[1]; /* strand initial apic id */ 403074bb90dSTom Pothier } smb_processor_ext_t; 404074bb90dSTom Pothier 40503f9f63dSTom Pothier typedef struct smb_port_ext { 40603f9f63dSTom Pothier smb_header_t smbpoe_hdr; /* structure header */ 40703f9f63dSTom Pothier uint16_t smbpoe_chassis; /* chassis handle */ 40803f9f63dSTom Pothier uint16_t smbpoe_port; /* port connector handle */ 40903f9f63dSTom Pothier uint8_t smbpoe_dtype; /* device type */ 41003f9f63dSTom Pothier uint16_t smbpoe_devhdl; /* device handle */ 41103f9f63dSTom Pothier uint8_t smbpoe_phy; /* PHY number */ 41203f9f63dSTom Pothier } smb_port_ext_t; 41303f9f63dSTom Pothier 414074bb90dSTom Pothier typedef struct smb_pciexrc { 415074bb90dSTom Pothier smb_header_t smbpciexrc_hdr; /* structure header */ 416074bb90dSTom Pothier uint16_t smbpciexrc_bboard; /* base board handle */ 417074bb90dSTom Pothier uint16_t smbpciexrc_bdf; /* PCI Bus/Dev/Func */ 418074bb90dSTom Pothier } smb_pciexrc_t; 419074bb90dSTom Pothier 420074bb90dSTom Pothier typedef struct smb_memarray_ext { 421074bb90dSTom Pothier smb_header_t smbmarre_hdr; /* structure header */ 422074bb90dSTom Pothier uint16_t smbmarre_ma; /* memory array handle */ 423074bb90dSTom Pothier uint16_t smbmarre_component; /* component parent handle */ 424074bb90dSTom Pothier uint16_t smbmarre_bdf; /* PCI bus/dev/funct */ 425074bb90dSTom Pothier } smb_memarray_ext_t; 426074bb90dSTom Pothier 427074bb90dSTom Pothier typedef struct smb_memdevice_ext { 428074bb90dSTom Pothier smb_header_t smbmdeve_hdr; /* structure header */ 429074bb90dSTom Pothier uint16_t smbmdeve_mdev; /* memory device handle */ 430074bb90dSTom Pothier uint8_t smbmdeve_dchan; /* DRAM channel */ 431074bb90dSTom Pothier uint8_t smbmdeve_ncs; /* number of chip select */ 432074bb90dSTom Pothier uint8_t smbmdeve_cs[1]; /* chip selects */ 433074bb90dSTom Pothier } smb_memdevice_ext_t; 434074bb90dSTom Pothier 43584ab085aSmws #pragma pack() 43684ab085aSmws 43784ab085aSmws typedef struct smb_struct { 43884ab085aSmws const smb_header_t *smbst_hdr; /* address of raw structure data */ 43984ab085aSmws const uchar_t *smbst_str; /* address of string data (if any) */ 44084ab085aSmws const uchar_t *smbst_end; /* address of 0x0000 ending tag */ 44184ab085aSmws struct smb_struct *smbst_next; /* next structure in hash chain */ 44284ab085aSmws uint16_t *smbst_strtab; /* string index -> offset table */ 44384ab085aSmws uint_t smbst_strtablen; /* length of smbst_strtab */ 44484ab085aSmws } smb_struct_t; 44584ab085aSmws 44684ab085aSmws struct smbios_hdl { 44784ab085aSmws smbios_entry_t sh_ent; /* structure table entry point */ 44884ab085aSmws const void *sh_buf; /* structure table buffer */ 44984ab085aSmws size_t sh_buflen; /* size of structure table buffer */ 45084ab085aSmws smb_struct_t *sh_structs; /* array of structure descriptors */ 45184ab085aSmws uint_t sh_nstructs; /* number of active structures */ 45284ab085aSmws smb_struct_t **sh_hash; /* hash bucket array for descriptors */ 45384ab085aSmws uint_t sh_hashlen; /* hash bucket array length */ 45484ab085aSmws int sh_err; /* error code for smbios_errno() */ 45584ab085aSmws int sh_libvers; /* library client abi version */ 45684ab085aSmws int sh_smbvers; /* derived underlying format version */ 45784ab085aSmws uint_t sh_flags; /* miscellaneous flags (see below) */ 45884ab085aSmws }; 45984ab085aSmws 46084ab085aSmws #define SMB_FL_DEBUG 0x1 /* print debug messages for this hdl */ 46184ab085aSmws #define SMB_FL_BUFALLOC 0x2 /* sh_buf was allocated by library */ 462*516627f3SJonathan Matthew #define SMB_FL_TRUNC 0x4 /* smbios table is truncated */ 46384ab085aSmws 46484ab085aSmws #define SMB_BIOS_DEVICE "/dev/xsvc" /* device w/ BIOS physmem */ 46584ab085aSmws #define SMB_SMBIOS_DEVICE "/dev/smbios" /* device w/ SMBIOS image */ 46684ab085aSmws 46784ab085aSmws #define SMB_RANGE_START 0xF0000 /* start of physical address range */ 46884ab085aSmws #define SMB_RANGE_LIMIT 0xFFFFF /* limit of physical address range */ 46984ab085aSmws 47084ab085aSmws #define SMB_MAJMIN(M, m) ((((M) & 0xFF) << 16) | ((m) & 0xFF)) 47184ab085aSmws #define SMB_MAJOR(v) (((v) & 0xFF00) >> 8) 47284ab085aSmws #define SMB_MINOR(v) (((v) & 0x00FF)) 47384ab085aSmws 47484ab085aSmws #define ESMB_BASE 1000 /* base value for libsmbios errnos */ 47584ab085aSmws 47684ab085aSmws enum { 47784ab085aSmws ESMB_NOTFOUND = ESMB_BASE, /* SMBIOS table not found on system */ 47884ab085aSmws ESMB_MAPDEV, /* failed to map SMBIOS table */ 47984ab085aSmws ESMB_NOENT, /* failed to locate structure */ 48084ab085aSmws ESMB_NOMEM, /* failed to allocate memory */ 48184ab085aSmws ESMB_NOHDR, /* failed to read SMBIOS header */ 48284ab085aSmws ESMB_NOSTAB, /* failed to read SMBIOS struct table */ 48384ab085aSmws ESMB_NOINFO, /* no common info for structure */ 48484ab085aSmws ESMB_SHORT, /* buffer length doesn't match header */ 48584ab085aSmws ESMB_CORRUPT, /* buffer struct or len is corrupt */ 48684ab085aSmws ESMB_VERSION, /* version not supported by library */ 48784ab085aSmws ESMB_NOTSUP, /* feature not supported by provider */ 48884ab085aSmws ESMB_HEADER, /* SMBIOS header corrupt or invalid */ 48984ab085aSmws ESMB_OLD, /* SMBIOS version is too old for us */ 49084ab085aSmws ESMB_NEW, /* SMBIOS version is too new for us */ 49184ab085aSmws ESMB_CKSUM, /* SMBIOS header checksum mismatch */ 49284ab085aSmws ESMB_INVAL, /* invalid function call argument */ 49384ab085aSmws ESMB_TYPE, /* structure type mismatch */ 49484ab085aSmws ESMB_UNKNOWN /* unknown error (maximum value tag) */ 49584ab085aSmws }; 49684ab085aSmws 49784ab085aSmws extern const smb_struct_t *smb_lookup_type(smbios_hdl_t *, uint_t); 49884ab085aSmws extern const smb_struct_t *smb_lookup_id(smbios_hdl_t *, uint_t); 49984ab085aSmws extern const char *smb_strptr(const smb_struct_t *, uint_t); 50084ab085aSmws extern int smb_gteq(smbios_hdl_t *, int); 50184ab085aSmws 50284ab085aSmws extern int smb_set_errno(smbios_hdl_t *, int); 50384ab085aSmws extern smbios_hdl_t *smb_open_error(smbios_hdl_t *, int *, int); 50484ab085aSmws extern const char *smb_strerror(int); 50584ab085aSmws 50684ab085aSmws extern void *smb_alloc(size_t); 50784ab085aSmws extern void *smb_zalloc(size_t); 50884ab085aSmws extern void smb_free(void *, size_t); 50984ab085aSmws 51084ab085aSmws extern void smb_dprintf(smbios_hdl_t *, const char *, ...); 51184ab085aSmws 51284ab085aSmws extern int _smb_debug; 51384ab085aSmws 5146734c4b0SRobert Mustacchi /* 5156734c4b0SRobert Mustacchi * The following series of structures represent the base versions of public 5166734c4b0SRobert Mustacchi * structures that are used inside by the smbios routines. This allows the 5176734c4b0SRobert Mustacchi * common code to properly know how much it should or should not bzero and how 5186734c4b0SRobert Mustacchi * to handle additions to the spec. Types should only be added here if we need 5196734c4b0SRobert Mustacchi * to extend the public structures in sys/smbios.h due to a change in the spec. 5206734c4b0SRobert Mustacchi * 5216734c4b0SRobert Mustacchi * Types here have the name smb_base_%s which corresponds to smbios_%s. 5226734c4b0SRobert Mustacchi */ 5236734c4b0SRobert Mustacchi typedef struct smb_base_chassis { 5246734c4b0SRobert Mustacchi uint32_t smbbc_oemdata; /* OEM-specific data */ 5256734c4b0SRobert Mustacchi uint8_t smbbc_lock; /* lock present? */ 5266734c4b0SRobert Mustacchi uint8_t smbbc_type; /* type */ 5276734c4b0SRobert Mustacchi uint8_t smbbc_bustate; /* boot-up state */ 5286734c4b0SRobert Mustacchi uint8_t smbbc_psstate; /* power supply state */ 5296734c4b0SRobert Mustacchi uint8_t smbbc_thstate; /* thermal state */ 5306734c4b0SRobert Mustacchi uint8_t smbbc_security; /* security status */ 5316734c4b0SRobert Mustacchi uint8_t smbbc_uheight; /* enclosure height in U's */ 5326734c4b0SRobert Mustacchi uint8_t smbbc_cords; /* number of power cords */ 5336734c4b0SRobert Mustacchi uint8_t smbbc_elems; /* number of element records (n) */ 5346734c4b0SRobert Mustacchi uint8_t smbbc_elemlen; /* length of contained element (m) */ 5356734c4b0SRobert Mustacchi } smb_base_chassis_t; 5366734c4b0SRobert Mustacchi 5376734c4b0SRobert Mustacchi typedef struct smb_base_processor { 5386734c4b0SRobert Mustacchi uint64_t smbbp_cpuid; /* processor cpuid information */ 5396734c4b0SRobert Mustacchi uint32_t smbbp_family; /* processor family */ 5406734c4b0SRobert Mustacchi uint8_t smbbp_type; /* processor type (SMB_PRT_*) */ 5416734c4b0SRobert Mustacchi uint8_t smbbp_voltage; /* voltage (SMB_PRV_*) */ 5426734c4b0SRobert Mustacchi uint8_t smbbp_status; /* status (SMB_PRS_*) */ 5436734c4b0SRobert Mustacchi uint8_t smbbp_upgrade; /* upgrade (SMB_PRU_*) */ 5446734c4b0SRobert Mustacchi uint32_t smbbp_clkspeed; /* external clock speed in MHz */ 5456734c4b0SRobert Mustacchi uint32_t smbbp_maxspeed; /* maximum speed in MHz */ 5466734c4b0SRobert Mustacchi uint32_t smbbp_curspeed; /* current speed in MHz */ 5476734c4b0SRobert Mustacchi id_t smbbp_l1cache; /* L1 cache handle */ 5486734c4b0SRobert Mustacchi id_t smbbp_l2cache; /* L2 cache handle */ 5496734c4b0SRobert Mustacchi id_t smbbp_l3cache; /* L3 cache handle */ 5506734c4b0SRobert Mustacchi } smb_base_processor_t; 5516734c4b0SRobert Mustacchi 5526734c4b0SRobert Mustacchi typedef struct smb_base_memdevice { 5536734c4b0SRobert Mustacchi id_t smbbmd_array; /* handle of physical memory array */ 5546734c4b0SRobert Mustacchi id_t smbbmd_error; /* handle of memory error data */ 5556734c4b0SRobert Mustacchi uint32_t smbbmd_twidth; /* total width in bits including ecc */ 5566734c4b0SRobert Mustacchi uint32_t smbbmd_dwidth; /* data width in bits */ 5576734c4b0SRobert Mustacchi uint64_t smbbmd_size; /* size in bytes (see note above) */ 5586734c4b0SRobert Mustacchi uint8_t smbbmd_form; /* form factor */ 5596734c4b0SRobert Mustacchi uint8_t smbbmd_set; /* set (0x00=none, 0xFF=unknown) */ 5606734c4b0SRobert Mustacchi uint8_t smbbmd_type; /* memory type */ 5616734c4b0SRobert Mustacchi uint8_t smbbmd_pad; /* padding */ 5626734c4b0SRobert Mustacchi uint32_t smbbmd_flags; /* flags (see below) */ 5636734c4b0SRobert Mustacchi uint32_t smbbmd_speed; /* speed in MHz */ 5646734c4b0SRobert Mustacchi const char *smbbmd_dloc; /* physical device locator string */ 5656734c4b0SRobert Mustacchi const char *smbbmd_bloc; /* physical bank locator string */ 5666734c4b0SRobert Mustacchi uint8_t smbbmd_rank; /* rank */ 5676734c4b0SRobert Mustacchi } smb_base_memdevice_t; 5686734c4b0SRobert Mustacchi 5696734c4b0SRobert Mustacchi 57084ab085aSmws #ifdef __cplusplus 57184ab085aSmws } 57284ab085aSmws #endif 57384ab085aSmws 57484ab085aSmws #endif /* _SYS_SMBIOS_IMPL_H */ 575