1*e4b86885SCheng Sean Ye /*
2*e4b86885SCheng Sean Ye  * CDDL HEADER START
3*e4b86885SCheng Sean Ye  *
4*e4b86885SCheng Sean Ye  * The contents of this file are subject to the terms of the
5*e4b86885SCheng Sean Ye  * Common Development and Distribution License (the "License").
6*e4b86885SCheng Sean Ye  * You may not use this file except in compliance with the License.
7*e4b86885SCheng Sean Ye  *
8*e4b86885SCheng Sean Ye  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*e4b86885SCheng Sean Ye  * or http://www.opensolaris.org/os/licensing.
10*e4b86885SCheng Sean Ye  * See the License for the specific language governing permissions
11*e4b86885SCheng Sean Ye  * and limitations under the License.
12*e4b86885SCheng Sean Ye  *
13*e4b86885SCheng Sean Ye  * When distributing Covered Code, include this CDDL HEADER in each
14*e4b86885SCheng Sean Ye  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*e4b86885SCheng Sean Ye  * If applicable, add the following below this CDDL HEADER, with the
16*e4b86885SCheng Sean Ye  * fields enclosed by brackets "[]" replaced with your own identifying
17*e4b86885SCheng Sean Ye  * information: Portions Copyright [yyyy] [name of copyright owner]
18*e4b86885SCheng Sean Ye  *
19*e4b86885SCheng Sean Ye  * CDDL HEADER END
20*e4b86885SCheng Sean Ye  */
21*e4b86885SCheng Sean Ye 
22*e4b86885SCheng Sean Ye /*
23*e4b86885SCheng Sean Ye  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
24*e4b86885SCheng Sean Ye  * Use is subject to license terms.
25*e4b86885SCheng Sean Ye  */
26*e4b86885SCheng Sean Ye 
27*e4b86885SCheng Sean Ye #ifndef _MCAMD_DIMMCFG_IMPL_H
28*e4b86885SCheng Sean Ye #define	_MCAMD_DIMMCFG_IMPL_H
29*e4b86885SCheng Sean Ye 
30*e4b86885SCheng Sean Ye #include <sys/types.h>
31*e4b86885SCheng Sean Ye #include <sys/x86_archext.h>
32*e4b86885SCheng Sean Ye #include <sys/mc_amd.h>
33*e4b86885SCheng Sean Ye #include <mcamd_dimmcfg.h>
34*e4b86885SCheng Sean Ye 
35*e4b86885SCheng Sean Ye #ifdef __cplusplus
36*e4b86885SCheng Sean Ye extern "C" {
37*e4b86885SCheng Sean Ye #endif
38*e4b86885SCheng Sean Ye 
39*e4b86885SCheng Sean Ye /*
40*e4b86885SCheng Sean Ye  * Defines for csl_chan
41*e4b86885SCheng Sean Ye  */
42*e4b86885SCheng Sean Ye #define	CH_A	0
43*e4b86885SCheng Sean Ye #define	CH_B	1
44*e4b86885SCheng Sean Ye 
45*e4b86885SCheng Sean Ye /*
46*e4b86885SCheng Sean Ye  * Line structure for the tables.  We include up to 2 chip-selects per
47*e4b86885SCheng Sean Ye  * line - the consumer must use the first in 64-bit mode and both in
48*e4b86885SCheng Sean Ye  * 128-bit mode.
49*e4b86885SCheng Sean Ye  */
50*e4b86885SCheng Sean Ye struct mcdcfg_csmapline {
51*e4b86885SCheng Sean Ye 	uint32_t csm_pkg;	/* applicable package types */
52*e4b86885SCheng Sean Ye 	uint8_t	csm_basereg;	/* csbase register number; implies mask */
53*e4b86885SCheng Sean Ye 	uint8_t csm_dimmcfg;	/* bitmask of DIMM_{N,R4,S4} which apply */
54*e4b86885SCheng Sean Ye 	uint8_t	csm_ldimm;	/* Logical DIMM number */
55*e4b86885SCheng Sean Ye 	const struct mcdcfg_csl csm_cs[MC_CHIP_DIMMPERCS];
56*e4b86885SCheng Sean Ye };
57*e4b86885SCheng Sean Ye 
58*e4b86885SCheng Sean Ye /*
59*e4b86885SCheng Sean Ye  * Defines for use with csm_pkg - pre-NPT packages
60*e4b86885SCheng Sean Ye  */
61*e4b86885SCheng Sean Ye #define	SKT_754		X86_SOCKET_754
62*e4b86885SCheng Sean Ye #define	SKT_939		X86_SOCKET_939
63*e4b86885SCheng Sean Ye #define	SKT_940		X86_SOCKET_940
64*e4b86885SCheng Sean Ye #define	SKT_ALL		(X86_SOCKET_754 | X86_SOCKET_939 | X86_SOCKET_940)
65*e4b86885SCheng Sean Ye 
66*e4b86885SCheng Sean Ye /*
67*e4b86885SCheng Sean Ye  * Defines for use with csm_pkg - NPT packages
68*e4b86885SCheng Sean Ye  */
69*e4b86885SCheng Sean Ye #define	F1207		X86_SOCKET_F1207
70*e4b86885SCheng Sean Ye #define	AM2		X86_SOCKET_AM2
71*e4b86885SCheng Sean Ye #define	S1g1		X86_SOCKET_S1g1
72*e4b86885SCheng Sean Ye #define	SKT_NPT		(X86_SOCKET_S1g1 | X86_SOCKET_AM2 | X86_SOCKET_F1207)
73*e4b86885SCheng Sean Ye #define	AM2F1207	(X86_SOCKET_AM2 | X86_SOCKET_F1207)
74*e4b86885SCheng Sean Ye #define	AM2S1g1		(X86_SOCKET_AM2 | X86_SOCKET_S1g1)
75*e4b86885SCheng Sean Ye 
76*e4b86885SCheng Sean Ye /*
77*e4b86885SCheng Sean Ye  * Defines for use with csm_dimmcfg
78*e4b86885SCheng Sean Ye  */
79*e4b86885SCheng Sean Ye #define	DCFG_N		0x1	/* Normal */
80*e4b86885SCheng Sean Ye #define	DCFG_R4		0x2	/* Four-rank registered DIMM */
81*e4b86885SCheng Sean Ye #define	DCFG_S4		0x4	/* four-rank SO-DIMM (NPT only) */
82*e4b86885SCheng Sean Ye #define	DCFG_ALL	(DCFG_N | DCFG_R4)
83*e4b86885SCheng Sean Ye #define	DCFG_ALLNPT	(DCFG_N | DCFG_R4 | DCFG_S4)
84*e4b86885SCheng Sean Ye 
85*e4b86885SCheng Sean Ye #ifdef __cplusplus
86*e4b86885SCheng Sean Ye }
87*e4b86885SCheng Sean Ye #endif
88*e4b86885SCheng Sean Ye 
89*e4b86885SCheng Sean Ye #endif /* _MCAMD_DIMMCFG_IMPL_H */
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