17c8c0b82SPatrick Mooney /*- 2*32640292SAndy Fiddaman * SPDX-License-Identifier: BSD-2-Clause 37c8c0b82SPatrick Mooney * 47c8c0b82SPatrick Mooney * Copyright (c) 2013 Neel Natu <neel@freebsd.org> 57c8c0b82SPatrick Mooney * All rights reserved. 67c8c0b82SPatrick Mooney * 77c8c0b82SPatrick Mooney * Redistribution and use in source and binary forms, with or without 87c8c0b82SPatrick Mooney * modification, are permitted provided that the following conditions 97c8c0b82SPatrick Mooney * are met: 107c8c0b82SPatrick Mooney * 1. Redistributions of source code must retain the above copyright 117c8c0b82SPatrick Mooney * notice, this list of conditions and the following disclaimer. 127c8c0b82SPatrick Mooney * 2. Redistributions in binary form must reproduce the above copyright 137c8c0b82SPatrick Mooney * notice, this list of conditions and the following disclaimer in the 147c8c0b82SPatrick Mooney * documentation and/or other materials provided with the distribution. 157c8c0b82SPatrick Mooney * 167c8c0b82SPatrick Mooney * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 177c8c0b82SPatrick Mooney * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 187c8c0b82SPatrick Mooney * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 197c8c0b82SPatrick Mooney * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 207c8c0b82SPatrick Mooney * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 217c8c0b82SPatrick Mooney * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 227c8c0b82SPatrick Mooney * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 237c8c0b82SPatrick Mooney * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 247c8c0b82SPatrick Mooney * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 257c8c0b82SPatrick Mooney * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 267c8c0b82SPatrick Mooney * SUCH DAMAGE. 277c8c0b82SPatrick Mooney */ 287c8c0b82SPatrick Mooney /* 297c8c0b82SPatrick Mooney * This file and its contents are supplied under the terms of the 307c8c0b82SPatrick Mooney * Common Development and Distribution License ("CDDL"), version 1.0. 317c8c0b82SPatrick Mooney * You may only use this file in accordance with the terms of version 327c8c0b82SPatrick Mooney * 1.0 of the CDDL. 337c8c0b82SPatrick Mooney * 347c8c0b82SPatrick Mooney * A full copy of the text of the CDDL should have accompanied this 357c8c0b82SPatrick Mooney * source. A copy of the CDDL is also available via the Internet at 367c8c0b82SPatrick Mooney * http://www.illumos.org/license/CDDL. 377c8c0b82SPatrick Mooney * 3862ac5a8aSPatrick Mooney * Copyright 2023 Oxide Computer Company 397c8c0b82SPatrick Mooney */ 407c8c0b82SPatrick Mooney 417c8c0b82SPatrick Mooney #ifndef _VLAPIC_PRIV_H_ 427c8c0b82SPatrick Mooney #define _VLAPIC_PRIV_H_ 437c8c0b82SPatrick Mooney 447c8c0b82SPatrick Mooney #include <x86/apicreg.h> 457c8c0b82SPatrick Mooney 467c8c0b82SPatrick Mooney /* 477c8c0b82SPatrick Mooney * APIC Register: Offset Description 487c8c0b82SPatrick Mooney */ 497c8c0b82SPatrick Mooney #define APIC_OFFSET_ID 0x20 /* Local APIC ID */ 507c8c0b82SPatrick Mooney #define APIC_OFFSET_VER 0x30 /* Local APIC Version */ 517c8c0b82SPatrick Mooney #define APIC_OFFSET_TPR 0x80 /* Task Priority Register */ 527c8c0b82SPatrick Mooney #define APIC_OFFSET_APR 0x90 /* Arbitration Priority */ 537c8c0b82SPatrick Mooney #define APIC_OFFSET_PPR 0xA0 /* Processor Priority Register */ 547c8c0b82SPatrick Mooney #define APIC_OFFSET_EOI 0xB0 /* EOI Register */ 557c8c0b82SPatrick Mooney #define APIC_OFFSET_RRR 0xC0 /* Remote read */ 567c8c0b82SPatrick Mooney #define APIC_OFFSET_LDR 0xD0 /* Logical Destination */ 577c8c0b82SPatrick Mooney #define APIC_OFFSET_DFR 0xE0 /* Destination Format Register */ 587c8c0b82SPatrick Mooney #define APIC_OFFSET_SVR 0xF0 /* Spurious Vector Register */ 597c8c0b82SPatrick Mooney #define APIC_OFFSET_ISR0 0x100 /* In Service Register */ 607c8c0b82SPatrick Mooney #define APIC_OFFSET_ISR1 0x110 617c8c0b82SPatrick Mooney #define APIC_OFFSET_ISR2 0x120 627c8c0b82SPatrick Mooney #define APIC_OFFSET_ISR3 0x130 637c8c0b82SPatrick Mooney #define APIC_OFFSET_ISR4 0x140 647c8c0b82SPatrick Mooney #define APIC_OFFSET_ISR5 0x150 657c8c0b82SPatrick Mooney #define APIC_OFFSET_ISR6 0x160 667c8c0b82SPatrick Mooney #define APIC_OFFSET_ISR7 0x170 677c8c0b82SPatrick Mooney #define APIC_OFFSET_TMR0 0x180 /* Trigger Mode Register */ 687c8c0b82SPatrick Mooney #define APIC_OFFSET_TMR1 0x190 697c8c0b82SPatrick Mooney #define APIC_OFFSET_TMR2 0x1A0 707c8c0b82SPatrick Mooney #define APIC_OFFSET_TMR3 0x1B0 717c8c0b82SPatrick Mooney #define APIC_OFFSET_TMR4 0x1C0 727c8c0b82SPatrick Mooney #define APIC_OFFSET_TMR5 0x1D0 737c8c0b82SPatrick Mooney #define APIC_OFFSET_TMR6 0x1E0 747c8c0b82SPatrick Mooney #define APIC_OFFSET_TMR7 0x1F0 757c8c0b82SPatrick Mooney #define APIC_OFFSET_IRR0 0x200 /* Interrupt Request Register */ 767c8c0b82SPatrick Mooney #define APIC_OFFSET_IRR1 0x210 777c8c0b82SPatrick Mooney #define APIC_OFFSET_IRR2 0x220 787c8c0b82SPatrick Mooney #define APIC_OFFSET_IRR3 0x230 797c8c0b82SPatrick Mooney #define APIC_OFFSET_IRR4 0x240 807c8c0b82SPatrick Mooney #define APIC_OFFSET_IRR5 0x250 817c8c0b82SPatrick Mooney #define APIC_OFFSET_IRR6 0x260 827c8c0b82SPatrick Mooney #define APIC_OFFSET_IRR7 0x270 837c8c0b82SPatrick Mooney #define APIC_OFFSET_ESR 0x280 /* Error Status Register */ 847c8c0b82SPatrick Mooney #define APIC_OFFSET_CMCI_LVT 0x2F0 /* Local Vector Table (CMCI) */ 857c8c0b82SPatrick Mooney #define APIC_OFFSET_ICR_LOW 0x300 /* Interrupt Command Register */ 867c8c0b82SPatrick Mooney #define APIC_OFFSET_ICR_HI 0x310 877c8c0b82SPatrick Mooney #define APIC_OFFSET_TIMER_LVT 0x320 /* Local Vector Table (Timer) */ 887c8c0b82SPatrick Mooney #define APIC_OFFSET_THERM_LVT 0x330 /* Local Vector Table (Thermal) */ 897c8c0b82SPatrick Mooney #define APIC_OFFSET_PERF_LVT 0x340 /* Local Vector Table (PMC) */ 907c8c0b82SPatrick Mooney #define APIC_OFFSET_LINT0_LVT 0x350 /* Local Vector Table (LINT0) */ 917c8c0b82SPatrick Mooney #define APIC_OFFSET_LINT1_LVT 0x360 /* Local Vector Table (LINT1) */ 927c8c0b82SPatrick Mooney #define APIC_OFFSET_ERROR_LVT 0x370 /* Local Vector Table (ERROR) */ 937c8c0b82SPatrick Mooney #define APIC_OFFSET_TIMER_ICR 0x380 /* Timer's Initial Count */ 947c8c0b82SPatrick Mooney #define APIC_OFFSET_TIMER_CCR 0x390 /* Timer's Current Count */ 957c8c0b82SPatrick Mooney #define APIC_OFFSET_TIMER_DCR 0x3E0 /* Timer's Divide Configuration */ 967c8c0b82SPatrick Mooney #define APIC_OFFSET_SELF_IPI 0x3F0 /* Self IPI register */ 977c8c0b82SPatrick Mooney 987c8c0b82SPatrick Mooney /* 997c8c0b82SPatrick Mooney * 16 priority levels with at most one vector injected per level. 1007c8c0b82SPatrick Mooney */ 1017c8c0b82SPatrick Mooney #define ISRVEC_STK_SIZE (16 + 1) 1027c8c0b82SPatrick Mooney 1037c8c0b82SPatrick Mooney #define VLAPIC_MAXLVT_INDEX APIC_LVT_CMCI 1047c8c0b82SPatrick Mooney 1057c8c0b82SPatrick Mooney #define VLAPIC_TMR_CNT 8 1067c8c0b82SPatrick Mooney 1077c8c0b82SPatrick Mooney struct vlapic; 1087c8c0b82SPatrick Mooney 1097c8c0b82SPatrick Mooney struct vlapic_ops { 1107c8c0b82SPatrick Mooney vcpu_notify_t (*set_intr_ready)(struct vlapic *vlapic, int vector, 1117c8c0b82SPatrick Mooney bool level); 1127c8c0b82SPatrick Mooney void (*sync_state)(struct vlapic *vlapic); 1137c8c0b82SPatrick Mooney void (*intr_accepted)(struct vlapic *vlapic, int vector); 1147c8c0b82SPatrick Mooney void (*post_intr)(struct vlapic *vlapic, int hostcpu); 1157c8c0b82SPatrick Mooney void (*enable_x2apic_mode)(struct vlapic *vlapic); 1167c8c0b82SPatrick Mooney }; 1177c8c0b82SPatrick Mooney 11862ac5a8aSPatrick Mooney struct vlapic_stats { 11962ac5a8aSPatrick Mooney /* Result of a CCR read was clamped due to being > ICR */ 12062ac5a8aSPatrick Mooney uint64_t vs_clamp_ccr; 12162ac5a8aSPatrick Mooney /* Imported timer expiration further in future than ICR equiv */ 12262ac5a8aSPatrick Mooney uint64_t vs_import_timer_overage; 12362ac5a8aSPatrick Mooney }; 12462ac5a8aSPatrick Mooney 1257c8c0b82SPatrick Mooney struct vlapic { 1267c8c0b82SPatrick Mooney struct vm *vm; 1277c8c0b82SPatrick Mooney int vcpuid; 1287c8c0b82SPatrick Mooney struct LAPIC *apic_page; 1297c8c0b82SPatrick Mooney struct vlapic_ops ops; 1307c8c0b82SPatrick Mooney 1317c8c0b82SPatrick Mooney uint32_t esr_pending; 1327c8c0b82SPatrick Mooney 1337c8c0b82SPatrick Mooney struct callout callout; /* vlapic timer */ 1347c8c0b82SPatrick Mooney hrtime_t timer_fire_when; 1357c8c0b82SPatrick Mooney hrtime_t timer_period; 1367c8c0b82SPatrick Mooney uint32_t timer_cur_freq; 1377c8c0b82SPatrick Mooney 1387c8c0b82SPatrick Mooney kmutex_t timer_lock; 1397c8c0b82SPatrick Mooney 1407c8c0b82SPatrick Mooney uint64_t msr_apicbase; 1417c8c0b82SPatrick Mooney 1427c8c0b82SPatrick Mooney /* 1437c8c0b82SPatrick Mooney * Copies of some registers in the virtual APIC page. We do this for 1447c8c0b82SPatrick Mooney * a couple of different reasons: 1457c8c0b82SPatrick Mooney * - to be able to detect what changed (e.g. svr_last) 1467c8c0b82SPatrick Mooney * - to maintain a coherent snapshot of the register (e.g. lvt_last) 1477c8c0b82SPatrick Mooney */ 1487c8c0b82SPatrick Mooney uint32_t svr_last; 1497c8c0b82SPatrick Mooney uint32_t lvt_last[VLAPIC_MAXLVT_INDEX + 1]; 15062ac5a8aSPatrick Mooney 15162ac5a8aSPatrick Mooney /* Occurrences of unusual events are tracked in this stats struct. */ 15262ac5a8aSPatrick Mooney struct vlapic_stats stats; 1537c8c0b82SPatrick Mooney }; 1547c8c0b82SPatrick Mooney 1557c8c0b82SPatrick Mooney void vlapic_init(struct vlapic *vlapic); 1567c8c0b82SPatrick Mooney void vlapic_cleanup(struct vlapic *vlapic); 1577c8c0b82SPatrick Mooney 1587c8c0b82SPatrick Mooney #endif /* _VLAPIC_PRIV_H_ */ 159