xref: /illumos-gate/usr/src/uts/sun4u/io/px/px_asm_4u.S (revision 55fea89d)
1*5d9d9091SRichard Lowe/*
2*5d9d9091SRichard Lowe * CDDL HEADER START
3*5d9d9091SRichard Lowe *
4*5d9d9091SRichard Lowe * The contents of this file are subject to the terms of the
5*5d9d9091SRichard Lowe * Common Development and Distribution License, Version 1.0 only
6*5d9d9091SRichard Lowe * (the "License").  You may not use this file except in compliance
7*5d9d9091SRichard Lowe * with the License.
8*5d9d9091SRichard Lowe *
9*5d9d9091SRichard Lowe * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*5d9d9091SRichard Lowe * or http://www.opensolaris.org/os/licensing.
11*5d9d9091SRichard Lowe * See the License for the specific language governing permissions
12*5d9d9091SRichard Lowe * and limitations under the License.
13*5d9d9091SRichard Lowe *
14*5d9d9091SRichard Lowe * When distributing Covered Code, include this CDDL HEADER in each
15*5d9d9091SRichard Lowe * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*5d9d9091SRichard Lowe * If applicable, add the following below this CDDL HEADER, with the
17*5d9d9091SRichard Lowe * fields enclosed by brackets "[]" replaced with your own identifying
18*5d9d9091SRichard Lowe * information: Portions Copyright [yyyy] [name of copyright owner]
19*5d9d9091SRichard Lowe *
20*5d9d9091SRichard Lowe * CDDL HEADER END
21*5d9d9091SRichard Lowe */
22*5d9d9091SRichard Lowe/*
23*5d9d9091SRichard Lowe * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24*5d9d9091SRichard Lowe * Use is subject to license terms.
25*5d9d9091SRichard Lowe */
26*5d9d9091SRichard Lowe
27*5d9d9091SRichard Lowe/*
28*5d9d9091SRichard Lowe * Assembly language support for px driver
29*5d9d9091SRichard Lowe */
30*5d9d9091SRichard Lowe
31*5d9d9091SRichard Lowe#include <sys/asm_linkage.h>
32*5d9d9091SRichard Lowe#include <sys/machthread.h>
33*5d9d9091SRichard Lowe#include <sys/privregs.h>
34*5d9d9091SRichard Lowe
35*5d9d9091SRichard Lowe/*LINTLIBRARY*/
36*5d9d9091SRichard Lowe
37*5d9d9091SRichard Lowe! px_phys_peek_4u: Do physical address read.
38*5d9d9091SRichard Lowe!
39*5d9d9091SRichard Lowe! %o0 is size in bytes - Must be 8, 4, 2 or 1.  Invalid sizes default to 1.
40*5d9d9091SRichard Lowe! %o1 is address to read
41*5d9d9091SRichard Lowe! %o2 is address to save value into
42*5d9d9091SRichard Lowe! %o3 is 0 for little endian, non-zero for big endian
43*5d9d9091SRichard Lowe!
44*5d9d9091SRichard Lowe! To be called from an on_trap environment.
45*5d9d9091SRichard Lowe! Interrupts will be disabled for the duration of the read, to prevent
46*5d9d9091SRichard Lowe! an interrupt from raising the trap level to 1 and then a possible
47*5d9d9091SRichard Lowe! data access exception being delivered while the trap level > 0.
48*5d9d9091SRichard Lowe!
49*5d9d9091SRichard Lowe! Always returns success (0) in %o0
50*5d9d9091SRichard Lowe!
51*5d9d9091SRichard Lowe! Assumes alignment is correct and that on_trap handling has been installed
52*5d9d9091SRichard Lowe
53*5d9d9091SRichard Lowe	ENTRY(px_phys_peek_4u)
54*5d9d9091SRichard Lowe
55*5d9d9091SRichard Lowe	rdpr	%pstate, %o4		! Disable interrupts if not already
56*5d9d9091SRichard Lowe	andcc	%o4, PSTATE_IE, %g2	! Save original state first
57*5d9d9091SRichard Lowe	bz	.peek_ints_disabled
58*5d9d9091SRichard Lowe	nop
59*5d9d9091SRichard Lowe	wrpr	%o4, PSTATE_IE, %pstate
60*5d9d9091SRichard Lowe.peek_ints_disabled:
61*5d9d9091SRichard Lowe
62*5d9d9091SRichard Lowe	tst	%o3			! Set up %asi with modifier for
63*5d9d9091SRichard Lowe	movz	%xcc, ASI_IOL, %g1	! Big/little endian physical space
64*5d9d9091SRichard Lowe	movnz	%xcc, ASI_IO, %g1
65*5d9d9091SRichard Lowe	mov	%g1, %asi
66*5d9d9091SRichard Lowe
67*5d9d9091SRichard Lowe	cmp	%o0, 8			! 64-bit?
68*5d9d9091SRichard Lowe	bne	.peek_int
69*5d9d9091SRichard Lowe	cmp	%o0, 4			! 32-bit?
70*5d9d9091SRichard Lowe	ldxa	[%o1]%asi, %g1
71*5d9d9091SRichard Lowe	ba	.peekdone
72*5d9d9091SRichard Lowe	stx	%g1, [%o2]
73*5d9d9091SRichard Lowe
74*5d9d9091SRichard Lowe.peek_int:
75*5d9d9091SRichard Lowe	bne	.peek_half
76*5d9d9091SRichard Lowe	cmp	%o0, 2			! 16-bit?
77*5d9d9091SRichard Lowe	lduwa	[%o1]%asi, %g1
78*5d9d9091SRichard Lowe	ba	.peekdone
79*5d9d9091SRichard Lowe	stuw	%g1, [%o2]
80*5d9d9091SRichard Lowe
81*5d9d9091SRichard Lowe.peek_half:
82*5d9d9091SRichard Lowe	bne	.peek_byte
83*5d9d9091SRichard Lowe	nop
84*5d9d9091SRichard Lowe	lduha	[%o1]%asi, %g1
85*5d9d9091SRichard Lowe	ba	.peekdone
86*5d9d9091SRichard Lowe	stuh	%g1, [%o2]
87*5d9d9091SRichard Lowe
88*5d9d9091SRichard Lowe.peek_byte:
89*5d9d9091SRichard Lowe	lduba	[%o1]%asi, %g1	! 8-bit!
90*5d9d9091SRichard Lowe	stub	%g1, [%o2]
91*5d9d9091SRichard Lowe
92*5d9d9091SRichard Lowe.peekdone:
93*5d9d9091SRichard Lowe	membar	#Sync			! Make sure the loads take
94*5d9d9091SRichard Lowe	tst	%g2			! No need to reenable interrupts
95*5d9d9091SRichard Lowe	bz	.peek_ints_done		! 	if not enabled at entry
96*5d9d9091SRichard Lowe	rdpr	%pstate, %o4
97*5d9d9091SRichard Lowe	wrpr	%o4, PSTATE_IE, %pstate
98*5d9d9091SRichard Lowe.peek_ints_done:
99*5d9d9091SRichard Lowe	mov     %g0, %o0
100*5d9d9091SRichard Lowe	retl
101*5d9d9091SRichard Lowe	nop
102*5d9d9091SRichard Lowe	SET_SIZE(px_phys_peek_4u)
103*5d9d9091SRichard Lowe
104*5d9d9091SRichard Lowe
105*5d9d9091SRichard Lowe! px_phys_poke_4u: Do physical address write.
106*5d9d9091SRichard Lowe!
107*5d9d9091SRichard Lowe! %o0 is size in bytes - Must be 8, 4, 2 or 1.  Invalid sizes default to 1.
108*5d9d9091SRichard Lowe! %o1 is address to write to
109*5d9d9091SRichard Lowe! %o2 is address to read from
110*5d9d9091SRichard Lowe! %o3 is 0 for little endian, non-zero for big endian
111*5d9d9091SRichard Lowe!
112*5d9d9091SRichard Lowe! Always returns success (0) in %o0
113*5d9d9091SRichard Lowe!
114*5d9d9091SRichard Lowe! Assumes alignment is correct and that on_trap handling has been installed
115*5d9d9091SRichard Lowe
116*5d9d9091SRichard Lowe	ENTRY(px_phys_poke_4u)
117*5d9d9091SRichard Lowe
118*5d9d9091SRichard Lowe	tst	%o3
119*5d9d9091SRichard Lowe	movz	%xcc, ASI_IOL, %g1	! Big/little endian physical space
120*5d9d9091SRichard Lowe	movnz	%xcc, ASI_IO, %g1
121*5d9d9091SRichard Lowe	mov	%g1, %asi
122*5d9d9091SRichard Lowe
123*5d9d9091SRichard Lowe	cmp	%o0, 8			! 64 bit?
124*5d9d9091SRichard Lowe	bne	.poke_int
125*5d9d9091SRichard Lowe	cmp	%o0, 4			! 32-bit?
126*5d9d9091SRichard Lowe	ldx	[%o2], %g1
127*5d9d9091SRichard Lowe	ba	.pokedone
128*5d9d9091SRichard Lowe	stxa	%g1, [%o1]%asi
129*5d9d9091SRichard Lowe
130*5d9d9091SRichard Lowe.poke_int:
131*5d9d9091SRichard Lowe	bne	.poke_half
132*5d9d9091SRichard Lowe	cmp	%o0, 2			! 16-bit?
133*5d9d9091SRichard Lowe	lduw	[%o2], %g1
134*5d9d9091SRichard Lowe	ba	.pokedone
135*5d9d9091SRichard Lowe	stuwa	%g1, [%o1]%asi
136*5d9d9091SRichard Lowe
137*5d9d9091SRichard Lowe.poke_half:
138*5d9d9091SRichard Lowe	bne	.poke_byte
139*5d9d9091SRichard Lowe	nop
140*5d9d9091SRichard Lowe	lduh	[%o2], %g1
141*5d9d9091SRichard Lowe	ba	.pokedone
142*5d9d9091SRichard Lowe	stuha	%g1, [%o1]%asi
143*5d9d9091SRichard Lowe
144*5d9d9091SRichard Lowe.poke_byte:
145*5d9d9091SRichard Lowe	ldub	[%o2], %g1		! 8-bit!
146*5d9d9091SRichard Lowe	stuba	%g1, [%o1]%asi
147*5d9d9091SRichard Lowe
148*5d9d9091SRichard Lowe.pokedone:
149*5d9d9091SRichard Lowe	membar	#Sync
150*5d9d9091SRichard Lowe	retl
151*5d9d9091SRichard Lowe	mov	%g0, %o0
152*5d9d9091SRichard Lowe	SET_SIZE(px_phys_poke_4u)
153*5d9d9091SRichard Lowe
154