1 #ifndef __ASM_ARM_DMA_H 2 #define __ASM_ARM_DMA_H 3 4 /* 5 * This is the maximum virtual address which can be DMA'd from. 6 */ 7 #ifndef CONFIG_ZONE_DMA 8 #define MAX_DMA_ADDRESS 0xffffffffUL 9 #else 10 #define MAX_DMA_ADDRESS ({ \ 11 extern phys_addr_t arm_dma_zone_size; \ 12 arm_dma_zone_size && arm_dma_zone_size < (0x10000000 - PAGE_OFFSET) ? \ 13 (PAGE_OFFSET + arm_dma_zone_size) : 0xffffffffUL; }) 14 #endif 15 16 #ifdef CONFIG_ISA_DMA_API 17 /* 18 * This is used to support drivers written for the x86 ISA DMA API. 19 * It should not be re-used except for that purpose. 20 */ 21 #include <linux/spinlock.h> 22 #include <asm/scatterlist.h> 23 24 #include <mach/isa-dma.h> 25 26 /* 27 * The DMA modes reflect the settings for the ISA DMA controller 28 */ 29 #define DMA_MODE_MASK 0xcc 30 31 #define DMA_MODE_READ 0x44 32 #define DMA_MODE_WRITE 0x48 33 #define DMA_MODE_CASCADE 0xc0 34 #define DMA_AUTOINIT 0x10 35 36 extern raw_spinlock_t dma_spin_lock; 37 38 static inline unsigned long claim_dma_lock(void) 39 { 40 unsigned long flags; 41 raw_spin_lock_irqsave(&dma_spin_lock, flags); 42 return flags; 43 } 44 45 static inline void release_dma_lock(unsigned long flags) 46 { 47 raw_spin_unlock_irqrestore(&dma_spin_lock, flags); 48 } 49 50 /* Clear the 'DMA Pointer Flip Flop'. 51 * Write 0 for LSB/MSB, 1 for MSB/LSB access. 52 */ 53 #define clear_dma_ff(chan) 54 55 /* Set only the page register bits of the transfer address. 56 * 57 * NOTE: This is an architecture specific function, and should 58 * be hidden from the drivers 59 */ 60 extern void set_dma_page(unsigned int chan, char pagenr); 61 62 /* Request a DMA channel 63 * 64 * Some architectures may need to do allocate an interrupt 65 */ 66 extern int request_dma(unsigned int chan, const char * device_id); 67 68 /* Free a DMA channel 69 * 70 * Some architectures may need to do free an interrupt 71 */ 72 extern void free_dma(unsigned int chan); 73 74 /* Enable DMA for this channel 75 * 76 * On some architectures, this may have other side effects like 77 * enabling an interrupt and setting the DMA registers. 78 */ 79 extern void enable_dma(unsigned int chan); 80 81 /* Disable DMA for this channel 82 * 83 * On some architectures, this may have other side effects like 84 * disabling an interrupt or whatever. 85 */ 86 extern void disable_dma(unsigned int chan); 87 88 /* Test whether the specified channel has an active DMA transfer 89 */ 90 extern int dma_channel_active(unsigned int chan); 91 92 /* Set the DMA scatter gather list for this channel 93 * 94 * This should not be called if a DMA channel is enabled, 95 * especially since some DMA architectures don't update the 96 * DMA address immediately, but defer it to the enable_dma(). 97 */ 98 extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg); 99 100 /* Set the DMA address for this channel 101 * 102 * This should not be called if a DMA channel is enabled, 103 * especially since some DMA architectures don't update the 104 * DMA address immediately, but defer it to the enable_dma(). 105 */ 106 extern void __set_dma_addr(unsigned int chan, void *addr); 107 #define set_dma_addr(chan, addr) \ 108 __set_dma_addr(chan, (void *)__bus_to_virt(addr)) 109 110 /* Set the DMA byte count for this channel 111 * 112 * This should not be called if a DMA channel is enabled, 113 * especially since some DMA architectures don't update the 114 * DMA count immediately, but defer it to the enable_dma(). 115 */ 116 extern void set_dma_count(unsigned int chan, unsigned long count); 117 118 /* Set the transfer direction for this channel 119 * 120 * This should not be called if a DMA channel is enabled, 121 * especially since some DMA architectures don't update the 122 * DMA transfer direction immediately, but defer it to the 123 * enable_dma(). 124 */ 125 extern void set_dma_mode(unsigned int chan, unsigned int mode); 126 127 /* Set the transfer speed for this channel 128 */ 129 extern void set_dma_speed(unsigned int chan, int cycle_ns); 130 131 /* Get DMA residue count. After a DMA transfer, this 132 * should return zero. Reading this while a DMA transfer is 133 * still in progress will return unpredictable results. 134 * If called before the channel has been used, it may return 1. 135 * Otherwise, it returns the number of _bytes_ left to transfer. 136 */ 137 extern int get_dma_residue(unsigned int chan); 138 139 #ifndef NO_DMA 140 #define NO_DMA 255 141 #endif 142 143 #endif /* CONFIG_ISA_DMA_API */ 144 145 #ifdef CONFIG_PCI 146 extern int isa_dma_bridge_buggy; 147 #else 148 #define isa_dma_bridge_buggy (0) 149 #endif 150 151 #endif /* __ASM_ARM_DMA_H */ 152