1 #ifndef __ASM_ARM_DMA_H 2 #define __ASM_ARM_DMA_H 3 4 typedef unsigned int dmach_t; 5 6 #include <linux/spinlock.h> 7 #include <asm/memory.h> 8 #include <asm/system.h> 9 #include <asm/scatterlist.h> 10 #include <mach/dma.h> 11 12 /* 13 * This is the maximum virtual address which can be DMA'd from. 14 */ 15 #ifndef MAX_DMA_ADDRESS 16 #define MAX_DMA_ADDRESS 0xffffffff 17 #endif 18 19 /* 20 * DMA modes 21 */ 22 typedef unsigned int dmamode_t; 23 24 #define DMA_MODE_MASK 3 25 26 #define DMA_MODE_READ 0 27 #define DMA_MODE_WRITE 1 28 #define DMA_MODE_CASCADE 2 29 #define DMA_AUTOINIT 4 30 31 extern spinlock_t dma_spin_lock; 32 33 static inline unsigned long claim_dma_lock(void) 34 { 35 unsigned long flags; 36 spin_lock_irqsave(&dma_spin_lock, flags); 37 return flags; 38 } 39 40 static inline void release_dma_lock(unsigned long flags) 41 { 42 spin_unlock_irqrestore(&dma_spin_lock, flags); 43 } 44 45 /* Clear the 'DMA Pointer Flip Flop'. 46 * Write 0 for LSB/MSB, 1 for MSB/LSB access. 47 */ 48 #define clear_dma_ff(channel) 49 50 /* Set only the page register bits of the transfer address. 51 * 52 * NOTE: This is an architecture specific function, and should 53 * be hidden from the drivers 54 */ 55 extern void set_dma_page(dmach_t channel, char pagenr); 56 57 /* Request a DMA channel 58 * 59 * Some architectures may need to do allocate an interrupt 60 */ 61 extern int request_dma(dmach_t channel, const char * device_id); 62 63 /* Free a DMA channel 64 * 65 * Some architectures may need to do free an interrupt 66 */ 67 extern void free_dma(dmach_t channel); 68 69 /* Enable DMA for this channel 70 * 71 * On some architectures, this may have other side effects like 72 * enabling an interrupt and setting the DMA registers. 73 */ 74 extern void enable_dma(dmach_t channel); 75 76 /* Disable DMA for this channel 77 * 78 * On some architectures, this may have other side effects like 79 * disabling an interrupt or whatever. 80 */ 81 extern void disable_dma(dmach_t channel); 82 83 /* Test whether the specified channel has an active DMA transfer 84 */ 85 extern int dma_channel_active(dmach_t channel); 86 87 /* Set the DMA scatter gather list for this channel 88 * 89 * This should not be called if a DMA channel is enabled, 90 * especially since some DMA architectures don't update the 91 * DMA address immediately, but defer it to the enable_dma(). 92 */ 93 extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); 94 95 /* Set the DMA address for this channel 96 * 97 * This should not be called if a DMA channel is enabled, 98 * especially since some DMA architectures don't update the 99 * DMA address immediately, but defer it to the enable_dma(). 100 */ 101 extern void __set_dma_addr(dmach_t channel, void *addr); 102 #define set_dma_addr(channel, addr) \ 103 __set_dma_addr(channel, bus_to_virt(addr)) 104 105 /* Set the DMA byte count for this channel 106 * 107 * This should not be called if a DMA channel is enabled, 108 * especially since some DMA architectures don't update the 109 * DMA count immediately, but defer it to the enable_dma(). 110 */ 111 extern void set_dma_count(dmach_t channel, unsigned long count); 112 113 /* Set the transfer direction for this channel 114 * 115 * This should not be called if a DMA channel is enabled, 116 * especially since some DMA architectures don't update the 117 * DMA transfer direction immediately, but defer it to the 118 * enable_dma(). 119 */ 120 extern void set_dma_mode(dmach_t channel, dmamode_t mode); 121 122 /* Set the transfer speed for this channel 123 */ 124 extern void set_dma_speed(dmach_t channel, int cycle_ns); 125 126 /* Get DMA residue count. After a DMA transfer, this 127 * should return zero. Reading this while a DMA transfer is 128 * still in progress will return unpredictable results. 129 * If called before the channel has been used, it may return 1. 130 * Otherwise, it returns the number of _bytes_ left to transfer. 131 */ 132 extern int get_dma_residue(dmach_t channel); 133 134 #ifndef NO_DMA 135 #define NO_DMA 255 136 #endif 137 138 #ifdef CONFIG_PCI 139 extern int isa_dma_bridge_buggy; 140 #else 141 #define isa_dma_bridge_buggy (0) 142 #endif 143 144 #endif /* _ARM_DMA_H */ 145