1*d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
203b505eaSRussell King /*
303b505eaSRussell King * linux/arch/arm/kernel/smp_tlb.c
403b505eaSRussell King *
503b505eaSRussell King * Copyright (C) 2002 ARM Limited, All Rights Reserved.
603b505eaSRussell King */
703b505eaSRussell King #include <linux/preempt.h>
803b505eaSRussell King #include <linux/smp.h>
990f92c63SLinus Walleij #include <linux/uaccess.h>
1003b505eaSRussell King
1103b505eaSRussell King #include <asm/smp_plat.h>
1203b505eaSRussell King #include <asm/tlbflush.h>
1393dc6887SCatalin Marinas #include <asm/mmu_context.h>
1403b505eaSRussell King
1503b505eaSRussell King /**********************************************************************/
1603b505eaSRussell King
1703b505eaSRussell King /*
1803b505eaSRussell King * TLB operations
1903b505eaSRussell King */
2003b505eaSRussell King struct tlb_args {
2103b505eaSRussell King struct vm_area_struct *ta_vma;
2203b505eaSRussell King unsigned long ta_start;
2303b505eaSRussell King unsigned long ta_end;
2403b505eaSRussell King };
2503b505eaSRussell King
ipi_flush_tlb_all(void * ignored)2603b505eaSRussell King static inline void ipi_flush_tlb_all(void *ignored)
2703b505eaSRussell King {
2803b505eaSRussell King local_flush_tlb_all();
2903b505eaSRussell King }
3003b505eaSRussell King
ipi_flush_tlb_mm(void * arg)3103b505eaSRussell King static inline void ipi_flush_tlb_mm(void *arg)
3203b505eaSRussell King {
3303b505eaSRussell King struct mm_struct *mm = (struct mm_struct *)arg;
3403b505eaSRussell King
3503b505eaSRussell King local_flush_tlb_mm(mm);
3603b505eaSRussell King }
3703b505eaSRussell King
ipi_flush_tlb_page(void * arg)3803b505eaSRussell King static inline void ipi_flush_tlb_page(void *arg)
3903b505eaSRussell King {
4003b505eaSRussell King struct tlb_args *ta = (struct tlb_args *)arg;
4190f92c63SLinus Walleij unsigned int __ua_flags = uaccess_save_and_enable();
4203b505eaSRussell King
4303b505eaSRussell King local_flush_tlb_page(ta->ta_vma, ta->ta_start);
4490f92c63SLinus Walleij
4590f92c63SLinus Walleij uaccess_restore(__ua_flags);
4603b505eaSRussell King }
4703b505eaSRussell King
ipi_flush_tlb_kernel_page(void * arg)4803b505eaSRussell King static inline void ipi_flush_tlb_kernel_page(void *arg)
4903b505eaSRussell King {
5003b505eaSRussell King struct tlb_args *ta = (struct tlb_args *)arg;
5103b505eaSRussell King
5203b505eaSRussell King local_flush_tlb_kernel_page(ta->ta_start);
5303b505eaSRussell King }
5403b505eaSRussell King
ipi_flush_tlb_range(void * arg)5503b505eaSRussell King static inline void ipi_flush_tlb_range(void *arg)
5603b505eaSRussell King {
5703b505eaSRussell King struct tlb_args *ta = (struct tlb_args *)arg;
5890f92c63SLinus Walleij unsigned int __ua_flags = uaccess_save_and_enable();
5903b505eaSRussell King
6003b505eaSRussell King local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end);
6190f92c63SLinus Walleij
6290f92c63SLinus Walleij uaccess_restore(__ua_flags);
6303b505eaSRussell King }
6403b505eaSRussell King
ipi_flush_tlb_kernel_range(void * arg)6503b505eaSRussell King static inline void ipi_flush_tlb_kernel_range(void *arg)
6603b505eaSRussell King {
6703b505eaSRussell King struct tlb_args *ta = (struct tlb_args *)arg;
6803b505eaSRussell King
6903b505eaSRussell King local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end);
7003b505eaSRussell King }
7103b505eaSRussell King
ipi_flush_bp_all(void * ignored)72862c588fSWill Deacon static inline void ipi_flush_bp_all(void *ignored)
73862c588fSWill Deacon {
74862c588fSWill Deacon local_flush_bp_all();
75862c588fSWill Deacon }
76862c588fSWill Deacon
7792871b94SRob Herring #ifdef CONFIG_ARM_ERRATA_798181
7892871b94SRob Herring bool (*erratum_a15_798181_handler)(void);
7992871b94SRob Herring
erratum_a15_798181_partial(void)8092871b94SRob Herring static bool erratum_a15_798181_partial(void)
8192871b94SRob Herring {
8292871b94SRob Herring asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
8392871b94SRob Herring dsb(ish);
8492871b94SRob Herring return false;
8592871b94SRob Herring }
8692871b94SRob Herring
erratum_a15_798181_broadcast(void)8792871b94SRob Herring static bool erratum_a15_798181_broadcast(void)
8892871b94SRob Herring {
8992871b94SRob Herring asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
9092871b94SRob Herring dsb(ish);
9192871b94SRob Herring return true;
9292871b94SRob Herring }
9392871b94SRob Herring
erratum_a15_798181_init(void)9492871b94SRob Herring void erratum_a15_798181_init(void)
9592871b94SRob Herring {
9692871b94SRob Herring unsigned int midr = read_cpuid_id();
9792871b94SRob Herring unsigned int revidr = read_cpuid(CPUID_REVIDR);
9892871b94SRob Herring
9904fcab32SGregory Fong /* Brahma-B15 r0p0..r0p2 affected
100f6492164SMatija Glavinic Pecotic * Cortex-A15 r0p0..r3p3 w/o ECO fix affected
101f6492164SMatija Glavinic Pecotic * Fixes applied to A15 with respect to the revision and revidr are:
102f6492164SMatija Glavinic Pecotic *
103f6492164SMatija Glavinic Pecotic * r0p0-r2p1: No fixes applied
104f6492164SMatija Glavinic Pecotic * r2p2,r2p3:
105f6492164SMatija Glavinic Pecotic * REVIDR[4]: 798181 Moving a virtual page that is being accessed
106f6492164SMatija Glavinic Pecotic * by an active process can lead to unexpected behavior
107f6492164SMatija Glavinic Pecotic * REVIDR[9]: Not defined
108f6492164SMatija Glavinic Pecotic * r2p4,r3p0,r3p1,r3p2:
109f6492164SMatija Glavinic Pecotic * REVIDR[4]: 798181 Moving a virtual page that is being accessed
110f6492164SMatija Glavinic Pecotic * by an active process can lead to unexpected behavior
111f6492164SMatija Glavinic Pecotic * REVIDR[9]: 798181 Moving a virtual page that is being accessed
112f6492164SMatija Glavinic Pecotic * by an active process can lead to unexpected behavior
113f6492164SMatija Glavinic Pecotic * - This is an update to a previously released ECO.
114f6492164SMatija Glavinic Pecotic * r3p3:
115f6492164SMatija Glavinic Pecotic * REVIDR[4]: Reserved
116f6492164SMatija Glavinic Pecotic * REVIDR[9]: 798181 Moving a virtual page that is being accessed
117f6492164SMatija Glavinic Pecotic * by an active process can lead to unexpected behavior
118f6492164SMatija Glavinic Pecotic * - This is an update to a previously released ECO.
119f6492164SMatija Glavinic Pecotic *
120f6492164SMatija Glavinic Pecotic * Handling:
121f6492164SMatija Glavinic Pecotic * REVIDR[9] set -> No WA
122f6492164SMatija Glavinic Pecotic * REVIDR[4] set, REVIDR[9] cleared -> Partial WA
123f6492164SMatija Glavinic Pecotic * Both cleared -> Full WA
124f6492164SMatija Glavinic Pecotic */
125f6492164SMatija Glavinic Pecotic if ((midr & 0xff0ffff0) == 0x420f00f0 && midr <= 0x420f00f2) {
12692871b94SRob Herring erratum_a15_798181_handler = erratum_a15_798181_broadcast;
127f6492164SMatija Glavinic Pecotic } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f2) {
128f6492164SMatija Glavinic Pecotic erratum_a15_798181_handler = erratum_a15_798181_broadcast;
129f6492164SMatija Glavinic Pecotic } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f4) {
13004fcab32SGregory Fong if (revidr & 0x10)
13104fcab32SGregory Fong erratum_a15_798181_handler =
13204fcab32SGregory Fong erratum_a15_798181_partial;
13304fcab32SGregory Fong else
13404fcab32SGregory Fong erratum_a15_798181_handler =
13504fcab32SGregory Fong erratum_a15_798181_broadcast;
136f6492164SMatija Glavinic Pecotic } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x413fc0f3) {
137f6492164SMatija Glavinic Pecotic if ((revidr & 0x210) == 0)
138f6492164SMatija Glavinic Pecotic erratum_a15_798181_handler =
139f6492164SMatija Glavinic Pecotic erratum_a15_798181_broadcast;
140f6492164SMatija Glavinic Pecotic else if (revidr & 0x10)
141f6492164SMatija Glavinic Pecotic erratum_a15_798181_handler =
142f6492164SMatija Glavinic Pecotic erratum_a15_798181_partial;
143f6492164SMatija Glavinic Pecotic } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x414fc0f0) {
144f6492164SMatija Glavinic Pecotic if ((revidr & 0x200) == 0)
145f6492164SMatija Glavinic Pecotic erratum_a15_798181_handler =
146f6492164SMatija Glavinic Pecotic erratum_a15_798181_partial;
14704fcab32SGregory Fong }
14892871b94SRob Herring }
14992871b94SRob Herring #endif
15092871b94SRob Herring
ipi_flush_tlb_a15_erratum(void * arg)15193dc6887SCatalin Marinas static void ipi_flush_tlb_a15_erratum(void *arg)
15293dc6887SCatalin Marinas {
15393dc6887SCatalin Marinas dmb();
15493dc6887SCatalin Marinas }
15593dc6887SCatalin Marinas
broadcast_tlb_a15_erratum(void)15693dc6887SCatalin Marinas static void broadcast_tlb_a15_erratum(void)
15793dc6887SCatalin Marinas {
15893dc6887SCatalin Marinas if (!erratum_a15_798181())
15993dc6887SCatalin Marinas return;
16093dc6887SCatalin Marinas
1613eb0be30SCatalin Marinas smp_call_function(ipi_flush_tlb_a15_erratum, NULL, 1);
16293dc6887SCatalin Marinas }
16393dc6887SCatalin Marinas
broadcast_tlb_mm_a15_erratum(struct mm_struct * mm)16493dc6887SCatalin Marinas static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm)
16593dc6887SCatalin Marinas {
1660d0752bcSMarc Zyngier int this_cpu;
16793dc6887SCatalin Marinas cpumask_t mask = { CPU_BITS_NONE };
16893dc6887SCatalin Marinas
16993dc6887SCatalin Marinas if (!erratum_a15_798181())
17093dc6887SCatalin Marinas return;
17193dc6887SCatalin Marinas
1723eb0be30SCatalin Marinas this_cpu = get_cpu();
1730d0752bcSMarc Zyngier a15_erratum_get_cpumask(this_cpu, mm, &mask);
17493dc6887SCatalin Marinas smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1);
1753eb0be30SCatalin Marinas put_cpu();
17693dc6887SCatalin Marinas }
17793dc6887SCatalin Marinas
flush_tlb_all(void)17803b505eaSRussell King void flush_tlb_all(void)
17903b505eaSRussell King {
18003b505eaSRussell King if (tlb_ops_need_broadcast())
18103b505eaSRussell King on_each_cpu(ipi_flush_tlb_all, NULL, 1);
18203b505eaSRussell King else
183f0915781SWill Deacon __flush_tlb_all();
18493dc6887SCatalin Marinas broadcast_tlb_a15_erratum();
18503b505eaSRussell King }
18603b505eaSRussell King
flush_tlb_mm(struct mm_struct * mm)18703b505eaSRussell King void flush_tlb_mm(struct mm_struct *mm)
18803b505eaSRussell King {
18903b505eaSRussell King if (tlb_ops_need_broadcast())
1903fc498f1SGilad Ben-Yossef on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_mm, mm, 1);
19103b505eaSRussell King else
192f0915781SWill Deacon __flush_tlb_mm(mm);
19393dc6887SCatalin Marinas broadcast_tlb_mm_a15_erratum(mm);
19403b505eaSRussell King }
19503b505eaSRussell King
flush_tlb_page(struct vm_area_struct * vma,unsigned long uaddr)19603b505eaSRussell King void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
19703b505eaSRussell King {
19803b505eaSRussell King if (tlb_ops_need_broadcast()) {
19903b505eaSRussell King struct tlb_args ta;
20003b505eaSRussell King ta.ta_vma = vma;
20103b505eaSRussell King ta.ta_start = uaddr;
2023fc498f1SGilad Ben-Yossef on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_page,
2033fc498f1SGilad Ben-Yossef &ta, 1);
20403b505eaSRussell King } else
205f0915781SWill Deacon __flush_tlb_page(vma, uaddr);
20693dc6887SCatalin Marinas broadcast_tlb_mm_a15_erratum(vma->vm_mm);
20703b505eaSRussell King }
20803b505eaSRussell King
flush_tlb_kernel_page(unsigned long kaddr)20903b505eaSRussell King void flush_tlb_kernel_page(unsigned long kaddr)
21003b505eaSRussell King {
21103b505eaSRussell King if (tlb_ops_need_broadcast()) {
21203b505eaSRussell King struct tlb_args ta;
21303b505eaSRussell King ta.ta_start = kaddr;
21403b505eaSRussell King on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1);
21503b505eaSRussell King } else
216f0915781SWill Deacon __flush_tlb_kernel_page(kaddr);
21793dc6887SCatalin Marinas broadcast_tlb_a15_erratum();
21803b505eaSRussell King }
21903b505eaSRussell King
flush_tlb_range(struct vm_area_struct * vma,unsigned long start,unsigned long end)22003b505eaSRussell King void flush_tlb_range(struct vm_area_struct *vma,
22103b505eaSRussell King unsigned long start, unsigned long end)
22203b505eaSRussell King {
22303b505eaSRussell King if (tlb_ops_need_broadcast()) {
22403b505eaSRussell King struct tlb_args ta;
22503b505eaSRussell King ta.ta_vma = vma;
22603b505eaSRussell King ta.ta_start = start;
22703b505eaSRussell King ta.ta_end = end;
2283fc498f1SGilad Ben-Yossef on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_range,
2293fc498f1SGilad Ben-Yossef &ta, 1);
23003b505eaSRussell King } else
23103b505eaSRussell King local_flush_tlb_range(vma, start, end);
23293dc6887SCatalin Marinas broadcast_tlb_mm_a15_erratum(vma->vm_mm);
23303b505eaSRussell King }
23403b505eaSRussell King
flush_tlb_kernel_range(unsigned long start,unsigned long end)23503b505eaSRussell King void flush_tlb_kernel_range(unsigned long start, unsigned long end)
23603b505eaSRussell King {
23703b505eaSRussell King if (tlb_ops_need_broadcast()) {
23803b505eaSRussell King struct tlb_args ta;
23903b505eaSRussell King ta.ta_start = start;
24003b505eaSRussell King ta.ta_end = end;
24103b505eaSRussell King on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1);
24203b505eaSRussell King } else
24303b505eaSRussell King local_flush_tlb_kernel_range(start, end);
24493dc6887SCatalin Marinas broadcast_tlb_a15_erratum();
24503b505eaSRussell King }
24603b505eaSRussell King
flush_bp_all(void)247862c588fSWill Deacon void flush_bp_all(void)
248862c588fSWill Deacon {
249862c588fSWill Deacon if (tlb_ops_need_broadcast())
250862c588fSWill Deacon on_each_cpu(ipi_flush_bp_all, NULL, 1);
251862c588fSWill Deacon else
2522c813980SWill Deacon __flush_bp_all();
253862c588fSWill Deacon }
254