1cbafcad0SMiquel Raynal// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2cbafcad0SMiquel Raynal/*
3cbafcad0SMiquel Raynal * Device Tree file for Marvell Armada AP807 Quad
4cbafcad0SMiquel Raynal *
5cbafcad0SMiquel Raynal * Copyright (C) 2019 Marvell Technology Group Ltd.
6cbafcad0SMiquel Raynal */
7cbafcad0SMiquel Raynal
8cbafcad0SMiquel Raynal#include "armada-ap807.dtsi"
9cbafcad0SMiquel Raynal
10cbafcad0SMiquel Raynal/ {
11cbafcad0SMiquel Raynal	model = "Marvell Armada AP807 Quad";
12cbafcad0SMiquel Raynal	compatible = "marvell,armada-ap807-quad", "marvell,armada-ap807";
13cbafcad0SMiquel Raynal
14cbafcad0SMiquel Raynal	cpus {
15cbafcad0SMiquel Raynal		#address-cells = <1>;
16cbafcad0SMiquel Raynal		#size-cells = <0>;
17cbafcad0SMiquel Raynal
18cbafcad0SMiquel Raynal		cpu0: cpu@0 {
19cbafcad0SMiquel Raynal			device_type = "cpu";
20d136d258SAmit Kucheria			compatible = "arm,cortex-a72";
21cbafcad0SMiquel Raynal			reg = <0x000>;
22cbafcad0SMiquel Raynal			enable-method = "psci";
23cbafcad0SMiquel Raynal			#cooling-cells = <2>;
24cbafcad0SMiquel Raynal			clocks = <&cpu_clk 0>;
2530d53abdSGrzegorz Jaszczyk			i-cache-size = <0xc000>;
2630d53abdSGrzegorz Jaszczyk			i-cache-line-size = <64>;
2730d53abdSGrzegorz Jaszczyk			i-cache-sets = <256>;
2830d53abdSGrzegorz Jaszczyk			d-cache-size = <0x8000>;
2930d53abdSGrzegorz Jaszczyk			d-cache-line-size = <64>;
3030d53abdSGrzegorz Jaszczyk			d-cache-sets = <256>;
3130d53abdSGrzegorz Jaszczyk			next-level-cache = <&l2_0>;
32cbafcad0SMiquel Raynal		};
33cbafcad0SMiquel Raynal		cpu1: cpu@1 {
34cbafcad0SMiquel Raynal			device_type = "cpu";
35d136d258SAmit Kucheria			compatible = "arm,cortex-a72";
36cbafcad0SMiquel Raynal			reg = <0x001>;
37cbafcad0SMiquel Raynal			enable-method = "psci";
38cbafcad0SMiquel Raynal			#cooling-cells = <2>;
39cbafcad0SMiquel Raynal			clocks = <&cpu_clk 0>;
4030d53abdSGrzegorz Jaszczyk			i-cache-size = <0xc000>;
4130d53abdSGrzegorz Jaszczyk			i-cache-line-size = <64>;
4230d53abdSGrzegorz Jaszczyk			i-cache-sets = <256>;
4330d53abdSGrzegorz Jaszczyk			d-cache-size = <0x8000>;
4430d53abdSGrzegorz Jaszczyk			d-cache-line-size = <64>;
4530d53abdSGrzegorz Jaszczyk			d-cache-sets = <256>;
4630d53abdSGrzegorz Jaszczyk			next-level-cache = <&l2_0>;
47cbafcad0SMiquel Raynal		};
48cbafcad0SMiquel Raynal		cpu2: cpu@100 {
49cbafcad0SMiquel Raynal			device_type = "cpu";
50d136d258SAmit Kucheria			compatible = "arm,cortex-a72";
51cbafcad0SMiquel Raynal			reg = <0x100>;
52cbafcad0SMiquel Raynal			enable-method = "psci";
53cbafcad0SMiquel Raynal			#cooling-cells = <2>;
54cbafcad0SMiquel Raynal			clocks = <&cpu_clk 1>;
5530d53abdSGrzegorz Jaszczyk			i-cache-size = <0xc000>;
5630d53abdSGrzegorz Jaszczyk			i-cache-line-size = <64>;
5730d53abdSGrzegorz Jaszczyk			i-cache-sets = <256>;
5830d53abdSGrzegorz Jaszczyk			d-cache-size = <0x8000>;
5930d53abdSGrzegorz Jaszczyk			d-cache-line-size = <64>;
6030d53abdSGrzegorz Jaszczyk			d-cache-sets = <256>;
6130d53abdSGrzegorz Jaszczyk			next-level-cache = <&l2_1>;
62cbafcad0SMiquel Raynal		};
63cbafcad0SMiquel Raynal		cpu3: cpu@101 {
64cbafcad0SMiquel Raynal			device_type = "cpu";
65d136d258SAmit Kucheria			compatible = "arm,cortex-a72";
66cbafcad0SMiquel Raynal			reg = <0x101>;
67cbafcad0SMiquel Raynal			enable-method = "psci";
68cbafcad0SMiquel Raynal			#cooling-cells = <2>;
69cbafcad0SMiquel Raynal			clocks = <&cpu_clk 1>;
7030d53abdSGrzegorz Jaszczyk			i-cache-size = <0xc000>;
7130d53abdSGrzegorz Jaszczyk			i-cache-line-size = <64>;
7230d53abdSGrzegorz Jaszczyk			i-cache-sets = <256>;
7330d53abdSGrzegorz Jaszczyk			d-cache-size = <0x8000>;
7430d53abdSGrzegorz Jaszczyk			d-cache-line-size = <64>;
7530d53abdSGrzegorz Jaszczyk			d-cache-sets = <256>;
7630d53abdSGrzegorz Jaszczyk			next-level-cache = <&l2_1>;
7730d53abdSGrzegorz Jaszczyk		};
7830d53abdSGrzegorz Jaszczyk
7930d53abdSGrzegorz Jaszczyk		l2_0: l2-cache0 {
8030d53abdSGrzegorz Jaszczyk			compatible = "cache";
8130d53abdSGrzegorz Jaszczyk			cache-size = <0x80000>;
8230d53abdSGrzegorz Jaszczyk			cache-line-size = <64>;
8330d53abdSGrzegorz Jaszczyk			cache-sets = <512>;
84b5d971cfSPierre Gondois			cache-level = <2>;
85*ae1c0d6eSKrzysztof Kozlowski			cache-unified;
8630d53abdSGrzegorz Jaszczyk		};
8730d53abdSGrzegorz Jaszczyk
8830d53abdSGrzegorz Jaszczyk		l2_1: l2-cache1 {
8930d53abdSGrzegorz Jaszczyk			compatible = "cache";
9030d53abdSGrzegorz Jaszczyk			cache-size = <0x80000>;
9130d53abdSGrzegorz Jaszczyk			cache-line-size = <64>;
9230d53abdSGrzegorz Jaszczyk			cache-sets = <512>;
93b5d971cfSPierre Gondois			cache-level = <2>;
94*ae1c0d6eSKrzysztof Kozlowski			cache-unified;
95cbafcad0SMiquel Raynal		};
96cbafcad0SMiquel Raynal	};
97cbafcad0SMiquel Raynal};
98