1*6a0abce4SKuninori Morimoto /* SPDX-License-Identifier: GPL-2.0 */ 27639a454SPaul Mundt #ifndef __ASM_SH_RENESAS_SDK7780_H 37639a454SPaul Mundt #define __ASM_SH_RENESAS_SDK7780_H 47639a454SPaul Mundt 57639a454SPaul Mundt /* 67639a454SPaul Mundt * linux/include/asm-sh/sdk7780.h 77639a454SPaul Mundt * 87639a454SPaul Mundt * Renesas Solutions SH7780 SDK Support 97639a454SPaul Mundt * Copyright (C) 2008 Nicholas Beck <nbeck@mpc-data.co.uk> 107639a454SPaul Mundt */ 11d66bd5f1SPaul Mundt #include <linux/sh_intc.h> 127639a454SPaul Mundt #include <asm/addrspace.h> 137639a454SPaul Mundt 147639a454SPaul Mundt /* Box specific addresses. */ 157639a454SPaul Mundt #define SE_AREA0_WIDTH 4 /* Area0: 32bit */ 167639a454SPaul Mundt #define PA_ROM 0xa0000000 /* EPROM */ 177639a454SPaul Mundt #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ 187639a454SPaul Mundt #define PA_FROM 0xa0800000 /* Flash-ROM */ 197639a454SPaul Mundt #define PA_FROM_SIZE 0x00400000 /* Flash-ROM size 4M byte */ 207639a454SPaul Mundt #define PA_EXT1 0xa4000000 217639a454SPaul Mundt #define PA_EXT1_SIZE 0x04000000 227639a454SPaul Mundt #define PA_SDRAM 0xa8000000 /* DDR-SDRAM(Area2/3) 128MB */ 237639a454SPaul Mundt #define PA_SDRAM_SIZE 0x08000000 247639a454SPaul Mundt 257639a454SPaul Mundt #define PA_EXT4 0xb0000000 267639a454SPaul Mundt #define PA_EXT4_SIZE 0x04000000 277639a454SPaul Mundt #define PA_EXT_USER PA_EXT4 /* User Expansion Space */ 287639a454SPaul Mundt 297639a454SPaul Mundt #define PA_PERIPHERAL PA_AREA5_IO 307639a454SPaul Mundt 317639a454SPaul Mundt /* SRAM/Reserved */ 327639a454SPaul Mundt #define PA_RESERVED (PA_PERIPHERAL + 0) 337639a454SPaul Mundt /* FPGA base address */ 347639a454SPaul Mundt #define PA_FPGA (PA_PERIPHERAL + 0x01000000) 357639a454SPaul Mundt /* SMC LAN91C111 */ 367639a454SPaul Mundt #define PA_LAN (PA_PERIPHERAL + 0x01800000) 377639a454SPaul Mundt 387639a454SPaul Mundt 397639a454SPaul Mundt #define FPGA_SRSTR (PA_FPGA + 0x000) /* System reset */ 407639a454SPaul Mundt #define FPGA_IRQ0SR (PA_FPGA + 0x010) /* IRQ0 status */ 417639a454SPaul Mundt #define FPGA_IRQ0MR (PA_FPGA + 0x020) /* IRQ0 mask */ 427639a454SPaul Mundt #define FPGA_BDMR (PA_FPGA + 0x030) /* Board operating mode */ 437639a454SPaul Mundt #define FPGA_INTT0PRTR (PA_FPGA + 0x040) /* Interrupt test mode0 port */ 447639a454SPaul Mundt #define FPGA_INTT0SELR (PA_FPGA + 0x050) /* Int. test mode0 select */ 457639a454SPaul Mundt #define FPGA_INTT1POLR (PA_FPGA + 0x060) /* Int. test mode0 polarity */ 467639a454SPaul Mundt #define FPGA_NMIR (PA_FPGA + 0x070) /* NMI source */ 477639a454SPaul Mundt #define FPGA_NMIMR (PA_FPGA + 0x080) /* NMI mask */ 487639a454SPaul Mundt #define FPGA_IRQR (PA_FPGA + 0x090) /* IRQX source */ 497639a454SPaul Mundt #define FPGA_IRQMR (PA_FPGA + 0x0A0) /* IRQX mask */ 507639a454SPaul Mundt #define FPGA_SLEDR (PA_FPGA + 0x0B0) /* LED control */ 517639a454SPaul Mundt #define PA_LED FPGA_SLEDR 527639a454SPaul Mundt #define FPGA_MAPSWR (PA_FPGA + 0x0C0) /* Map switch */ 537639a454SPaul Mundt #define FPGA_FPVERR (PA_FPGA + 0x0D0) /* FPGA version */ 547639a454SPaul Mundt #define FPGA_FPDATER (PA_FPGA + 0x0E0) /* FPGA date */ 557639a454SPaul Mundt #define FPGA_RSE (PA_FPGA + 0x100) /* Reset source */ 567639a454SPaul Mundt #define FPGA_EASR (PA_FPGA + 0x110) /* External area select */ 577639a454SPaul Mundt #define FPGA_SPER (PA_FPGA + 0x120) /* Serial port enable */ 587639a454SPaul Mundt #define FPGA_IMSR (PA_FPGA + 0x130) /* Interrupt mode select */ 597639a454SPaul Mundt #define FPGA_PCIMR (PA_FPGA + 0x140) /* PCI Mode */ 607639a454SPaul Mundt #define FPGA_DIPSWMR (PA_FPGA + 0x150) /* DIPSW monitor */ 617639a454SPaul Mundt #define FPGA_FPODR (PA_FPGA + 0x160) /* Output port data */ 627639a454SPaul Mundt #define FPGA_ATAESR (PA_FPGA + 0x170) /* ATA extended bus status */ 637639a454SPaul Mundt #define FPGA_IRQPOLR (PA_FPGA + 0x180) /* IRQx polarity */ 647639a454SPaul Mundt 657639a454SPaul Mundt 667639a454SPaul Mundt #define SDK7780_NR_IRL 15 677639a454SPaul Mundt /* IDE/ATA interrupt */ 68d66bd5f1SPaul Mundt #define IRQ_CFCARD evt2irq(0x3c0) 697639a454SPaul Mundt /* SMC interrupt */ 70d66bd5f1SPaul Mundt #define IRQ_ETHERNET evt2irq(0x2c0) 717639a454SPaul Mundt 727639a454SPaul Mundt 737639a454SPaul Mundt /* arch/sh/boards/renesas/sdk7780/irq.c */ 747639a454SPaul Mundt void init_sdk7780_IRQ(void); 757639a454SPaul Mundt 767639a454SPaul Mundt #define __IO_PREFIX sdk7780 777639a454SPaul Mundt #include <asm/io_generic.h> 787639a454SPaul Mundt 797639a454SPaul Mundt #endif /* __ASM_SH_RENESAS_SDK7780_H */ 80