xref: /linux/drivers/crypto/nx/nx-sha256.c (revision d3111493)
1 /**
2  * SHA-256 routines supporting the Power 7+ Nest Accelerators driver
3  *
4  * Copyright (C) 2011-2012 International Business Machines Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; version 2 only.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18  *
19  * Author: Kent Yoder <yoder1@us.ibm.com>
20  */
21 
22 #include <crypto/internal/hash.h>
23 #include <crypto/sha.h>
24 #include <linux/module.h>
25 #include <asm/vio.h>
26 
27 #include "nx_csbcpb.h"
28 #include "nx.h"
29 
30 
31 static int nx_sha256_init(struct shash_desc *desc)
32 {
33 	struct sha256_state *sctx = shash_desc_ctx(desc);
34 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base);
35 	struct nx_sg *out_sg;
36 
37 	nx_ctx_init(nx_ctx, HCOP_FC_SHA);
38 
39 	memset(sctx, 0, sizeof *sctx);
40 
41 	nx_ctx->ap = &nx_ctx->props[NX_PROPS_SHA256];
42 
43 	NX_CPB_SET_DIGEST_SIZE(nx_ctx->csbcpb, NX_DS_SHA256);
44 	out_sg = nx_build_sg_list(nx_ctx->out_sg, (u8 *)sctx->state,
45 				  SHA256_DIGEST_SIZE, nx_ctx->ap->sglen);
46 	nx_ctx->op.outlen = (nx_ctx->out_sg - out_sg) * sizeof(struct nx_sg);
47 
48 	return 0;
49 }
50 
51 static int nx_sha256_update(struct shash_desc *desc, const u8 *data,
52 			    unsigned int len)
53 {
54 	struct sha256_state *sctx = shash_desc_ctx(desc);
55 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base);
56 	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx->csbcpb;
57 	struct nx_sg *in_sg;
58 	u64 to_process, leftover, total;
59 	u32 max_sg_len;
60 	int rc = 0;
61 
62 	/* 2 cases for total data len:
63 	 *  1: < SHA256_BLOCK_SIZE: copy into state, return 0
64 	 *  2: >= SHA256_BLOCK_SIZE: process X blocks, copy in leftover
65 	 */
66 	total = sctx->count + len;
67 	if (total < SHA256_BLOCK_SIZE) {
68 		memcpy(sctx->buf + sctx->count, data, len);
69 		sctx->count += len;
70 		goto out;
71 	}
72 
73 	in_sg = nx_ctx->in_sg;
74 	max_sg_len = min_t(u32, nx_driver.of.max_sg_len/sizeof(struct nx_sg),
75 			   nx_ctx->ap->sglen);
76 
77 	do {
78 		/*
79 		 * to_process: the SHA256_BLOCK_SIZE data chunk to process in
80 		 * this update. This value is also restricted by the sg list
81 		 * limits.
82 		 */
83 		to_process = min_t(u64, total, nx_ctx->ap->databytelen);
84 		to_process = min_t(u64, to_process,
85 				   NX_PAGE_SIZE * (max_sg_len - 1));
86 		to_process = to_process & ~(SHA256_BLOCK_SIZE - 1);
87 		leftover = total - to_process;
88 
89 		if (sctx->count) {
90 			in_sg = nx_build_sg_list(nx_ctx->in_sg,
91 						 (u8 *) sctx->buf,
92 						 sctx->count, max_sg_len);
93 		}
94 		in_sg = nx_build_sg_list(in_sg, (u8 *) data,
95 					 to_process - sctx->count,
96 					 max_sg_len);
97 		nx_ctx->op.inlen = (nx_ctx->in_sg - in_sg) *
98 					sizeof(struct nx_sg);
99 
100 		if (NX_CPB_FDM(csbcpb) & NX_FDM_CONTINUATION) {
101 			/*
102 			 * we've hit the nx chip previously and we're updating
103 			 * again, so copy over the partial digest.
104 			 */
105 			memcpy(csbcpb->cpb.sha256.input_partial_digest,
106 			       csbcpb->cpb.sha256.message_digest,
107 			       SHA256_DIGEST_SIZE);
108 		}
109 
110 		NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;
111 		if (!nx_ctx->op.inlen || !nx_ctx->op.outlen) {
112 			rc = -EINVAL;
113 			goto out;
114 		}
115 
116 		rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
117 				   desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP);
118 		if (rc)
119 			goto out;
120 
121 		atomic_inc(&(nx_ctx->stats->sha256_ops));
122 		csbcpb->cpb.sha256.message_bit_length += (u64)
123 			(csbcpb->cpb.sha256.spbc * 8);
124 
125 		/* everything after the first update is continuation */
126 		NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;
127 
128 		total -= to_process;
129 		data += to_process;
130 		sctx->count = 0;
131 		in_sg = nx_ctx->in_sg;
132 	} while (leftover >= SHA256_BLOCK_SIZE);
133 
134 	/* copy the leftover back into the state struct */
135 	if (leftover)
136 		memcpy(sctx->buf, data, leftover);
137 	sctx->count = leftover;
138 out:
139 	return rc;
140 }
141 
142 static int nx_sha256_final(struct shash_desc *desc, u8 *out)
143 {
144 	struct sha256_state *sctx = shash_desc_ctx(desc);
145 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base);
146 	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx->csbcpb;
147 	struct nx_sg *in_sg, *out_sg;
148 	u32 max_sg_len;
149 	int rc;
150 
151 	max_sg_len = min_t(u32, nx_driver.of.max_sg_len, nx_ctx->ap->sglen);
152 
153 	if (NX_CPB_FDM(csbcpb) & NX_FDM_CONTINUATION) {
154 		/* we've hit the nx chip previously, now we're finalizing,
155 		 * so copy over the partial digest */
156 		memcpy(csbcpb->cpb.sha256.input_partial_digest,
157 		       csbcpb->cpb.sha256.message_digest, SHA256_DIGEST_SIZE);
158 	}
159 
160 	/* final is represented by continuing the operation and indicating that
161 	 * this is not an intermediate operation */
162 	NX_CPB_FDM(csbcpb) &= ~NX_FDM_INTERMEDIATE;
163 
164 	csbcpb->cpb.sha256.message_bit_length += (u64)(sctx->count * 8);
165 
166 	in_sg = nx_build_sg_list(nx_ctx->in_sg, (u8 *)sctx->buf,
167 				 sctx->count, max_sg_len);
168 	out_sg = nx_build_sg_list(nx_ctx->out_sg, out, SHA256_DIGEST_SIZE,
169 				  max_sg_len);
170 	nx_ctx->op.inlen = (nx_ctx->in_sg - in_sg) * sizeof(struct nx_sg);
171 	nx_ctx->op.outlen = (nx_ctx->out_sg - out_sg) * sizeof(struct nx_sg);
172 
173 	if (!nx_ctx->op.outlen) {
174 		rc = -EINVAL;
175 		goto out;
176 	}
177 
178 	rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
179 			   desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP);
180 	if (rc)
181 		goto out;
182 
183 	atomic_inc(&(nx_ctx->stats->sha256_ops));
184 
185 	atomic64_add(csbcpb->cpb.sha256.message_bit_length / 8,
186 		     &(nx_ctx->stats->sha256_bytes));
187 	memcpy(out, csbcpb->cpb.sha256.message_digest, SHA256_DIGEST_SIZE);
188 out:
189 	return rc;
190 }
191 
192 static int nx_sha256_export(struct shash_desc *desc, void *out)
193 {
194 	struct sha256_state *sctx = shash_desc_ctx(desc);
195 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base);
196 	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx->csbcpb;
197 	struct sha256_state *octx = out;
198 
199 	octx->count = sctx->count +
200 		      (csbcpb->cpb.sha256.message_bit_length / 8);
201 	memcpy(octx->buf, sctx->buf, sizeof(octx->buf));
202 
203 	/* if no data has been processed yet, we need to export SHA256's
204 	 * initial data, in case this context gets imported into a software
205 	 * context */
206 	if (csbcpb->cpb.sha256.message_bit_length)
207 		memcpy(octx->state, csbcpb->cpb.sha256.message_digest,
208 		       SHA256_DIGEST_SIZE);
209 	else {
210 		octx->state[0] = SHA256_H0;
211 		octx->state[1] = SHA256_H1;
212 		octx->state[2] = SHA256_H2;
213 		octx->state[3] = SHA256_H3;
214 		octx->state[4] = SHA256_H4;
215 		octx->state[5] = SHA256_H5;
216 		octx->state[6] = SHA256_H6;
217 		octx->state[7] = SHA256_H7;
218 	}
219 
220 	return 0;
221 }
222 
223 static int nx_sha256_import(struct shash_desc *desc, const void *in)
224 {
225 	struct sha256_state *sctx = shash_desc_ctx(desc);
226 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base);
227 	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx->csbcpb;
228 	const struct sha256_state *ictx = in;
229 
230 	memcpy(sctx->buf, ictx->buf, sizeof(ictx->buf));
231 
232 	sctx->count = ictx->count & 0x3f;
233 	csbcpb->cpb.sha256.message_bit_length = (ictx->count & ~0x3f) * 8;
234 
235 	if (csbcpb->cpb.sha256.message_bit_length) {
236 		memcpy(csbcpb->cpb.sha256.message_digest, ictx->state,
237 		       SHA256_DIGEST_SIZE);
238 
239 		NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;
240 		NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;
241 	}
242 
243 	return 0;
244 }
245 
246 struct shash_alg nx_shash_sha256_alg = {
247 	.digestsize = SHA256_DIGEST_SIZE,
248 	.init       = nx_sha256_init,
249 	.update     = nx_sha256_update,
250 	.final      = nx_sha256_final,
251 	.export     = nx_sha256_export,
252 	.import     = nx_sha256_import,
253 	.descsize   = sizeof(struct sha256_state),
254 	.statesize  = sizeof(struct sha256_state),
255 	.base       = {
256 		.cra_name        = "sha256",
257 		.cra_driver_name = "sha256-nx",
258 		.cra_priority    = 300,
259 		.cra_flags       = CRYPTO_ALG_TYPE_SHASH,
260 		.cra_blocksize   = SHA256_BLOCK_SIZE,
261 		.cra_module      = THIS_MODULE,
262 		.cra_ctxsize     = sizeof(struct nx_crypto_ctx),
263 		.cra_init        = nx_crypto_ctx_sha_init,
264 		.cra_exit        = nx_crypto_ctx_exit,
265 	}
266 };
267