1 // SPDX-License-Identifier: GPL-2.0 2 /* Microchip LAN937X switch driver main logic 3 * Copyright (C) 2019-2022 Microchip Technology Inc. 4 */ 5 #include <linux/kernel.h> 6 #include <linux/module.h> 7 #include <linux/iopoll.h> 8 #include <linux/phy.h> 9 #include <linux/of_net.h> 10 #include <linux/of_mdio.h> 11 #include <linux/if_bridge.h> 12 #include <linux/if_vlan.h> 13 #include <linux/irq.h> 14 #include <linux/irqdomain.h> 15 #include <linux/math.h> 16 #include <net/dsa.h> 17 #include <net/switchdev.h> 18 19 #include "lan937x_reg.h" 20 #include "ksz_common.h" 21 #include "lan937x.h" 22 23 #define LAN937x_PNIRQS 6 24 25 static int lan937x_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set) 26 { 27 return regmap_update_bits(dev->regmap[0], addr, bits, set ? bits : 0); 28 } 29 30 static int lan937x_port_cfg(struct ksz_device *dev, int port, int offset, 31 u8 bits, bool set) 32 { 33 return regmap_update_bits(dev->regmap[0], PORT_CTRL_ADDR(port, offset), 34 bits, set ? bits : 0); 35 } 36 37 static int lan937x_enable_spi_indirect_access(struct ksz_device *dev) 38 { 39 u16 data16; 40 int ret; 41 42 /* Enable Phy access through SPI */ 43 ret = lan937x_cfg(dev, REG_GLOBAL_CTRL_0, SW_PHY_REG_BLOCK, false); 44 if (ret < 0) 45 return ret; 46 47 ret = ksz_read16(dev, REG_VPHY_SPECIAL_CTRL__2, &data16); 48 if (ret < 0) 49 return ret; 50 51 /* Allow SPI access */ 52 data16 |= VPHY_SPI_INDIRECT_ENABLE; 53 54 return ksz_write16(dev, REG_VPHY_SPECIAL_CTRL__2, data16); 55 } 56 57 static int lan937x_vphy_ind_addr_wr(struct ksz_device *dev, int addr, int reg) 58 { 59 u16 addr_base = REG_PORT_T1_PHY_CTRL_BASE; 60 u16 temp; 61 62 /* get register address based on the logical port */ 63 temp = PORT_CTRL_ADDR(addr, (addr_base + (reg << 2))); 64 65 return ksz_write16(dev, REG_VPHY_IND_ADDR__2, temp); 66 } 67 68 static int lan937x_internal_phy_write(struct ksz_device *dev, int addr, int reg, 69 u16 val) 70 { 71 unsigned int value; 72 int ret; 73 74 /* Check for internal phy port */ 75 if (!dev->info->internal_phy[addr]) 76 return -EOPNOTSUPP; 77 78 ret = lan937x_vphy_ind_addr_wr(dev, addr, reg); 79 if (ret < 0) 80 return ret; 81 82 /* Write the data to be written to the VPHY reg */ 83 ret = ksz_write16(dev, REG_VPHY_IND_DATA__2, val); 84 if (ret < 0) 85 return ret; 86 87 /* Write the Write En and Busy bit */ 88 ret = ksz_write16(dev, REG_VPHY_IND_CTRL__2, 89 (VPHY_IND_WRITE | VPHY_IND_BUSY)); 90 if (ret < 0) 91 return ret; 92 93 ret = regmap_read_poll_timeout(dev->regmap[1], REG_VPHY_IND_CTRL__2, 94 value, !(value & VPHY_IND_BUSY), 10, 95 1000); 96 if (ret < 0) { 97 dev_err(dev->dev, "Failed to write phy register\n"); 98 return ret; 99 } 100 101 return 0; 102 } 103 104 static int lan937x_internal_phy_read(struct ksz_device *dev, int addr, int reg, 105 u16 *val) 106 { 107 unsigned int value; 108 int ret; 109 110 /* Check for internal phy port, return 0xffff for non-existent phy */ 111 if (!dev->info->internal_phy[addr]) 112 return 0xffff; 113 114 ret = lan937x_vphy_ind_addr_wr(dev, addr, reg); 115 if (ret < 0) 116 return ret; 117 118 /* Write Read and Busy bit to start the transaction */ 119 ret = ksz_write16(dev, REG_VPHY_IND_CTRL__2, VPHY_IND_BUSY); 120 if (ret < 0) 121 return ret; 122 123 ret = regmap_read_poll_timeout(dev->regmap[1], REG_VPHY_IND_CTRL__2, 124 value, !(value & VPHY_IND_BUSY), 10, 125 1000); 126 if (ret < 0) { 127 dev_err(dev->dev, "Failed to read phy register\n"); 128 return ret; 129 } 130 131 /* Read the VPHY register which has the PHY data */ 132 return ksz_read16(dev, REG_VPHY_IND_DATA__2, val); 133 } 134 135 int lan937x_r_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 *data) 136 { 137 return lan937x_internal_phy_read(dev, addr, reg, data); 138 } 139 140 int lan937x_w_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 val) 141 { 142 return lan937x_internal_phy_write(dev, addr, reg, val); 143 } 144 145 static int lan937x_sw_mdio_read(struct mii_bus *bus, int addr, int regnum) 146 { 147 struct ksz_device *dev = bus->priv; 148 u16 val; 149 int ret; 150 151 if (regnum & MII_ADDR_C45) 152 return -EOPNOTSUPP; 153 154 ret = lan937x_internal_phy_read(dev, addr, regnum, &val); 155 if (ret < 0) 156 return ret; 157 158 return val; 159 } 160 161 static int lan937x_sw_mdio_write(struct mii_bus *bus, int addr, int regnum, 162 u16 val) 163 { 164 struct ksz_device *dev = bus->priv; 165 166 if (regnum & MII_ADDR_C45) 167 return -EOPNOTSUPP; 168 169 return lan937x_internal_phy_write(dev, addr, regnum, val); 170 } 171 172 static int lan937x_irq_phy_setup(struct ksz_device *dev) 173 { 174 struct dsa_switch *ds = dev->ds; 175 int phy, err_phy; 176 int irq; 177 int ret; 178 179 for (phy = 0; phy < KSZ_MAX_NUM_PORTS; phy++) { 180 if (BIT(phy) & ds->phys_mii_mask) { 181 irq = irq_find_mapping(dev->ports[phy].pirq.domain, 182 PORT_SRC_PHY_INT); 183 if (irq < 0) { 184 ret = irq; 185 goto out; 186 } 187 ds->slave_mii_bus->irq[phy] = irq; 188 } 189 } 190 return 0; 191 out: 192 err_phy = phy; 193 194 for (phy = 0; phy < err_phy; phy++) 195 if (BIT(phy) & ds->phys_mii_mask) 196 irq_dispose_mapping(ds->slave_mii_bus->irq[phy]); 197 198 return ret; 199 } 200 201 static void lan937x_irq_phy_free(struct ksz_device *dev) 202 { 203 struct dsa_switch *ds = dev->ds; 204 int phy; 205 206 for (phy = 0; phy < KSZ_MAX_NUM_PORTS; phy++) 207 if (BIT(phy) & ds->phys_mii_mask) 208 irq_dispose_mapping(ds->slave_mii_bus->irq[phy]); 209 } 210 211 static int lan937x_mdio_register(struct ksz_device *dev) 212 { 213 struct dsa_switch *ds = dev->ds; 214 struct device_node *mdio_np; 215 struct mii_bus *bus; 216 int ret; 217 218 mdio_np = of_get_child_by_name(dev->dev->of_node, "mdio"); 219 if (!mdio_np) { 220 dev_err(ds->dev, "no MDIO bus node\n"); 221 return -ENODEV; 222 } 223 224 bus = devm_mdiobus_alloc(ds->dev); 225 if (!bus) { 226 of_node_put(mdio_np); 227 return -ENOMEM; 228 } 229 230 bus->priv = dev; 231 bus->read = lan937x_sw_mdio_read; 232 bus->write = lan937x_sw_mdio_write; 233 bus->name = "lan937x slave smi"; 234 snprintf(bus->id, MII_BUS_ID_SIZE, "SMI-%d", ds->index); 235 bus->parent = ds->dev; 236 bus->phy_mask = ~ds->phys_mii_mask; 237 238 ds->slave_mii_bus = bus; 239 240 ret = lan937x_irq_phy_setup(dev); 241 if (ret) { 242 of_node_put(mdio_np); 243 return ret; 244 } 245 246 ret = devm_of_mdiobus_register(ds->dev, bus, mdio_np); 247 if (ret) { 248 dev_err(ds->dev, "unable to register MDIO bus %s\n", 249 bus->id); 250 lan937x_irq_phy_free(dev); 251 } 252 253 of_node_put(mdio_np); 254 255 return ret; 256 } 257 258 int lan937x_reset_switch(struct ksz_device *dev) 259 { 260 u32 data32; 261 int ret; 262 263 /* reset switch */ 264 ret = lan937x_cfg(dev, REG_SW_OPERATION, SW_RESET, true); 265 if (ret < 0) 266 return ret; 267 268 /* Enable Auto Aging */ 269 ret = lan937x_cfg(dev, REG_SW_LUE_CTRL_1, SW_LINK_AUTO_AGING, true); 270 if (ret < 0) 271 return ret; 272 273 /* disable interrupts */ 274 ret = ksz_write32(dev, REG_SW_INT_MASK__4, SWITCH_INT_MASK); 275 if (ret < 0) 276 return ret; 277 278 ret = ksz_write32(dev, REG_SW_INT_STATUS__4, POR_READY_INT); 279 if (ret < 0) 280 return ret; 281 282 ret = ksz_write32(dev, REG_SW_PORT_INT_MASK__4, 0xFF); 283 if (ret < 0) 284 return ret; 285 286 return ksz_read32(dev, REG_SW_PORT_INT_STATUS__4, &data32); 287 } 288 289 void lan937x_port_setup(struct ksz_device *dev, int port, bool cpu_port) 290 { 291 const u32 *masks = dev->info->masks; 292 const u16 *regs = dev->info->regs; 293 struct dsa_switch *ds = dev->ds; 294 u8 member; 295 296 /* enable tag tail for host port */ 297 if (cpu_port) 298 lan937x_port_cfg(dev, port, REG_PORT_CTRL_0, 299 PORT_TAIL_TAG_ENABLE, true); 300 301 /* disable frame check length field */ 302 lan937x_port_cfg(dev, port, REG_PORT_MAC_CTRL_0, PORT_CHECK_LENGTH, 303 false); 304 305 /* set back pressure for half duplex */ 306 lan937x_port_cfg(dev, port, REG_PORT_MAC_CTRL_1, PORT_BACK_PRESSURE, 307 true); 308 309 /* enable 802.1p priority */ 310 lan937x_port_cfg(dev, port, P_PRIO_CTRL, PORT_802_1P_PRIO_ENABLE, true); 311 312 if (!dev->info->internal_phy[port]) 313 lan937x_port_cfg(dev, port, regs[P_XMII_CTRL_0], 314 masks[P_MII_TX_FLOW_CTRL] | 315 masks[P_MII_RX_FLOW_CTRL], 316 true); 317 318 if (cpu_port) 319 member = dsa_user_ports(ds); 320 else 321 member = BIT(dsa_upstream_port(ds, port)); 322 323 dev->dev_ops->cfg_port_member(dev, port, member); 324 } 325 326 void lan937x_config_cpu_port(struct dsa_switch *ds) 327 { 328 struct ksz_device *dev = ds->priv; 329 struct dsa_port *dp; 330 331 dsa_switch_for_each_cpu_port(dp, ds) { 332 if (dev->info->cpu_ports & (1 << dp->index)) { 333 dev->cpu_port = dp->index; 334 335 /* enable cpu port */ 336 lan937x_port_setup(dev, dp->index, true); 337 } 338 } 339 340 dsa_switch_for_each_user_port(dp, ds) { 341 ksz_port_stp_state_set(ds, dp->index, BR_STATE_DISABLED); 342 } 343 } 344 345 int lan937x_change_mtu(struct ksz_device *dev, int port, int new_mtu) 346 { 347 struct dsa_switch *ds = dev->ds; 348 int ret; 349 350 new_mtu += VLAN_ETH_HLEN + ETH_FCS_LEN; 351 352 if (dsa_is_cpu_port(ds, port)) 353 new_mtu += LAN937X_TAG_LEN; 354 355 if (new_mtu >= FR_MIN_SIZE) 356 ret = lan937x_port_cfg(dev, port, REG_PORT_MAC_CTRL_0, 357 PORT_JUMBO_PACKET, true); 358 else 359 ret = lan937x_port_cfg(dev, port, REG_PORT_MAC_CTRL_0, 360 PORT_JUMBO_PACKET, false); 361 if (ret < 0) { 362 dev_err(ds->dev, "failed to enable jumbo\n"); 363 return ret; 364 } 365 366 /* Write the frame size in PORT_MAX_FR_SIZE register */ 367 ksz_pwrite16(dev, port, PORT_MAX_FR_SIZE, new_mtu); 368 369 return 0; 370 } 371 372 int lan937x_set_ageing_time(struct ksz_device *dev, unsigned int msecs) 373 { 374 u32 secs = msecs / 1000; 375 u32 value; 376 int ret; 377 378 value = FIELD_GET(SW_AGE_PERIOD_7_0_M, secs); 379 380 ret = ksz_write8(dev, REG_SW_AGE_PERIOD__1, value); 381 if (ret < 0) 382 return ret; 383 384 value = FIELD_GET(SW_AGE_PERIOD_19_8_M, secs); 385 386 return ksz_write16(dev, REG_SW_AGE_PERIOD__2, value); 387 } 388 389 static void lan937x_set_tune_adj(struct ksz_device *dev, int port, 390 u16 reg, u8 val) 391 { 392 u16 data16; 393 394 ksz_pread16(dev, port, reg, &data16); 395 396 /* Update tune Adjust */ 397 data16 |= FIELD_PREP(PORT_TUNE_ADJ, val); 398 ksz_pwrite16(dev, port, reg, data16); 399 400 /* write DLL reset to take effect */ 401 data16 |= PORT_DLL_RESET; 402 ksz_pwrite16(dev, port, reg, data16); 403 } 404 405 static void lan937x_set_rgmii_tx_delay(struct ksz_device *dev, int port) 406 { 407 u8 val; 408 409 /* Apply different codes based on the ports as per characterization 410 * results 411 */ 412 val = (port == LAN937X_RGMII_1_PORT) ? RGMII_1_TX_DELAY_2NS : 413 RGMII_2_TX_DELAY_2NS; 414 415 lan937x_set_tune_adj(dev, port, REG_PORT_XMII_CTRL_5, val); 416 } 417 418 static void lan937x_set_rgmii_rx_delay(struct ksz_device *dev, int port) 419 { 420 u8 val; 421 422 val = (port == LAN937X_RGMII_1_PORT) ? RGMII_1_RX_DELAY_2NS : 423 RGMII_2_RX_DELAY_2NS; 424 425 lan937x_set_tune_adj(dev, port, REG_PORT_XMII_CTRL_4, val); 426 } 427 428 void lan937x_phylink_get_caps(struct ksz_device *dev, int port, 429 struct phylink_config *config) 430 { 431 config->mac_capabilities = MAC_100FD; 432 433 if (dev->info->supports_rgmii[port]) { 434 /* MII/RMII/RGMII ports */ 435 config->mac_capabilities |= MAC_ASYM_PAUSE | MAC_SYM_PAUSE | 436 MAC_100HD | MAC_10 | MAC_1000FD; 437 } 438 } 439 440 void lan937x_setup_rgmii_delay(struct ksz_device *dev, int port) 441 { 442 struct ksz_port *p = &dev->ports[port]; 443 444 if (p->rgmii_tx_val) { 445 lan937x_set_rgmii_tx_delay(dev, port); 446 dev_info(dev->dev, "Applied rgmii tx delay for the port %d\n", 447 port); 448 } 449 450 if (p->rgmii_rx_val) { 451 lan937x_set_rgmii_rx_delay(dev, port); 452 dev_info(dev->dev, "Applied rgmii rx delay for the port %d\n", 453 port); 454 } 455 } 456 457 int lan937x_switch_init(struct ksz_device *dev) 458 { 459 dev->port_mask = (1 << dev->info->port_cnt) - 1; 460 461 return 0; 462 } 463 464 static void lan937x_girq_mask(struct irq_data *d) 465 { 466 struct ksz_device *dev = irq_data_get_irq_chip_data(d); 467 unsigned int n = d->hwirq; 468 469 dev->girq.masked |= (1 << n); 470 } 471 472 static void lan937x_girq_unmask(struct irq_data *d) 473 { 474 struct ksz_device *dev = irq_data_get_irq_chip_data(d); 475 unsigned int n = d->hwirq; 476 477 dev->girq.masked &= ~(1 << n); 478 } 479 480 static void lan937x_girq_bus_lock(struct irq_data *d) 481 { 482 struct ksz_device *dev = irq_data_get_irq_chip_data(d); 483 484 mutex_lock(&dev->lock_irq); 485 } 486 487 static void lan937x_girq_bus_sync_unlock(struct irq_data *d) 488 { 489 struct ksz_device *dev = irq_data_get_irq_chip_data(d); 490 int ret; 491 492 ret = ksz_write32(dev, REG_SW_PORT_INT_MASK__4, dev->girq.masked); 493 if (ret) 494 dev_err(dev->dev, "failed to change IRQ mask\n"); 495 496 mutex_unlock(&dev->lock_irq); 497 } 498 499 static const struct irq_chip lan937x_girq_chip = { 500 .name = "lan937x-global", 501 .irq_mask = lan937x_girq_mask, 502 .irq_unmask = lan937x_girq_unmask, 503 .irq_bus_lock = lan937x_girq_bus_lock, 504 .irq_bus_sync_unlock = lan937x_girq_bus_sync_unlock, 505 }; 506 507 static int lan937x_girq_domain_map(struct irq_domain *d, 508 unsigned int irq, irq_hw_number_t hwirq) 509 { 510 struct ksz_device *dev = d->host_data; 511 512 irq_set_chip_data(irq, d->host_data); 513 irq_set_chip_and_handler(irq, &dev->girq.chip, handle_level_irq); 514 irq_set_noprobe(irq); 515 516 return 0; 517 } 518 519 static const struct irq_domain_ops lan937x_girq_domain_ops = { 520 .map = lan937x_girq_domain_map, 521 .xlate = irq_domain_xlate_twocell, 522 }; 523 524 static void lan937x_girq_free(struct ksz_device *dev) 525 { 526 int irq, virq; 527 528 free_irq(dev->irq, dev); 529 530 for (irq = 0; irq < dev->girq.nirqs; irq++) { 531 virq = irq_find_mapping(dev->girq.domain, irq); 532 irq_dispose_mapping(virq); 533 } 534 535 irq_domain_remove(dev->girq.domain); 536 } 537 538 static irqreturn_t lan937x_girq_thread_fn(int irq, void *dev_id) 539 { 540 struct ksz_device *dev = dev_id; 541 unsigned int nhandled = 0; 542 unsigned int sub_irq; 543 unsigned int n; 544 u32 data; 545 int ret; 546 547 /* Read global interrupt status register */ 548 ret = ksz_read32(dev, REG_SW_PORT_INT_STATUS__4, &data); 549 if (ret) 550 goto out; 551 552 for (n = 0; n < dev->girq.nirqs; ++n) { 553 if (data & (1 << n)) { 554 sub_irq = irq_find_mapping(dev->girq.domain, n); 555 handle_nested_irq(sub_irq); 556 ++nhandled; 557 } 558 } 559 out: 560 return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE); 561 } 562 563 static int lan937x_girq_setup(struct ksz_device *dev) 564 { 565 int ret, irq; 566 567 dev->girq.nirqs = dev->info->port_cnt; 568 dev->girq.domain = irq_domain_add_simple(NULL, dev->girq.nirqs, 0, 569 &lan937x_girq_domain_ops, dev); 570 if (!dev->girq.domain) 571 return -ENOMEM; 572 573 for (irq = 0; irq < dev->girq.nirqs; irq++) 574 irq_create_mapping(dev->girq.domain, irq); 575 576 dev->girq.chip = lan937x_girq_chip; 577 dev->girq.masked = ~0; 578 579 ret = request_threaded_irq(dev->irq, NULL, lan937x_girq_thread_fn, 580 IRQF_ONESHOT | IRQF_TRIGGER_FALLING, 581 dev_name(dev->dev), dev); 582 if (ret) 583 goto out; 584 585 return 0; 586 587 out: 588 lan937x_girq_free(dev); 589 590 return ret; 591 } 592 593 static void lan937x_pirq_mask(struct irq_data *d) 594 { 595 struct ksz_port *port = irq_data_get_irq_chip_data(d); 596 unsigned int n = d->hwirq; 597 598 port->pirq.masked |= (1 << n); 599 } 600 601 static void lan937x_pirq_unmask(struct irq_data *d) 602 { 603 struct ksz_port *port = irq_data_get_irq_chip_data(d); 604 unsigned int n = d->hwirq; 605 606 port->pirq.masked &= ~(1 << n); 607 } 608 609 static void lan937x_pirq_bus_lock(struct irq_data *d) 610 { 611 struct ksz_port *port = irq_data_get_irq_chip_data(d); 612 struct ksz_device *dev = port->ksz_dev; 613 614 mutex_lock(&dev->lock_irq); 615 } 616 617 static void lan937x_pirq_bus_sync_unlock(struct irq_data *d) 618 { 619 struct ksz_port *port = irq_data_get_irq_chip_data(d); 620 struct ksz_device *dev = port->ksz_dev; 621 622 ksz_pwrite8(dev, port->num, REG_PORT_INT_MASK, port->pirq.masked); 623 mutex_unlock(&dev->lock_irq); 624 } 625 626 static const struct irq_chip lan937x_pirq_chip = { 627 .name = "lan937x-port", 628 .irq_mask = lan937x_pirq_mask, 629 .irq_unmask = lan937x_pirq_unmask, 630 .irq_bus_lock = lan937x_pirq_bus_lock, 631 .irq_bus_sync_unlock = lan937x_pirq_bus_sync_unlock, 632 }; 633 634 static int lan937x_pirq_domain_map(struct irq_domain *d, unsigned int irq, 635 irq_hw_number_t hwirq) 636 { 637 struct ksz_port *port = d->host_data; 638 639 irq_set_chip_data(irq, d->host_data); 640 irq_set_chip_and_handler(irq, &port->pirq.chip, handle_level_irq); 641 irq_set_noprobe(irq); 642 643 return 0; 644 } 645 646 static const struct irq_domain_ops lan937x_pirq_domain_ops = { 647 .map = lan937x_pirq_domain_map, 648 .xlate = irq_domain_xlate_twocell, 649 }; 650 651 static void lan937x_pirq_free(struct ksz_device *dev, u8 p) 652 { 653 struct ksz_port *port = &dev->ports[p]; 654 int irq, virq; 655 int irq_num; 656 657 irq_num = irq_find_mapping(dev->girq.domain, p); 658 if (irq_num < 0) 659 return; 660 661 free_irq(irq_num, port); 662 663 for (irq = 0; irq < port->pirq.nirqs; irq++) { 664 virq = irq_find_mapping(port->pirq.domain, irq); 665 irq_dispose_mapping(virq); 666 } 667 668 irq_domain_remove(port->pirq.domain); 669 } 670 671 static irqreturn_t lan937x_pirq_thread_fn(int irq, void *dev_id) 672 { 673 struct ksz_port *port = dev_id; 674 unsigned int nhandled = 0; 675 struct ksz_device *dev; 676 unsigned int sub_irq; 677 unsigned int n; 678 u8 data; 679 680 dev = port->ksz_dev; 681 682 /* Read port interrupt status register */ 683 ksz_pread8(dev, port->num, REG_PORT_INT_STATUS, &data); 684 685 for (n = 0; n < port->pirq.nirqs; ++n) { 686 if (data & (1 << n)) { 687 sub_irq = irq_find_mapping(port->pirq.domain, n); 688 handle_nested_irq(sub_irq); 689 ++nhandled; 690 } 691 } 692 693 return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE); 694 } 695 696 static int lan937x_pirq_setup(struct ksz_device *dev, u8 p) 697 { 698 struct ksz_port *port = &dev->ports[p]; 699 int ret, irq; 700 int irq_num; 701 702 port->pirq.nirqs = LAN937x_PNIRQS; 703 port->pirq.domain = irq_domain_add_simple(dev->dev->of_node, 704 port->pirq.nirqs, 0, 705 &lan937x_pirq_domain_ops, 706 port); 707 if (!port->pirq.domain) 708 return -ENOMEM; 709 710 for (irq = 0; irq < port->pirq.nirqs; irq++) 711 irq_create_mapping(port->pirq.domain, irq); 712 713 port->pirq.chip = lan937x_pirq_chip; 714 port->pirq.masked = ~0; 715 716 irq_num = irq_find_mapping(dev->girq.domain, p); 717 if (irq_num < 0) 718 return irq_num; 719 720 snprintf(port->pirq.name, sizeof(port->pirq.name), "port_irq-%d", p); 721 722 ret = request_threaded_irq(irq_num, NULL, lan937x_pirq_thread_fn, 723 IRQF_ONESHOT | IRQF_TRIGGER_FALLING, 724 port->pirq.name, port); 725 if (ret) 726 goto out; 727 728 return 0; 729 730 out: 731 lan937x_pirq_free(dev, p); 732 733 return ret; 734 } 735 736 int lan937x_setup(struct dsa_switch *ds) 737 { 738 struct ksz_device *dev = ds->priv; 739 struct dsa_port *dp; 740 int ret; 741 742 /* enable Indirect Access from SPI to the VPHY registers */ 743 ret = lan937x_enable_spi_indirect_access(dev); 744 if (ret < 0) { 745 dev_err(dev->dev, "failed to enable spi indirect access"); 746 return ret; 747 } 748 749 if (dev->irq > 0) { 750 ret = lan937x_girq_setup(dev); 751 if (ret) 752 return ret; 753 754 dsa_switch_for_each_user_port(dp, dev->ds) { 755 ret = lan937x_pirq_setup(dev, dp->index); 756 if (ret) 757 goto out_girq; 758 } 759 } 760 761 ret = lan937x_mdio_register(dev); 762 if (ret < 0) { 763 dev_err(dev->dev, "failed to register the mdio"); 764 goto out_pirq; 765 } 766 767 /* The VLAN aware is a global setting. Mixed vlan 768 * filterings are not supported. 769 */ 770 ds->vlan_filtering_is_global = true; 771 772 /* Enable aggressive back off for half duplex & UNH mode */ 773 lan937x_cfg(dev, REG_SW_MAC_CTRL_0, 774 (SW_PAUSE_UNH_MODE | SW_NEW_BACKOFF | SW_AGGR_BACKOFF), 775 true); 776 777 /* If NO_EXC_COLLISION_DROP bit is set, the switch will not drop 778 * packets when 16 or more collisions occur 779 */ 780 lan937x_cfg(dev, REG_SW_MAC_CTRL_1, NO_EXC_COLLISION_DROP, true); 781 782 /* enable global MIB counter freeze function */ 783 lan937x_cfg(dev, REG_SW_MAC_CTRL_6, SW_MIB_COUNTER_FREEZE, true); 784 785 /* disable CLK125 & CLK25, 1: disable, 0: enable */ 786 lan937x_cfg(dev, REG_SW_GLOBAL_OUTPUT_CTRL__1, 787 (SW_CLK125_ENB | SW_CLK25_ENB), true); 788 789 return 0; 790 791 out_pirq: 792 if (dev->irq > 0) 793 dsa_switch_for_each_user_port(dp, dev->ds) 794 lan937x_pirq_free(dev, dp->index); 795 out_girq: 796 if (dev->irq > 0) 797 lan937x_girq_free(dev); 798 799 return ret; 800 } 801 802 void lan937x_teardown(struct dsa_switch *ds) 803 { 804 struct ksz_device *dev = ds->priv; 805 struct dsa_port *dp; 806 807 if (dev->irq > 0) { 808 dsa_switch_for_each_user_port(dp, dev->ds) 809 lan937x_pirq_free(dev, dp->index); 810 811 lan937x_girq_free(dev); 812 } 813 } 814 815 void lan937x_switch_exit(struct ksz_device *dev) 816 { 817 lan937x_reset_switch(dev); 818 } 819 820 MODULE_AUTHOR("Arun Ramadoss <arun.ramadoss@microchip.com>"); 821 MODULE_DESCRIPTION("Microchip LAN937x Series Switch DSA Driver"); 822 MODULE_LICENSE("GPL"); 823