xref: /linux/drivers/net/ethernet/brocade/bna/bfi.h (revision 6fcf9aff)
152fa7bf9SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
2f844a0eaSJeff Kirsher /*
32732ba56SRasesh Mody  * Linux network driver for QLogic BR-series Converged Network Adapter.
4f844a0eaSJeff Kirsher  */
5f844a0eaSJeff Kirsher /*
62732ba56SRasesh Mody  * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
72732ba56SRasesh Mody  * Copyright (c) 2014-2015 QLogic Corporation
8f844a0eaSJeff Kirsher  * All rights reserved
92732ba56SRasesh Mody  * www.qlogic.com
10f844a0eaSJeff Kirsher  */
11f844a0eaSJeff Kirsher #ifndef __BFI_H__
12f844a0eaSJeff Kirsher #define __BFI_H__
13f844a0eaSJeff Kirsher 
14f844a0eaSJeff Kirsher #include "bfa_defs.h"
15f844a0eaSJeff Kirsher 
161aa8b471SBen Hutchings /* BFI FW image type */
17f844a0eaSJeff Kirsher #define	BFI_FLASH_CHUNK_SZ			256	/*!< Flash chunk size */
18f844a0eaSJeff Kirsher #define	BFI_FLASH_CHUNK_SZ_WORDS	(BFI_FLASH_CHUNK_SZ/sizeof(u32))
19c107ba17SRasesh Mody #define BFI_FLASH_IMAGE_SZ		0x100000
20f844a0eaSJeff Kirsher 
211aa8b471SBen Hutchings /* Msg header common to all msgs */
22f844a0eaSJeff Kirsher struct bfi_mhdr {
23f844a0eaSJeff Kirsher 	u8		msg_class;	/*!< @ref enum bfi_mclass	    */
24f844a0eaSJeff Kirsher 	u8		msg_id;		/*!< msg opcode with in the class   */
25f844a0eaSJeff Kirsher 	union {
26f844a0eaSJeff Kirsher 		struct {
27078086f3SRasesh Mody 			u8	qid;
28078086f3SRasesh Mody 			u8	fn_lpu;	/*!< msg destination		    */
29e423c856SIvan Vecera 		} __packed h2i;
30f844a0eaSJeff Kirsher 		u16	i2htok;	/*!< token in msgs to host	    */
31e423c856SIvan Vecera 	} __packed mtag;
32e423c856SIvan Vecera } __packed;
33f844a0eaSJeff Kirsher 
34078086f3SRasesh Mody #define bfi_fn_lpu(__fn, __lpu)	((__fn) << 1 | (__lpu))
35078086f3SRasesh Mody #define bfi_mhdr_2_fn(_mh)	((_mh)->mtag.h2i.fn_lpu >> 1)
36078086f3SRasesh Mody #define bfi_mhdr_2_qid(_mh)	((_mh)->mtag.h2i.qid)
37078086f3SRasesh Mody 
38078086f3SRasesh Mody #define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do {		\
39f844a0eaSJeff Kirsher 	(_mh).msg_class			= (_mc);		\
40f844a0eaSJeff Kirsher 	(_mh).msg_id			= (_op);		\
41078086f3SRasesh Mody 	(_mh).mtag.h2i.fn_lpu	= (_fn_lpu);			\
42f844a0eaSJeff Kirsher } while (0)
43f844a0eaSJeff Kirsher 
44f844a0eaSJeff Kirsher #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do {		\
45f844a0eaSJeff Kirsher 	(_mh).msg_class			= (_mc);		\
46f844a0eaSJeff Kirsher 	(_mh).msg_id			= (_op);		\
47f844a0eaSJeff Kirsher 	(_mh).mtag.i2htok		= (_i2htok);		\
48f844a0eaSJeff Kirsher } while (0)
49f844a0eaSJeff Kirsher 
50f844a0eaSJeff Kirsher /*
51f844a0eaSJeff Kirsher  * Message opcodes: 0-127 to firmware, 128-255 to host
52f844a0eaSJeff Kirsher  */
53f844a0eaSJeff Kirsher #define BFI_I2H_OPCODE_BASE	128
54f844a0eaSJeff Kirsher #define BFA_I2HM(_x)			((_x) + BFI_I2H_OPCODE_BASE)
55f844a0eaSJeff Kirsher 
561aa8b471SBen Hutchings /****************************************************************************
57f844a0eaSJeff Kirsher  *
58f844a0eaSJeff Kirsher  * Scatter Gather Element and Page definition
59f844a0eaSJeff Kirsher  *
60f844a0eaSJeff Kirsher  ****************************************************************************
61f844a0eaSJeff Kirsher  */
62f844a0eaSJeff Kirsher 
631aa8b471SBen Hutchings /* DMA addresses */
64f844a0eaSJeff Kirsher union bfi_addr_u {
65f844a0eaSJeff Kirsher 	struct {
66f844a0eaSJeff Kirsher 		u32	addr_lo;
67f844a0eaSJeff Kirsher 		u32	addr_hi;
68e423c856SIvan Vecera 	} __packed a32;
69e423c856SIvan Vecera } __packed;
70f844a0eaSJeff Kirsher 
711aa8b471SBen Hutchings /* Generic DMA addr-len pair. */
7272a9730bSKrishna Gudipati struct bfi_alen {
7372a9730bSKrishna Gudipati 	union bfi_addr_u	al_addr;	/* DMA addr of buffer	*/
7472a9730bSKrishna Gudipati 	u32			al_len;		/* length of buffer */
75e423c856SIvan Vecera } __packed;
7672a9730bSKrishna Gudipati 
77f844a0eaSJeff Kirsher /*
78f844a0eaSJeff Kirsher  * Large Message structure - 128 Bytes size Msgs
79f844a0eaSJeff Kirsher  */
80f844a0eaSJeff Kirsher #define BFI_LMSG_SZ		128
81f844a0eaSJeff Kirsher #define BFI_LMSG_PL_WSZ	\
82f844a0eaSJeff Kirsher 			((BFI_LMSG_SZ - sizeof(struct bfi_mhdr)) / 4)
83f844a0eaSJeff Kirsher 
841aa8b471SBen Hutchings /* Mailbox message structure */
85f844a0eaSJeff Kirsher #define BFI_MBMSG_SZ		7
86f844a0eaSJeff Kirsher struct bfi_mbmsg {
87f844a0eaSJeff Kirsher 	struct bfi_mhdr mh;
88f844a0eaSJeff Kirsher 	u32		pl[BFI_MBMSG_SZ];
89e423c856SIvan Vecera } __packed;
90f844a0eaSJeff Kirsher 
911aa8b471SBen Hutchings /* Supported PCI function class codes (personality) */
92078086f3SRasesh Mody enum bfi_pcifn_class {
93078086f3SRasesh Mody 	BFI_PCIFN_CLASS_FC	= 0x0c04,
94078086f3SRasesh Mody 	BFI_PCIFN_CLASS_ETH	= 0x0200,
95078086f3SRasesh Mody };
96078086f3SRasesh Mody 
971aa8b471SBen Hutchings /* Message Classes */
98f844a0eaSJeff Kirsher enum bfi_mclass {
99f844a0eaSJeff Kirsher 	BFI_MC_IOC		= 1,	/*!< IO Controller (IOC)	    */
100f844a0eaSJeff Kirsher 	BFI_MC_DIAG		= 2,	/*!< Diagnostic Msgs		    */
101f844a0eaSJeff Kirsher 	BFI_MC_FLASH		= 3,	/*!< Flash message class	    */
102f844a0eaSJeff Kirsher 	BFI_MC_CEE		= 4,	/*!< CEE			    */
103f844a0eaSJeff Kirsher 	BFI_MC_FCPORT		= 5,	/*!< FC port			    */
104f844a0eaSJeff Kirsher 	BFI_MC_IOCFC		= 6,	/*!< FC - IO Controller (IOC)	    */
105f844a0eaSJeff Kirsher 	BFI_MC_LL		= 7,	/*!< Link Layer			    */
106f844a0eaSJeff Kirsher 	BFI_MC_UF		= 8,	/*!< Unsolicited frame receive	    */
107f844a0eaSJeff Kirsher 	BFI_MC_FCXP		= 9,	/*!< FC Transport		    */
108f844a0eaSJeff Kirsher 	BFI_MC_LPS		= 10,	/*!< lport fc login services	    */
109f844a0eaSJeff Kirsher 	BFI_MC_RPORT		= 11,	/*!< Remote port		    */
110f844a0eaSJeff Kirsher 	BFI_MC_ITNIM		= 12,	/*!< I-T nexus (Initiator mode)	    */
111f844a0eaSJeff Kirsher 	BFI_MC_IOIM_READ	= 13,	/*!< read IO (Initiator mode)	    */
112f844a0eaSJeff Kirsher 	BFI_MC_IOIM_WRITE	= 14,	/*!< write IO (Initiator mode)	    */
113f844a0eaSJeff Kirsher 	BFI_MC_IOIM_IO		= 15,	/*!< IO (Initiator mode)	    */
114f844a0eaSJeff Kirsher 	BFI_MC_IOIM		= 16,	/*!< IO (Initiator mode)	    */
115f844a0eaSJeff Kirsher 	BFI_MC_IOIM_IOCOM	= 17,	/*!< good IO completion		    */
116f844a0eaSJeff Kirsher 	BFI_MC_TSKIM		= 18,	/*!< Initiator Task management	    */
117f844a0eaSJeff Kirsher 	BFI_MC_SBOOT		= 19,	/*!< SAN boot services		    */
118f844a0eaSJeff Kirsher 	BFI_MC_IPFC		= 20,	/*!< IP over FC Msgs		    */
119f844a0eaSJeff Kirsher 	BFI_MC_PORT		= 21,	/*!< Physical port		    */
120f844a0eaSJeff Kirsher 	BFI_MC_SFP		= 22,	/*!< SFP module			    */
121f844a0eaSJeff Kirsher 	BFI_MC_MSGQ		= 23,	/*!< MSGQ			    */
122f844a0eaSJeff Kirsher 	BFI_MC_ENET		= 24,	/*!< ENET commands/responses	    */
123aafd5c2cSRasesh Mody 	BFI_MC_PHY		= 25,	/*!< External PHY message class	    */
124aafd5c2cSRasesh Mody 	BFI_MC_NBOOT		= 26,	/*!< Network Boot		    */
125aafd5c2cSRasesh Mody 	BFI_MC_TIO_READ		= 27,	/*!< read IO (Target mode)	    */
126aafd5c2cSRasesh Mody 	BFI_MC_TIO_WRITE	= 28,	/*!< write IO (Target mode)	    */
127aafd5c2cSRasesh Mody 	BFI_MC_TIO_DATA_XFERED	= 29,	/*!< ds transferred (target mode)   */
128aafd5c2cSRasesh Mody 	BFI_MC_TIO_IO		= 30,	/*!< IO (Target mode)		    */
129aafd5c2cSRasesh Mody 	BFI_MC_TIO		= 31,	/*!< IO (target mode)		    */
130aafd5c2cSRasesh Mody 	BFI_MC_MFG		= 32,	/*!< MFG/ASIC block commands	    */
131aafd5c2cSRasesh Mody 	BFI_MC_EDMA		= 33,	/*!< EDMA copy commands		    */
132aafd5c2cSRasesh Mody 	BFI_MC_MAX		= 34
133f844a0eaSJeff Kirsher };
134f844a0eaSJeff Kirsher 
135f844a0eaSJeff Kirsher #define BFI_IOC_MSGLEN_MAX	32	/* 32 bytes */
136f844a0eaSJeff Kirsher 
137af027a34SRasesh Mody #define BFI_FWBOOT_ENV_OS		0
138af027a34SRasesh Mody 
1391aa8b471SBen Hutchings /*----------------------------------------------------------------------
140f844a0eaSJeff Kirsher  *				IOC
141f844a0eaSJeff Kirsher  *----------------------------------------------------------------------
142f844a0eaSJeff Kirsher  */
143f844a0eaSJeff Kirsher 
1441aa8b471SBen Hutchings /* Different asic generations */
145078086f3SRasesh Mody enum bfi_asic_gen {
146078086f3SRasesh Mody 	BFI_ASIC_GEN_CB		= 1,
147078086f3SRasesh Mody 	BFI_ASIC_GEN_CT		= 2,
1481bf9fd70SRasesh Mody 	BFI_ASIC_GEN_CT2	= 3,
149078086f3SRasesh Mody };
150078086f3SRasesh Mody 
151078086f3SRasesh Mody enum bfi_asic_mode {
152078086f3SRasesh Mody 	BFI_ASIC_MODE_FC	= 1,	/* FC up to 8G speed		*/
153078086f3SRasesh Mody 	BFI_ASIC_MODE_FC16	= 2,	/* FC up to 16G speed		*/
154078086f3SRasesh Mody 	BFI_ASIC_MODE_ETH	= 3,	/* Ethernet ports		*/
155078086f3SRasesh Mody 	BFI_ASIC_MODE_COMBO	= 4,	/* FC 16G and Ethernet 10G port	*/
156078086f3SRasesh Mody };
157078086f3SRasesh Mody 
158f844a0eaSJeff Kirsher enum bfi_ioc_h2i_msgs {
159f844a0eaSJeff Kirsher 	BFI_IOC_H2I_ENABLE_REQ		= 1,
160f844a0eaSJeff Kirsher 	BFI_IOC_H2I_DISABLE_REQ		= 2,
161f844a0eaSJeff Kirsher 	BFI_IOC_H2I_GETATTR_REQ		= 3,
162f844a0eaSJeff Kirsher 	BFI_IOC_H2I_DBG_SYNC		= 4,
163f844a0eaSJeff Kirsher 	BFI_IOC_H2I_DBG_DUMP		= 5,
164f844a0eaSJeff Kirsher };
165f844a0eaSJeff Kirsher 
166f844a0eaSJeff Kirsher enum bfi_ioc_i2h_msgs {
167f844a0eaSJeff Kirsher 	BFI_IOC_I2H_ENABLE_REPLY	= BFA_I2HM(1),
168f844a0eaSJeff Kirsher 	BFI_IOC_I2H_DISABLE_REPLY	= BFA_I2HM(2),
169f844a0eaSJeff Kirsher 	BFI_IOC_I2H_GETATTR_REPLY	= BFA_I2HM(3),
170078086f3SRasesh Mody 	BFI_IOC_I2H_HBEAT		= BFA_I2HM(4),
171f844a0eaSJeff Kirsher };
172f844a0eaSJeff Kirsher 
1731aa8b471SBen Hutchings /* BFI_IOC_H2I_GETATTR_REQ message */
174f844a0eaSJeff Kirsher struct bfi_ioc_getattr_req {
175f844a0eaSJeff Kirsher 	struct bfi_mhdr mh;
176f844a0eaSJeff Kirsher 	union bfi_addr_u	attr_addr;
177e423c856SIvan Vecera } __packed;
178f844a0eaSJeff Kirsher 
179f844a0eaSJeff Kirsher struct bfi_ioc_attr {
180f844a0eaSJeff Kirsher 	u64		mfg_pwwn;	/*!< Mfg port wwn	   */
181f844a0eaSJeff Kirsher 	u64		mfg_nwwn;	/*!< Mfg node wwn	   */
182d6b30598SIvan Vecera 	u8		mfg_mac[ETH_ALEN]; /*!< Mfg mac		   */
183078086f3SRasesh Mody 	u8		port_mode;	/* enum bfi_port_mode	   */
184078086f3SRasesh Mody 	u8		rsvd_a;
185f844a0eaSJeff Kirsher 	u64		pwwn;
186f844a0eaSJeff Kirsher 	u64		nwwn;
187d6b30598SIvan Vecera 	u8		mac[ETH_ALEN];	/*!< PBC or Mfg mac	   */
188f844a0eaSJeff Kirsher 	u16	rsvd_b;
189d6b30598SIvan Vecera 	u8		fcoe_mac[ETH_ALEN];
190f844a0eaSJeff Kirsher 	u16	rsvd_c;
191f844a0eaSJeff Kirsher 	char		brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
192f844a0eaSJeff Kirsher 	u8		pcie_gen;
193f844a0eaSJeff Kirsher 	u8		pcie_lanes_orig;
194f844a0eaSJeff Kirsher 	u8		pcie_lanes;
195f844a0eaSJeff Kirsher 	u8		rx_bbcredit;	/*!< receive buffer credits */
196f844a0eaSJeff Kirsher 	u32	adapter_prop;	/*!< adapter properties     */
197f844a0eaSJeff Kirsher 	u16	maxfrsize;	/*!< max receive frame size */
198f844a0eaSJeff Kirsher 	char		asic_rev;
199f844a0eaSJeff Kirsher 	u8		rsvd_d;
200f844a0eaSJeff Kirsher 	char		fw_version[BFA_VERSION_LEN];
201f844a0eaSJeff Kirsher 	char		optrom_version[BFA_VERSION_LEN];
202f844a0eaSJeff Kirsher 	struct bfa_mfg_vpd vpd;
203f844a0eaSJeff Kirsher 	u32	card_type;	/*!< card type			*/
204e423c856SIvan Vecera } __packed;
205f844a0eaSJeff Kirsher 
2061aa8b471SBen Hutchings /* BFI_IOC_I2H_GETATTR_REPLY message */
207f844a0eaSJeff Kirsher struct bfi_ioc_getattr_reply {
208f844a0eaSJeff Kirsher 	struct bfi_mhdr mh;	/*!< Common msg header		*/
209f844a0eaSJeff Kirsher 	u8			status;	/*!< cfg reply status		*/
210f844a0eaSJeff Kirsher 	u8			rsvd[3];
211e423c856SIvan Vecera } __packed;
212f844a0eaSJeff Kirsher 
2131aa8b471SBen Hutchings /* Firmware memory page offsets */
214f844a0eaSJeff Kirsher #define BFI_IOC_SMEM_PG0_CB	(0x40)
215f844a0eaSJeff Kirsher #define BFI_IOC_SMEM_PG0_CT	(0x180)
216f844a0eaSJeff Kirsher 
2171aa8b471SBen Hutchings /* Firmware statistic offset */
218f844a0eaSJeff Kirsher #define BFI_IOC_FWSTATS_OFF	(0x6B40)
219f844a0eaSJeff Kirsher #define BFI_IOC_FWSTATS_SZ	(4096)
220f844a0eaSJeff Kirsher 
2211aa8b471SBen Hutchings /* Firmware trace offset */
222f844a0eaSJeff Kirsher #define BFI_IOC_TRC_OFF		(0x4b00)
223f844a0eaSJeff Kirsher #define BFI_IOC_TRC_ENTS	256
2247afc5dbdSKrishna Gudipati #define BFI_IOC_TRC_ENT_SZ	16
2257afc5dbdSKrishna Gudipati #define BFI_IOC_TRC_HDR_SZ	32
226f844a0eaSJeff Kirsher 
227f844a0eaSJeff Kirsher #define BFI_IOC_FW_SIGNATURE	(0xbfadbfad)
228c107ba17SRasesh Mody #define BFI_IOC_FW_INV_SIGN	(0xdeaddead)
229f844a0eaSJeff Kirsher #define BFI_IOC_MD5SUM_SZ	4
230c107ba17SRasesh Mody 
231c107ba17SRasesh Mody struct bfi_ioc_fwver {
232c107ba17SRasesh Mody #ifdef __BIG_ENDIAN
233c107ba17SRasesh Mody 	u8 patch;
234c107ba17SRasesh Mody 	u8 maint;
235c107ba17SRasesh Mody 	u8 minor;
236c107ba17SRasesh Mody 	u8 major;
237c107ba17SRasesh Mody 	u8 rsvd[2];
238c107ba17SRasesh Mody 	u8 build;
239c107ba17SRasesh Mody 	u8 phase;
240c107ba17SRasesh Mody #else
241c107ba17SRasesh Mody 	u8 major;
242c107ba17SRasesh Mody 	u8 minor;
243c107ba17SRasesh Mody 	u8 maint;
244c107ba17SRasesh Mody 	u8 patch;
245c107ba17SRasesh Mody 	u8 phase;
246c107ba17SRasesh Mody 	u8 build;
247c107ba17SRasesh Mody 	u8 rsvd[2];
248c107ba17SRasesh Mody #endif
249e423c856SIvan Vecera } __packed;
250c107ba17SRasesh Mody 
251f844a0eaSJeff Kirsher struct bfi_ioc_image_hdr {
252f844a0eaSJeff Kirsher 	u32	signature;	/*!< constant signature */
253078086f3SRasesh Mody 	u8	asic_gen;	/*!< asic generation */
254078086f3SRasesh Mody 	u8	asic_mode;
255078086f3SRasesh Mody 	u8	port0_mode;	/*!< device mode for port 0 */
256078086f3SRasesh Mody 	u8	port1_mode;	/*!< device mode for port 1 */
257f844a0eaSJeff Kirsher 	u32	exec;		/*!< exec vector	*/
258078086f3SRasesh Mody 	u32	bootenv;	/*!< firmware boot env */
259c107ba17SRasesh Mody 	u32	rsvd_b[2];
260c107ba17SRasesh Mody 	struct bfi_ioc_fwver fwver;
261f844a0eaSJeff Kirsher 	u32	md5sum[BFI_IOC_MD5SUM_SZ];
262e423c856SIvan Vecera } __packed;
263f844a0eaSJeff Kirsher 
264c107ba17SRasesh Mody enum bfi_ioc_img_ver_cmp {
265c107ba17SRasesh Mody 	BFI_IOC_IMG_VER_INCOMP,
266c107ba17SRasesh Mody 	BFI_IOC_IMG_VER_OLD,
267c107ba17SRasesh Mody 	BFI_IOC_IMG_VER_SAME,
268c107ba17SRasesh Mody 	BFI_IOC_IMG_VER_BETTER
269c107ba17SRasesh Mody };
270c107ba17SRasesh Mody 
271078086f3SRasesh Mody #define BFI_FWBOOT_DEVMODE_OFF		4
272078086f3SRasesh Mody #define BFI_FWBOOT_TYPE_OFF		8
273078086f3SRasesh Mody #define BFI_FWBOOT_ENV_OFF		12
274078086f3SRasesh Mody #define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
275078086f3SRasesh Mody 	(((u32)(__asic_gen)) << 24 |	\
276078086f3SRasesh Mody 	 ((u32)(__asic_mode)) << 16 |	\
277078086f3SRasesh Mody 	 ((u32)(__p0_mode)) << 8 |	\
278078086f3SRasesh Mody 	 ((u32)(__p1_mode)))
279078086f3SRasesh Mody 
280f844a0eaSJeff Kirsher enum bfi_fwboot_type {
281f844a0eaSJeff Kirsher 	BFI_FWBOOT_TYPE_NORMAL	= 0,
282f844a0eaSJeff Kirsher 	BFI_FWBOOT_TYPE_FLASH	= 1,
283f844a0eaSJeff Kirsher 	BFI_FWBOOT_TYPE_MEMTEST	= 2,
284f844a0eaSJeff Kirsher };
285f844a0eaSJeff Kirsher 
286078086f3SRasesh Mody enum bfi_port_mode {
287078086f3SRasesh Mody 	BFI_PORT_MODE_FC	= 1,
288078086f3SRasesh Mody 	BFI_PORT_MODE_ETH	= 2,
289078086f3SRasesh Mody };
290078086f3SRasesh Mody 
291f844a0eaSJeff Kirsher struct bfi_ioc_hbeat {
292f844a0eaSJeff Kirsher 	struct bfi_mhdr mh;		/*!< common msg header		*/
293f844a0eaSJeff Kirsher 	u32	   hb_count;	/*!< current heart beat count	*/
294e423c856SIvan Vecera } __packed;
295f844a0eaSJeff Kirsher 
2961aa8b471SBen Hutchings /* IOC hardware/firmware state */
297f844a0eaSJeff Kirsher enum bfi_ioc_state {
298f844a0eaSJeff Kirsher 	BFI_IOC_UNINIT		= 0,	/*!< not initialized		     */
299f844a0eaSJeff Kirsher 	BFI_IOC_INITING		= 1,	/*!< h/w is being initialized	     */
300f844a0eaSJeff Kirsher 	BFI_IOC_HWINIT		= 2,	/*!< h/w is initialized		     */
301f844a0eaSJeff Kirsher 	BFI_IOC_CFG		= 3,	/*!< IOC configuration in progress   */
302f844a0eaSJeff Kirsher 	BFI_IOC_OP		= 4,	/*!< IOC is operational		     */
303f844a0eaSJeff Kirsher 	BFI_IOC_DISABLING	= 5,	/*!< IOC is being disabled	     */
304f844a0eaSJeff Kirsher 	BFI_IOC_DISABLED	= 6,	/*!< IOC is disabled		     */
305f844a0eaSJeff Kirsher 	BFI_IOC_CFG_DISABLED	= 7,	/*!< IOC is being disabled;transient */
306f844a0eaSJeff Kirsher 	BFI_IOC_FAIL		= 8,	/*!< IOC heart-beat failure	     */
307f844a0eaSJeff Kirsher 	BFI_IOC_MEMTEST		= 9,	/*!< IOC is doing memtest	     */
308f844a0eaSJeff Kirsher };
309f844a0eaSJeff Kirsher 
310f844a0eaSJeff Kirsher enum {
311f844a0eaSJeff Kirsher 	BFI_ADAPTER_TYPE_FC	= 0x01,		/*!< FC adapters	   */
312f844a0eaSJeff Kirsher 	BFI_ADAPTER_TYPE_MK	= 0x0f0000,	/*!< adapter type mask     */
313f844a0eaSJeff Kirsher 	BFI_ADAPTER_TYPE_SH	= 16,	        /*!< adapter type shift    */
314f844a0eaSJeff Kirsher 	BFI_ADAPTER_NPORTS_MK	= 0xff00,	/*!< number of ports mask  */
315f844a0eaSJeff Kirsher 	BFI_ADAPTER_NPORTS_SH	= 8,	        /*!< number of ports shift */
316f844a0eaSJeff Kirsher 	BFI_ADAPTER_SPEED_MK	= 0xff,		/*!< adapter speed mask    */
317f844a0eaSJeff Kirsher 	BFI_ADAPTER_SPEED_SH	= 0,	        /*!< adapter speed shift   */
318f844a0eaSJeff Kirsher 	BFI_ADAPTER_PROTO	= 0x100000,	/*!< prototype adapaters   */
319f844a0eaSJeff Kirsher 	BFI_ADAPTER_TTV		= 0x200000,	/*!< TTV debug capable     */
320f844a0eaSJeff Kirsher 	BFI_ADAPTER_UNSUPP	= 0x400000,	/*!< unknown adapter type  */
321f844a0eaSJeff Kirsher };
322f844a0eaSJeff Kirsher 
323f844a0eaSJeff Kirsher #define BFI_ADAPTER_GETP(__prop, __adap_prop)			\
324f844a0eaSJeff Kirsher 	(((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >>	\
325f844a0eaSJeff Kirsher 		BFI_ADAPTER_ ## __prop ## _SH)
326f844a0eaSJeff Kirsher #define BFI_ADAPTER_SETP(__prop, __val)				\
327f844a0eaSJeff Kirsher 	((__val) << BFI_ADAPTER_ ## __prop ## _SH)
328f844a0eaSJeff Kirsher #define BFI_ADAPTER_IS_SPECIAL(__adap_type)			\
329f844a0eaSJeff Kirsher 	((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO |	\
330f844a0eaSJeff Kirsher 			BFI_ADAPTER_UNSUPP))
331f844a0eaSJeff Kirsher 
3321aa8b471SBen Hutchings /* BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages */
333f844a0eaSJeff Kirsher struct bfi_ioc_ctrl_req {
334f844a0eaSJeff Kirsher 	struct bfi_mhdr mh;
335078086f3SRasesh Mody 	u16			clscode;
336078086f3SRasesh Mody 	u16			rsvd;
337f844a0eaSJeff Kirsher 	u32		tv_sec;
338e423c856SIvan Vecera } __packed;
339f844a0eaSJeff Kirsher 
3401aa8b471SBen Hutchings /* BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages */
341f844a0eaSJeff Kirsher struct bfi_ioc_ctrl_reply {
342f844a0eaSJeff Kirsher 	struct bfi_mhdr mh;			/*!< Common msg header     */
343f844a0eaSJeff Kirsher 	u8			status;		/*!< enable/disable status */
344078086f3SRasesh Mody 	u8			port_mode;	/*!< enum bfa_mode */
345078086f3SRasesh Mody 	u8			cap_bm;		/*!< capability bit mask */
346078086f3SRasesh Mody 	u8			rsvd;
347e423c856SIvan Vecera } __packed;
348f844a0eaSJeff Kirsher 
349f844a0eaSJeff Kirsher #define BFI_IOC_MSGSZ   8
3501aa8b471SBen Hutchings /* H2I Messages */
351f844a0eaSJeff Kirsher union bfi_ioc_h2i_msg_u {
352f844a0eaSJeff Kirsher 	struct bfi_mhdr mh;
353f844a0eaSJeff Kirsher 	struct bfi_ioc_ctrl_req enable_req;
354f844a0eaSJeff Kirsher 	struct bfi_ioc_ctrl_req disable_req;
355f844a0eaSJeff Kirsher 	struct bfi_ioc_getattr_req getattr_req;
356f844a0eaSJeff Kirsher 	u32			mboxmsg[BFI_IOC_MSGSZ];
357e423c856SIvan Vecera } __packed;
358f844a0eaSJeff Kirsher 
3591aa8b471SBen Hutchings /* I2H Messages */
360f844a0eaSJeff Kirsher union bfi_ioc_i2h_msg_u {
361f844a0eaSJeff Kirsher 	struct bfi_mhdr mh;
362078086f3SRasesh Mody 	struct bfi_ioc_ctrl_reply fw_event;
363f844a0eaSJeff Kirsher 	u32			mboxmsg[BFI_IOC_MSGSZ];
364e423c856SIvan Vecera } __packed;
365f844a0eaSJeff Kirsher 
3661aa8b471SBen Hutchings /*----------------------------------------------------------------------
367af027a34SRasesh Mody  *				MSGQ
368af027a34SRasesh Mody  *----------------------------------------------------------------------
369af027a34SRasesh Mody  */
370af027a34SRasesh Mody 
371af027a34SRasesh Mody enum bfi_msgq_h2i_msgs {
372af027a34SRasesh Mody 	BFI_MSGQ_H2I_INIT_REQ	   = 1,
373af027a34SRasesh Mody 	BFI_MSGQ_H2I_DOORBELL_PI	= 2,
374af027a34SRasesh Mody 	BFI_MSGQ_H2I_DOORBELL_CI	= 3,
375af027a34SRasesh Mody 	BFI_MSGQ_H2I_CMDQ_COPY_RSP      = 4,
376af027a34SRasesh Mody };
377af027a34SRasesh Mody 
378af027a34SRasesh Mody enum bfi_msgq_i2h_msgs {
379af027a34SRasesh Mody 	BFI_MSGQ_I2H_INIT_RSP	   = BFA_I2HM(BFI_MSGQ_H2I_INIT_REQ),
380af027a34SRasesh Mody 	BFI_MSGQ_I2H_DOORBELL_PI	= BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_PI),
381af027a34SRasesh Mody 	BFI_MSGQ_I2H_DOORBELL_CI	= BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_CI),
382af027a34SRasesh Mody 	BFI_MSGQ_I2H_CMDQ_COPY_REQ      = BFA_I2HM(BFI_MSGQ_H2I_CMDQ_COPY_RSP),
383af027a34SRasesh Mody };
384af027a34SRasesh Mody 
385af027a34SRasesh Mody /* Messages(commands/responsed/AENS will have the following header */
386af027a34SRasesh Mody struct bfi_msgq_mhdr {
387af027a34SRasesh Mody 	u8	msg_class;
388af027a34SRasesh Mody 	u8	msg_id;
389af027a34SRasesh Mody 	u16	msg_token;
390af027a34SRasesh Mody 	u16	num_entries;
391af027a34SRasesh Mody 	u8	enet_id;
392*6fcf9affSGustavo A. R. Silva 	u8	rsvd;
393e423c856SIvan Vecera } __packed;
394af027a34SRasesh Mody 
395af027a34SRasesh Mody #define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do {	\
396af027a34SRasesh Mody 	(_mh).msg_class	 = (_mc);	\
397af027a34SRasesh Mody 	(_mh).msg_id	    = (_mid);       \
398af027a34SRasesh Mody 	(_mh).msg_token	 = (_tok);       \
399af027a34SRasesh Mody 	(_mh).enet_id	   = (_enet_id);   \
400af027a34SRasesh Mody } while (0)
401af027a34SRasesh Mody 
402af027a34SRasesh Mody /*
403af027a34SRasesh Mody  * Mailbox  for messaging interface
404af027a34SRasesh Mody  */
405af027a34SRasesh Mody #define BFI_MSGQ_CMD_ENTRY_SIZE	 (64)    /* TBD */
406af027a34SRasesh Mody #define BFI_MSGQ_RSP_ENTRY_SIZE	 (64)    /* TBD */
407af027a34SRasesh Mody 
408af027a34SRasesh Mody #define bfi_msgq_num_cmd_entries(_size)				 \
409af027a34SRasesh Mody 	(((_size) + BFI_MSGQ_CMD_ENTRY_SIZE - 1) / BFI_MSGQ_CMD_ENTRY_SIZE)
410af027a34SRasesh Mody 
411af027a34SRasesh Mody struct bfi_msgq {
412af027a34SRasesh Mody 	union bfi_addr_u addr;
413af027a34SRasesh Mody 	u16 q_depth;     /* Total num of entries in the queue */
414af027a34SRasesh Mody 	u8 rsvd[2];
415e423c856SIvan Vecera } __packed;
416af027a34SRasesh Mody 
417af027a34SRasesh Mody /* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
418af027a34SRasesh Mody struct bfi_msgq_cfg_req {
419af027a34SRasesh Mody 	struct bfi_mhdr mh;
420af027a34SRasesh Mody 	struct bfi_msgq cmdq;
421af027a34SRasesh Mody 	struct bfi_msgq rspq;
422e423c856SIvan Vecera } __packed;
423af027a34SRasesh Mody 
424af027a34SRasesh Mody /* BFI_ENET_MSGQ_CFG_RSP */
425af027a34SRasesh Mody struct bfi_msgq_cfg_rsp {
426af027a34SRasesh Mody 	struct bfi_mhdr mh;
427af027a34SRasesh Mody 	u8 cmd_status;
428af027a34SRasesh Mody 	u8 rsvd[3];
429e423c856SIvan Vecera } __packed;
430af027a34SRasesh Mody 
431af027a34SRasesh Mody /* BFI_MSGQ_H2I_DOORBELL */
432af027a34SRasesh Mody struct bfi_msgq_h2i_db {
433af027a34SRasesh Mody 	struct bfi_mhdr mh;
434af027a34SRasesh Mody 	union {
435af027a34SRasesh Mody 		u16 cmdq_pi;
436af027a34SRasesh Mody 		u16 rspq_ci;
437e423c856SIvan Vecera 	} __packed idx;
438e423c856SIvan Vecera } __packed;
439af027a34SRasesh Mody 
440af027a34SRasesh Mody /* BFI_MSGQ_I2H_DOORBELL */
441af027a34SRasesh Mody struct bfi_msgq_i2h_db {
442af027a34SRasesh Mody 	struct bfi_mhdr mh;
443af027a34SRasesh Mody 	union {
444af027a34SRasesh Mody 		u16 rspq_pi;
445af027a34SRasesh Mody 		u16 cmdq_ci;
446e423c856SIvan Vecera 	} __packed idx;
447e423c856SIvan Vecera } __packed;
448af027a34SRasesh Mody 
449af027a34SRasesh Mody #define BFI_CMD_COPY_SZ 28
450af027a34SRasesh Mody 
451af027a34SRasesh Mody /* BFI_MSGQ_H2I_CMD_COPY_RSP */
452af027a34SRasesh Mody struct bfi_msgq_h2i_cmdq_copy_rsp {
453af027a34SRasesh Mody 	struct bfi_mhdr mh;
454af027a34SRasesh Mody 	u8	      data[BFI_CMD_COPY_SZ];
455e423c856SIvan Vecera } __packed;
456af027a34SRasesh Mody 
457af027a34SRasesh Mody /* BFI_MSGQ_I2H_CMD_COPY_REQ */
458af027a34SRasesh Mody struct bfi_msgq_i2h_cmdq_copy_req {
459af027a34SRasesh Mody 	struct bfi_mhdr mh;
460af027a34SRasesh Mody 	u16     offset;
461af027a34SRasesh Mody 	u16     len;
462e423c856SIvan Vecera } __packed;
463af027a34SRasesh Mody 
46472a9730bSKrishna Gudipati /*
46572a9730bSKrishna Gudipati  *      FLASH module specific
46672a9730bSKrishna Gudipati  */
46772a9730bSKrishna Gudipati enum bfi_flash_h2i_msgs {
46872a9730bSKrishna Gudipati 	BFI_FLASH_H2I_QUERY_REQ = 1,
46972a9730bSKrishna Gudipati 	BFI_FLASH_H2I_ERASE_REQ = 2,
47072a9730bSKrishna Gudipati 	BFI_FLASH_H2I_WRITE_REQ = 3,
47172a9730bSKrishna Gudipati 	BFI_FLASH_H2I_READ_REQ = 4,
47272a9730bSKrishna Gudipati 	BFI_FLASH_H2I_BOOT_VER_REQ = 5,
47372a9730bSKrishna Gudipati };
47472a9730bSKrishna Gudipati 
47572a9730bSKrishna Gudipati enum bfi_flash_i2h_msgs {
47672a9730bSKrishna Gudipati 	BFI_FLASH_I2H_QUERY_RSP = BFA_I2HM(1),
47772a9730bSKrishna Gudipati 	BFI_FLASH_I2H_ERASE_RSP = BFA_I2HM(2),
47872a9730bSKrishna Gudipati 	BFI_FLASH_I2H_WRITE_RSP = BFA_I2HM(3),
47972a9730bSKrishna Gudipati 	BFI_FLASH_I2H_READ_RSP = BFA_I2HM(4),
48072a9730bSKrishna Gudipati 	BFI_FLASH_I2H_BOOT_VER_RSP = BFA_I2HM(5),
48172a9730bSKrishna Gudipati 	BFI_FLASH_I2H_EVENT = BFA_I2HM(127),
48272a9730bSKrishna Gudipati };
48372a9730bSKrishna Gudipati 
48472a9730bSKrishna Gudipati /*
48572a9730bSKrishna Gudipati  * Flash query request
48672a9730bSKrishna Gudipati  */
48772a9730bSKrishna Gudipati struct bfi_flash_query_req {
48872a9730bSKrishna Gudipati 	struct bfi_mhdr mh;   /* Common msg header */
48972a9730bSKrishna Gudipati 	struct bfi_alen alen;
490e423c856SIvan Vecera } __packed;
49172a9730bSKrishna Gudipati 
49272a9730bSKrishna Gudipati /*
49372a9730bSKrishna Gudipati  * Flash write request
49472a9730bSKrishna Gudipati  */
49572a9730bSKrishna Gudipati struct bfi_flash_write_req {
49672a9730bSKrishna Gudipati 	struct bfi_mhdr mh;	/* Common msg header */
49772a9730bSKrishna Gudipati 	struct bfi_alen alen;
49872a9730bSKrishna Gudipati 	u32	type;   /* partition type */
49972a9730bSKrishna Gudipati 	u8	instance; /* partition instance */
50072a9730bSKrishna Gudipati 	u8	last;
50172a9730bSKrishna Gudipati 	u8	rsv[2];
50272a9730bSKrishna Gudipati 	u32	offset;
50372a9730bSKrishna Gudipati 	u32	length;
504e423c856SIvan Vecera } __packed;
50572a9730bSKrishna Gudipati 
50672a9730bSKrishna Gudipati /*
50772a9730bSKrishna Gudipati  * Flash read request
50872a9730bSKrishna Gudipati  */
50972a9730bSKrishna Gudipati struct bfi_flash_read_req {
51072a9730bSKrishna Gudipati 	struct bfi_mhdr mh;	/* Common msg header */
51172a9730bSKrishna Gudipati 	u32	type;		/* partition type */
51272a9730bSKrishna Gudipati 	u8	instance;	/* partition instance */
51372a9730bSKrishna Gudipati 	u8	rsv[3];
51472a9730bSKrishna Gudipati 	u32	offset;
51572a9730bSKrishna Gudipati 	u32	length;
51672a9730bSKrishna Gudipati 	struct bfi_alen alen;
517e423c856SIvan Vecera } __packed;
51872a9730bSKrishna Gudipati 
51972a9730bSKrishna Gudipati /*
52072a9730bSKrishna Gudipati  * Flash query response
52172a9730bSKrishna Gudipati  */
52272a9730bSKrishna Gudipati struct bfi_flash_query_rsp {
52372a9730bSKrishna Gudipati 	struct bfi_mhdr mh;	/* Common msg header */
52472a9730bSKrishna Gudipati 	u32	status;
525e423c856SIvan Vecera } __packed;
52672a9730bSKrishna Gudipati 
52772a9730bSKrishna Gudipati /*
52872a9730bSKrishna Gudipati  * Flash read response
52972a9730bSKrishna Gudipati  */
53072a9730bSKrishna Gudipati struct bfi_flash_read_rsp {
53172a9730bSKrishna Gudipati 	struct bfi_mhdr mh;	/* Common msg header */
53272a9730bSKrishna Gudipati 	u32	type;		/* partition type */
53372a9730bSKrishna Gudipati 	u8	instance;	/* partition instance */
53472a9730bSKrishna Gudipati 	u8	rsv[3];
53572a9730bSKrishna Gudipati 	u32	status;
53672a9730bSKrishna Gudipati 	u32	length;
537e423c856SIvan Vecera } __packed;
53872a9730bSKrishna Gudipati 
53972a9730bSKrishna Gudipati /*
54072a9730bSKrishna Gudipati  * Flash write response
54172a9730bSKrishna Gudipati  */
54272a9730bSKrishna Gudipati struct bfi_flash_write_rsp {
54372a9730bSKrishna Gudipati 	struct bfi_mhdr mh;	/* Common msg header */
54472a9730bSKrishna Gudipati 	u32	type;		/* partition type */
54572a9730bSKrishna Gudipati 	u8	instance;	/* partition instance */
54672a9730bSKrishna Gudipati 	u8	rsv[3];
54772a9730bSKrishna Gudipati 	u32	status;
54872a9730bSKrishna Gudipati 	u32	length;
549e423c856SIvan Vecera } __packed;
550f844a0eaSJeff Kirsher 
551f844a0eaSJeff Kirsher #endif /* __BFI_H__ */
552