1ec21e2ecSJeff Kirsher /* 2*3396c782SPaul Gortmaker * drivers/net/ethernet/freescale/fec_mpc52xx.h 3ec21e2ecSJeff Kirsher * 4ec21e2ecSJeff Kirsher * Driver for the MPC5200 Fast Ethernet Controller 5ec21e2ecSJeff Kirsher * 6ec21e2ecSJeff Kirsher * Author: Dale Farnsworth <dfarnsworth@mvista.com> 7ec21e2ecSJeff Kirsher * 8ec21e2ecSJeff Kirsher * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under 9ec21e2ecSJeff Kirsher * the terms of the GNU General Public License version 2. This program 10ec21e2ecSJeff Kirsher * is licensed "as is" without any warranty of any kind, whether express 11ec21e2ecSJeff Kirsher * or implied. 12ec21e2ecSJeff Kirsher */ 13ec21e2ecSJeff Kirsher 14ec21e2ecSJeff Kirsher #ifndef __DRIVERS_NET_MPC52XX_FEC_H__ 15ec21e2ecSJeff Kirsher #define __DRIVERS_NET_MPC52XX_FEC_H__ 16ec21e2ecSJeff Kirsher 17ec21e2ecSJeff Kirsher #include <linux/phy.h> 18ec21e2ecSJeff Kirsher 19ec21e2ecSJeff Kirsher /* Tunable constant */ 20ec21e2ecSJeff Kirsher /* FEC_RX_BUFFER_SIZE includes 4 bytes for CRC32 */ 21ec21e2ecSJeff Kirsher #define FEC_RX_BUFFER_SIZE 1522 /* max receive packet size */ 22ec21e2ecSJeff Kirsher #define FEC_RX_NUM_BD 256 23ec21e2ecSJeff Kirsher #define FEC_TX_NUM_BD 64 24ec21e2ecSJeff Kirsher 25ec21e2ecSJeff Kirsher #define FEC_RESET_DELAY 50 /* uS */ 26ec21e2ecSJeff Kirsher 27ec21e2ecSJeff Kirsher #define FEC_WATCHDOG_TIMEOUT ((400*HZ)/1000) 28ec21e2ecSJeff Kirsher 29ec21e2ecSJeff Kirsher /* ======================================================================== */ 30ec21e2ecSJeff Kirsher /* Hardware register sets & bits */ 31ec21e2ecSJeff Kirsher /* ======================================================================== */ 32ec21e2ecSJeff Kirsher 33ec21e2ecSJeff Kirsher struct mpc52xx_fec { 34ec21e2ecSJeff Kirsher u32 fec_id; /* FEC + 0x000 */ 35ec21e2ecSJeff Kirsher u32 ievent; /* FEC + 0x004 */ 36ec21e2ecSJeff Kirsher u32 imask; /* FEC + 0x008 */ 37ec21e2ecSJeff Kirsher 38ec21e2ecSJeff Kirsher u32 reserved0[1]; /* FEC + 0x00C */ 39ec21e2ecSJeff Kirsher u32 r_des_active; /* FEC + 0x010 */ 40ec21e2ecSJeff Kirsher u32 x_des_active; /* FEC + 0x014 */ 41ec21e2ecSJeff Kirsher u32 r_des_active_cl; /* FEC + 0x018 */ 42ec21e2ecSJeff Kirsher u32 x_des_active_cl; /* FEC + 0x01C */ 43ec21e2ecSJeff Kirsher u32 ivent_set; /* FEC + 0x020 */ 44ec21e2ecSJeff Kirsher u32 ecntrl; /* FEC + 0x024 */ 45ec21e2ecSJeff Kirsher 46ec21e2ecSJeff Kirsher u32 reserved1[6]; /* FEC + 0x028-03C */ 47ec21e2ecSJeff Kirsher u32 mii_data; /* FEC + 0x040 */ 48ec21e2ecSJeff Kirsher u32 mii_speed; /* FEC + 0x044 */ 49ec21e2ecSJeff Kirsher u32 mii_status; /* FEC + 0x048 */ 50ec21e2ecSJeff Kirsher 51ec21e2ecSJeff Kirsher u32 reserved2[5]; /* FEC + 0x04C-05C */ 52ec21e2ecSJeff Kirsher u32 mib_data; /* FEC + 0x060 */ 53ec21e2ecSJeff Kirsher u32 mib_control; /* FEC + 0x064 */ 54ec21e2ecSJeff Kirsher 55ec21e2ecSJeff Kirsher u32 reserved3[6]; /* FEC + 0x068-7C */ 56ec21e2ecSJeff Kirsher u32 r_activate; /* FEC + 0x080 */ 57ec21e2ecSJeff Kirsher u32 r_cntrl; /* FEC + 0x084 */ 58ec21e2ecSJeff Kirsher u32 r_hash; /* FEC + 0x088 */ 59ec21e2ecSJeff Kirsher u32 r_data; /* FEC + 0x08C */ 60ec21e2ecSJeff Kirsher u32 ar_done; /* FEC + 0x090 */ 61ec21e2ecSJeff Kirsher u32 r_test; /* FEC + 0x094 */ 62ec21e2ecSJeff Kirsher u32 r_mib; /* FEC + 0x098 */ 63ec21e2ecSJeff Kirsher u32 r_da_low; /* FEC + 0x09C */ 64ec21e2ecSJeff Kirsher u32 r_da_high; /* FEC + 0x0A0 */ 65ec21e2ecSJeff Kirsher 66ec21e2ecSJeff Kirsher u32 reserved4[7]; /* FEC + 0x0A4-0BC */ 67ec21e2ecSJeff Kirsher u32 x_activate; /* FEC + 0x0C0 */ 68ec21e2ecSJeff Kirsher u32 x_cntrl; /* FEC + 0x0C4 */ 69ec21e2ecSJeff Kirsher u32 backoff; /* FEC + 0x0C8 */ 70ec21e2ecSJeff Kirsher u32 x_data; /* FEC + 0x0CC */ 71ec21e2ecSJeff Kirsher u32 x_status; /* FEC + 0x0D0 */ 72ec21e2ecSJeff Kirsher u32 x_mib; /* FEC + 0x0D4 */ 73ec21e2ecSJeff Kirsher u32 x_test; /* FEC + 0x0D8 */ 74ec21e2ecSJeff Kirsher u32 fdxfc_da1; /* FEC + 0x0DC */ 75ec21e2ecSJeff Kirsher u32 fdxfc_da2; /* FEC + 0x0E0 */ 76ec21e2ecSJeff Kirsher u32 paddr1; /* FEC + 0x0E4 */ 77ec21e2ecSJeff Kirsher u32 paddr2; /* FEC + 0x0E8 */ 78ec21e2ecSJeff Kirsher u32 op_pause; /* FEC + 0x0EC */ 79ec21e2ecSJeff Kirsher 80ec21e2ecSJeff Kirsher u32 reserved5[4]; /* FEC + 0x0F0-0FC */ 81ec21e2ecSJeff Kirsher u32 instr_reg; /* FEC + 0x100 */ 82ec21e2ecSJeff Kirsher u32 context_reg; /* FEC + 0x104 */ 83ec21e2ecSJeff Kirsher u32 test_cntrl; /* FEC + 0x108 */ 84ec21e2ecSJeff Kirsher u32 acc_reg; /* FEC + 0x10C */ 85ec21e2ecSJeff Kirsher u32 ones; /* FEC + 0x110 */ 86ec21e2ecSJeff Kirsher u32 zeros; /* FEC + 0x114 */ 87ec21e2ecSJeff Kirsher u32 iaddr1; /* FEC + 0x118 */ 88ec21e2ecSJeff Kirsher u32 iaddr2; /* FEC + 0x11C */ 89ec21e2ecSJeff Kirsher u32 gaddr1; /* FEC + 0x120 */ 90ec21e2ecSJeff Kirsher u32 gaddr2; /* FEC + 0x124 */ 91ec21e2ecSJeff Kirsher u32 random; /* FEC + 0x128 */ 92ec21e2ecSJeff Kirsher u32 rand1; /* FEC + 0x12C */ 93ec21e2ecSJeff Kirsher u32 tmp; /* FEC + 0x130 */ 94ec21e2ecSJeff Kirsher 95ec21e2ecSJeff Kirsher u32 reserved6[3]; /* FEC + 0x134-13C */ 96ec21e2ecSJeff Kirsher u32 fifo_id; /* FEC + 0x140 */ 97ec21e2ecSJeff Kirsher u32 x_wmrk; /* FEC + 0x144 */ 98ec21e2ecSJeff Kirsher u32 fcntrl; /* FEC + 0x148 */ 99ec21e2ecSJeff Kirsher u32 r_bound; /* FEC + 0x14C */ 100ec21e2ecSJeff Kirsher u32 r_fstart; /* FEC + 0x150 */ 101ec21e2ecSJeff Kirsher u32 r_count; /* FEC + 0x154 */ 102ec21e2ecSJeff Kirsher u32 r_lag; /* FEC + 0x158 */ 103ec21e2ecSJeff Kirsher u32 r_read; /* FEC + 0x15C */ 104ec21e2ecSJeff Kirsher u32 r_write; /* FEC + 0x160 */ 105ec21e2ecSJeff Kirsher u32 x_count; /* FEC + 0x164 */ 106ec21e2ecSJeff Kirsher u32 x_lag; /* FEC + 0x168 */ 107ec21e2ecSJeff Kirsher u32 x_retry; /* FEC + 0x16C */ 108ec21e2ecSJeff Kirsher u32 x_write; /* FEC + 0x170 */ 109ec21e2ecSJeff Kirsher u32 x_read; /* FEC + 0x174 */ 110ec21e2ecSJeff Kirsher 111ec21e2ecSJeff Kirsher u32 reserved7[2]; /* FEC + 0x178-17C */ 112ec21e2ecSJeff Kirsher u32 fm_cntrl; /* FEC + 0x180 */ 113ec21e2ecSJeff Kirsher u32 rfifo_data; /* FEC + 0x184 */ 114ec21e2ecSJeff Kirsher u32 rfifo_status; /* FEC + 0x188 */ 115ec21e2ecSJeff Kirsher u32 rfifo_cntrl; /* FEC + 0x18C */ 116ec21e2ecSJeff Kirsher u32 rfifo_lrf_ptr; /* FEC + 0x190 */ 117ec21e2ecSJeff Kirsher u32 rfifo_lwf_ptr; /* FEC + 0x194 */ 118ec21e2ecSJeff Kirsher u32 rfifo_alarm; /* FEC + 0x198 */ 119ec21e2ecSJeff Kirsher u32 rfifo_rdptr; /* FEC + 0x19C */ 120ec21e2ecSJeff Kirsher u32 rfifo_wrptr; /* FEC + 0x1A0 */ 121ec21e2ecSJeff Kirsher u32 tfifo_data; /* FEC + 0x1A4 */ 122ec21e2ecSJeff Kirsher u32 tfifo_status; /* FEC + 0x1A8 */ 123ec21e2ecSJeff Kirsher u32 tfifo_cntrl; /* FEC + 0x1AC */ 124ec21e2ecSJeff Kirsher u32 tfifo_lrf_ptr; /* FEC + 0x1B0 */ 125ec21e2ecSJeff Kirsher u32 tfifo_lwf_ptr; /* FEC + 0x1B4 */ 126ec21e2ecSJeff Kirsher u32 tfifo_alarm; /* FEC + 0x1B8 */ 127ec21e2ecSJeff Kirsher u32 tfifo_rdptr; /* FEC + 0x1BC */ 128ec21e2ecSJeff Kirsher u32 tfifo_wrptr; /* FEC + 0x1C0 */ 129ec21e2ecSJeff Kirsher 130ec21e2ecSJeff Kirsher u32 reset_cntrl; /* FEC + 0x1C4 */ 131ec21e2ecSJeff Kirsher u32 xmit_fsm; /* FEC + 0x1C8 */ 132ec21e2ecSJeff Kirsher 133ec21e2ecSJeff Kirsher u32 reserved8[3]; /* FEC + 0x1CC-1D4 */ 134ec21e2ecSJeff Kirsher u32 rdes_data0; /* FEC + 0x1D8 */ 135ec21e2ecSJeff Kirsher u32 rdes_data1; /* FEC + 0x1DC */ 136ec21e2ecSJeff Kirsher u32 r_length; /* FEC + 0x1E0 */ 137ec21e2ecSJeff Kirsher u32 x_length; /* FEC + 0x1E4 */ 138ec21e2ecSJeff Kirsher u32 x_addr; /* FEC + 0x1E8 */ 139ec21e2ecSJeff Kirsher u32 cdes_data; /* FEC + 0x1EC */ 140ec21e2ecSJeff Kirsher u32 status; /* FEC + 0x1F0 */ 141ec21e2ecSJeff Kirsher u32 dma_control; /* FEC + 0x1F4 */ 142ec21e2ecSJeff Kirsher u32 des_cmnd; /* FEC + 0x1F8 */ 143ec21e2ecSJeff Kirsher u32 data; /* FEC + 0x1FC */ 144ec21e2ecSJeff Kirsher 145ec21e2ecSJeff Kirsher u32 rmon_t_drop; /* FEC + 0x200 */ 146ec21e2ecSJeff Kirsher u32 rmon_t_packets; /* FEC + 0x204 */ 147ec21e2ecSJeff Kirsher u32 rmon_t_bc_pkt; /* FEC + 0x208 */ 148ec21e2ecSJeff Kirsher u32 rmon_t_mc_pkt; /* FEC + 0x20C */ 149ec21e2ecSJeff Kirsher u32 rmon_t_crc_align; /* FEC + 0x210 */ 150ec21e2ecSJeff Kirsher u32 rmon_t_undersize; /* FEC + 0x214 */ 151ec21e2ecSJeff Kirsher u32 rmon_t_oversize; /* FEC + 0x218 */ 152ec21e2ecSJeff Kirsher u32 rmon_t_frag; /* FEC + 0x21C */ 153ec21e2ecSJeff Kirsher u32 rmon_t_jab; /* FEC + 0x220 */ 154ec21e2ecSJeff Kirsher u32 rmon_t_col; /* FEC + 0x224 */ 155ec21e2ecSJeff Kirsher u32 rmon_t_p64; /* FEC + 0x228 */ 156ec21e2ecSJeff Kirsher u32 rmon_t_p65to127; /* FEC + 0x22C */ 157ec21e2ecSJeff Kirsher u32 rmon_t_p128to255; /* FEC + 0x230 */ 158ec21e2ecSJeff Kirsher u32 rmon_t_p256to511; /* FEC + 0x234 */ 159ec21e2ecSJeff Kirsher u32 rmon_t_p512to1023; /* FEC + 0x238 */ 160ec21e2ecSJeff Kirsher u32 rmon_t_p1024to2047; /* FEC + 0x23C */ 161ec21e2ecSJeff Kirsher u32 rmon_t_p_gte2048; /* FEC + 0x240 */ 162ec21e2ecSJeff Kirsher u32 rmon_t_octets; /* FEC + 0x244 */ 163ec21e2ecSJeff Kirsher u32 ieee_t_drop; /* FEC + 0x248 */ 164ec21e2ecSJeff Kirsher u32 ieee_t_frame_ok; /* FEC + 0x24C */ 165ec21e2ecSJeff Kirsher u32 ieee_t_1col; /* FEC + 0x250 */ 166ec21e2ecSJeff Kirsher u32 ieee_t_mcol; /* FEC + 0x254 */ 167ec21e2ecSJeff Kirsher u32 ieee_t_def; /* FEC + 0x258 */ 168ec21e2ecSJeff Kirsher u32 ieee_t_lcol; /* FEC + 0x25C */ 169ec21e2ecSJeff Kirsher u32 ieee_t_excol; /* FEC + 0x260 */ 170ec21e2ecSJeff Kirsher u32 ieee_t_macerr; /* FEC + 0x264 */ 171ec21e2ecSJeff Kirsher u32 ieee_t_cserr; /* FEC + 0x268 */ 172ec21e2ecSJeff Kirsher u32 ieee_t_sqe; /* FEC + 0x26C */ 173ec21e2ecSJeff Kirsher u32 t_fdxfc; /* FEC + 0x270 */ 174ec21e2ecSJeff Kirsher u32 ieee_t_octets_ok; /* FEC + 0x274 */ 175ec21e2ecSJeff Kirsher 176ec21e2ecSJeff Kirsher u32 reserved9[2]; /* FEC + 0x278-27C */ 177ec21e2ecSJeff Kirsher u32 rmon_r_drop; /* FEC + 0x280 */ 178ec21e2ecSJeff Kirsher u32 rmon_r_packets; /* FEC + 0x284 */ 179ec21e2ecSJeff Kirsher u32 rmon_r_bc_pkt; /* FEC + 0x288 */ 180ec21e2ecSJeff Kirsher u32 rmon_r_mc_pkt; /* FEC + 0x28C */ 181ec21e2ecSJeff Kirsher u32 rmon_r_crc_align; /* FEC + 0x290 */ 182ec21e2ecSJeff Kirsher u32 rmon_r_undersize; /* FEC + 0x294 */ 183ec21e2ecSJeff Kirsher u32 rmon_r_oversize; /* FEC + 0x298 */ 184ec21e2ecSJeff Kirsher u32 rmon_r_frag; /* FEC + 0x29C */ 185ec21e2ecSJeff Kirsher u32 rmon_r_jab; /* FEC + 0x2A0 */ 186ec21e2ecSJeff Kirsher 187ec21e2ecSJeff Kirsher u32 rmon_r_resvd_0; /* FEC + 0x2A4 */ 188ec21e2ecSJeff Kirsher 189ec21e2ecSJeff Kirsher u32 rmon_r_p64; /* FEC + 0x2A8 */ 190ec21e2ecSJeff Kirsher u32 rmon_r_p65to127; /* FEC + 0x2AC */ 191ec21e2ecSJeff Kirsher u32 rmon_r_p128to255; /* FEC + 0x2B0 */ 192ec21e2ecSJeff Kirsher u32 rmon_r_p256to511; /* FEC + 0x2B4 */ 193ec21e2ecSJeff Kirsher u32 rmon_r_p512to1023; /* FEC + 0x2B8 */ 194ec21e2ecSJeff Kirsher u32 rmon_r_p1024to2047; /* FEC + 0x2BC */ 195ec21e2ecSJeff Kirsher u32 rmon_r_p_gte2048; /* FEC + 0x2C0 */ 196ec21e2ecSJeff Kirsher u32 rmon_r_octets; /* FEC + 0x2C4 */ 197ec21e2ecSJeff Kirsher u32 ieee_r_drop; /* FEC + 0x2C8 */ 198ec21e2ecSJeff Kirsher u32 ieee_r_frame_ok; /* FEC + 0x2CC */ 199ec21e2ecSJeff Kirsher u32 ieee_r_crc; /* FEC + 0x2D0 */ 200ec21e2ecSJeff Kirsher u32 ieee_r_align; /* FEC + 0x2D4 */ 201ec21e2ecSJeff Kirsher u32 r_macerr; /* FEC + 0x2D8 */ 202ec21e2ecSJeff Kirsher u32 r_fdxfc; /* FEC + 0x2DC */ 203ec21e2ecSJeff Kirsher u32 ieee_r_octets_ok; /* FEC + 0x2E0 */ 204ec21e2ecSJeff Kirsher 205ec21e2ecSJeff Kirsher u32 reserved10[7]; /* FEC + 0x2E4-2FC */ 206ec21e2ecSJeff Kirsher 207ec21e2ecSJeff Kirsher u32 reserved11[64]; /* FEC + 0x300-3FF */ 208ec21e2ecSJeff Kirsher }; 209ec21e2ecSJeff Kirsher 210ec21e2ecSJeff Kirsher #define FEC_MIB_DISABLE 0x80000000 211ec21e2ecSJeff Kirsher 212ec21e2ecSJeff Kirsher #define FEC_IEVENT_HBERR 0x80000000 213ec21e2ecSJeff Kirsher #define FEC_IEVENT_BABR 0x40000000 214ec21e2ecSJeff Kirsher #define FEC_IEVENT_BABT 0x20000000 215ec21e2ecSJeff Kirsher #define FEC_IEVENT_GRA 0x10000000 216ec21e2ecSJeff Kirsher #define FEC_IEVENT_TFINT 0x08000000 217ec21e2ecSJeff Kirsher #define FEC_IEVENT_MII 0x00800000 218ec21e2ecSJeff Kirsher #define FEC_IEVENT_LATE_COL 0x00200000 219ec21e2ecSJeff Kirsher #define FEC_IEVENT_COL_RETRY_LIM 0x00100000 220ec21e2ecSJeff Kirsher #define FEC_IEVENT_XFIFO_UN 0x00080000 221ec21e2ecSJeff Kirsher #define FEC_IEVENT_XFIFO_ERROR 0x00040000 222ec21e2ecSJeff Kirsher #define FEC_IEVENT_RFIFO_ERROR 0x00020000 223ec21e2ecSJeff Kirsher 224ec21e2ecSJeff Kirsher #define FEC_IMASK_HBERR 0x80000000 225ec21e2ecSJeff Kirsher #define FEC_IMASK_BABR 0x40000000 226ec21e2ecSJeff Kirsher #define FEC_IMASK_BABT 0x20000000 227ec21e2ecSJeff Kirsher #define FEC_IMASK_GRA 0x10000000 228ec21e2ecSJeff Kirsher #define FEC_IMASK_MII 0x00800000 229ec21e2ecSJeff Kirsher #define FEC_IMASK_LATE_COL 0x00200000 230ec21e2ecSJeff Kirsher #define FEC_IMASK_COL_RETRY_LIM 0x00100000 231ec21e2ecSJeff Kirsher #define FEC_IMASK_XFIFO_UN 0x00080000 232ec21e2ecSJeff Kirsher #define FEC_IMASK_XFIFO_ERROR 0x00040000 233ec21e2ecSJeff Kirsher #define FEC_IMASK_RFIFO_ERROR 0x00020000 234ec21e2ecSJeff Kirsher 235ec21e2ecSJeff Kirsher /* all but MII, which is enabled separately */ 236ec21e2ecSJeff Kirsher #define FEC_IMASK_ENABLE (FEC_IMASK_HBERR | FEC_IMASK_BABR | \ 237ec21e2ecSJeff Kirsher FEC_IMASK_BABT | FEC_IMASK_GRA | FEC_IMASK_LATE_COL | \ 238ec21e2ecSJeff Kirsher FEC_IMASK_COL_RETRY_LIM | FEC_IMASK_XFIFO_UN | \ 239ec21e2ecSJeff Kirsher FEC_IMASK_XFIFO_ERROR | FEC_IMASK_RFIFO_ERROR) 240ec21e2ecSJeff Kirsher 241ec21e2ecSJeff Kirsher #define FEC_RCNTRL_MAX_FL_SHIFT 16 242ec21e2ecSJeff Kirsher #define FEC_RCNTRL_LOOP 0x01 243ec21e2ecSJeff Kirsher #define FEC_RCNTRL_DRT 0x02 244ec21e2ecSJeff Kirsher #define FEC_RCNTRL_MII_MODE 0x04 245ec21e2ecSJeff Kirsher #define FEC_RCNTRL_PROM 0x08 246ec21e2ecSJeff Kirsher #define FEC_RCNTRL_BC_REJ 0x10 247ec21e2ecSJeff Kirsher #define FEC_RCNTRL_FCE 0x20 248ec21e2ecSJeff Kirsher 249ec21e2ecSJeff Kirsher #define FEC_TCNTRL_GTS 0x00000001 250ec21e2ecSJeff Kirsher #define FEC_TCNTRL_HBC 0x00000002 251ec21e2ecSJeff Kirsher #define FEC_TCNTRL_FDEN 0x00000004 252ec21e2ecSJeff Kirsher #define FEC_TCNTRL_TFC_PAUSE 0x00000008 253ec21e2ecSJeff Kirsher #define FEC_TCNTRL_RFC_PAUSE 0x00000010 254ec21e2ecSJeff Kirsher 255ec21e2ecSJeff Kirsher #define FEC_ECNTRL_RESET 0x00000001 256ec21e2ecSJeff Kirsher #define FEC_ECNTRL_ETHER_EN 0x00000002 257ec21e2ecSJeff Kirsher 258ec21e2ecSJeff Kirsher #define FEC_MII_DATA_ST 0x40000000 /* Start frame */ 259ec21e2ecSJeff Kirsher #define FEC_MII_DATA_OP_RD 0x20000000 /* Perform read */ 260ec21e2ecSJeff Kirsher #define FEC_MII_DATA_OP_WR 0x10000000 /* Perform write */ 261ec21e2ecSJeff Kirsher #define FEC_MII_DATA_PA_MSK 0x0f800000 /* PHY Address mask */ 262ec21e2ecSJeff Kirsher #define FEC_MII_DATA_RA_MSK 0x007c0000 /* PHY Register mask */ 263ec21e2ecSJeff Kirsher #define FEC_MII_DATA_TA 0x00020000 /* Turnaround */ 264ec21e2ecSJeff Kirsher #define FEC_MII_DATA_DATAMSK 0x0000ffff /* PHY data mask */ 265ec21e2ecSJeff Kirsher 266ec21e2ecSJeff Kirsher #define FEC_MII_READ_FRAME (FEC_MII_DATA_ST | FEC_MII_DATA_OP_RD | FEC_MII_DATA_TA) 267ec21e2ecSJeff Kirsher #define FEC_MII_WRITE_FRAME (FEC_MII_DATA_ST | FEC_MII_DATA_OP_WR | FEC_MII_DATA_TA) 268ec21e2ecSJeff Kirsher 269ec21e2ecSJeff Kirsher #define FEC_MII_DATA_RA_SHIFT 0x12 /* MII reg addr bits */ 270ec21e2ecSJeff Kirsher #define FEC_MII_DATA_PA_SHIFT 0x17 /* MII PHY addr bits */ 271ec21e2ecSJeff Kirsher 272ec21e2ecSJeff Kirsher #define FEC_PADDR2_TYPE 0x8808 273ec21e2ecSJeff Kirsher 274ec21e2ecSJeff Kirsher #define FEC_OP_PAUSE_OPCODE 0x00010000 275ec21e2ecSJeff Kirsher 276ec21e2ecSJeff Kirsher #define FEC_FIFO_WMRK_256B 0x3 277ec21e2ecSJeff Kirsher 278ec21e2ecSJeff Kirsher #define FEC_FIFO_STATUS_ERR 0x00400000 279ec21e2ecSJeff Kirsher #define FEC_FIFO_STATUS_UF 0x00200000 280ec21e2ecSJeff Kirsher #define FEC_FIFO_STATUS_OF 0x00100000 281ec21e2ecSJeff Kirsher 282ec21e2ecSJeff Kirsher #define FEC_FIFO_CNTRL_FRAME 0x08000000 283ec21e2ecSJeff Kirsher #define FEC_FIFO_CNTRL_LTG_7 0x07000000 284ec21e2ecSJeff Kirsher 285ec21e2ecSJeff Kirsher #define FEC_RESET_CNTRL_RESET_FIFO 0x02000000 286ec21e2ecSJeff Kirsher #define FEC_RESET_CNTRL_ENABLE_IS_RESET 0x01000000 287ec21e2ecSJeff Kirsher 288ec21e2ecSJeff Kirsher #define FEC_XMIT_FSM_APPEND_CRC 0x02000000 289ec21e2ecSJeff Kirsher #define FEC_XMIT_FSM_ENABLE_CRC 0x01000000 290ec21e2ecSJeff Kirsher 291ec21e2ecSJeff Kirsher 292ec21e2ecSJeff Kirsher extern struct platform_driver mpc52xx_fec_mdio_driver; 293ec21e2ecSJeff Kirsher 294ec21e2ecSJeff Kirsher #endif /* __DRIVERS_NET_MPC52XX_FEC_H__ */ 295