1fedd0c15SSalil Mehta /* SPDX-License-Identifier: GPL-2.0+ */ 2fedd0c15SSalil Mehta /* Copyright (c) 2016-2017 Hisilicon Limited. */ 3fedd0c15SSalil Mehta 4fedd0c15SSalil Mehta #ifndef __HCLGEVF_CMD_H 5fedd0c15SSalil Mehta #define __HCLGEVF_CMD_H 6fedd0c15SSalil Mehta #include <linux/io.h> 7fedd0c15SSalil Mehta #include <linux/types.h> 8fedd0c15SSalil Mehta #include "hnae3.h" 96befad60SJie Wang #include "hclge_comm_cmd.h" 10fedd0c15SSalil Mehta 11fedd0c15SSalil Mehta #define HCLGEVF_CMDQ_RX_INVLD_B 0 12fedd0c15SSalil Mehta #define HCLGEVF_CMDQ_RX_OUTVLD_B 1 13fedd0c15SSalil Mehta 14fedd0c15SSalil Mehta struct hclgevf_hw; 15fedd0c15SSalil Mehta struct hclgevf_dev; 16fedd0c15SSalil Mehta 173b6db4a0SYufeng Mo #define HCLGEVF_SYNC_RX_RING_HEAD_EN_B 4 18fedd0c15SSalil Mehta 19fedd0c15SSalil Mehta #define HCLGEVF_TQP_REG_OFFSET 0x80000 20fedd0c15SSalil Mehta #define HCLGEVF_TQP_REG_SIZE 0x200 21fedd0c15SSalil Mehta 229a5ef4aaSYonglong Liu #define HCLGEVF_TQP_MAX_SIZE_DEV_V2 1024 239a5ef4aaSYonglong Liu #define HCLGEVF_TQP_EXT_REG_OFFSET 0x100 249a5ef4aaSYonglong Liu 25fedd0c15SSalil Mehta struct hclgevf_tqp_map { 26fedd0c15SSalil Mehta __le16 tqp_id; /* Absolute tqp id for in this pf */ 27fedd0c15SSalil Mehta u8 tqp_vf; /* VF id */ 28fedd0c15SSalil Mehta #define HCLGEVF_TQP_MAP_TYPE_PF 0 29fedd0c15SSalil Mehta #define HCLGEVF_TQP_MAP_TYPE_VF 1 30fedd0c15SSalil Mehta #define HCLGEVF_TQP_MAP_TYPE_B 0 31fedd0c15SSalil Mehta #define HCLGEVF_TQP_MAP_EN_B 1 32fedd0c15SSalil Mehta u8 tqp_flag; /* Indicate it's pf or vf tqp */ 33fedd0c15SSalil Mehta __le16 tqp_vid; /* Virtual id in this pf/vf */ 34fedd0c15SSalil Mehta u8 rsv[18]; 35fedd0c15SSalil Mehta }; 36fedd0c15SSalil Mehta 37fedd0c15SSalil Mehta #define HCLGEVF_VECTOR_ELEMENTS_PER_CMD 10 38fedd0c15SSalil Mehta 39fedd0c15SSalil Mehta enum hclgevf_int_type { 40fedd0c15SSalil Mehta HCLGEVF_INT_TX = 0, 41fedd0c15SSalil Mehta HCLGEVF_INT_RX, 42fedd0c15SSalil Mehta HCLGEVF_INT_EVENT, 43fedd0c15SSalil Mehta }; 44fedd0c15SSalil Mehta 45fedd0c15SSalil Mehta struct hclgevf_ctrl_vector_chain { 46fedd0c15SSalil Mehta u8 int_vector_id; 47fedd0c15SSalil Mehta u8 int_cause_num; 48fedd0c15SSalil Mehta #define HCLGEVF_INT_TYPE_S 0 49fedd0c15SSalil Mehta #define HCLGEVF_INT_TYPE_M 0x3 50fedd0c15SSalil Mehta #define HCLGEVF_TQP_ID_S 2 51fedd0c15SSalil Mehta #define HCLGEVF_TQP_ID_M (0x3fff << HCLGEVF_TQP_ID_S) 52fedd0c15SSalil Mehta __le16 tqp_type_and_id[HCLGEVF_VECTOR_ELEMENTS_PER_CMD]; 53fedd0c15SSalil Mehta u8 vfid; 54fedd0c15SSalil Mehta u8 resv; 55fedd0c15SSalil Mehta }; 56fedd0c15SSalil Mehta 5707acf909SJian Shen #define HCLGEVF_MSIX_OFT_ROCEE_S 0 5807acf909SJian Shen #define HCLGEVF_MSIX_OFT_ROCEE_M (0xffff << HCLGEVF_MSIX_OFT_ROCEE_S) 5907acf909SJian Shen #define HCLGEVF_VEC_NUM_S 0 6007acf909SJian Shen #define HCLGEVF_VEC_NUM_M (0xff << HCLGEVF_VEC_NUM_S) 6107acf909SJian Shen struct hclgevf_query_res_cmd { 6207acf909SJian Shen __le16 tqp_num; 6307acf909SJian Shen __le16 reserved; 6407acf909SJian Shen __le16 msixcap_localid_ba_nic; 6507acf909SJian Shen __le16 msixcap_localid_ba_rocee; 6607acf909SJian Shen __le16 vf_intr_vector_number; 6707acf909SJian Shen __le16 rsv[7]; 6807acf909SJian Shen }; 6907acf909SJian Shen 70b26a6feaSPeng Li #define HCLGEVF_GRO_EN_B 0 71b26a6feaSPeng Li struct hclgevf_cfg_gro_status_cmd { 72fb9e44d6SHuazhong Tan u8 gro_en; 73fb9e44d6SHuazhong Tan u8 rsv[23]; 74b26a6feaSPeng Li }; 75b26a6feaSPeng Li 76fedd0c15SSalil Mehta #define HCLGEVF_LINK_STS_B 0 77fedd0c15SSalil Mehta #define HCLGEVF_LINK_STATUS BIT(HCLGEVF_LINK_STS_B) 78fedd0c15SSalil Mehta struct hclgevf_link_status_cmd { 79fedd0c15SSalil Mehta u8 status; 80fedd0c15SSalil Mehta u8 rsv[23]; 81fedd0c15SSalil Mehta }; 82fedd0c15SSalil Mehta 83fedd0c15SSalil Mehta #define HCLGEVF_RING_ID_MASK 0x3ff 84fedd0c15SSalil Mehta #define HCLGEVF_TQP_ENABLE_B 0 85fedd0c15SSalil Mehta 86fedd0c15SSalil Mehta struct hclgevf_cfg_com_tqp_queue_cmd { 87fedd0c15SSalil Mehta __le16 tqp_id; 88fedd0c15SSalil Mehta __le16 stream_id; 89fedd0c15SSalil Mehta u8 enable; 90fedd0c15SSalil Mehta u8 rsv[19]; 91fedd0c15SSalil Mehta }; 92fedd0c15SSalil Mehta 93fedd0c15SSalil Mehta struct hclgevf_cfg_tx_queue_pointer_cmd { 94fedd0c15SSalil Mehta __le16 tqp_id; 95fedd0c15SSalil Mehta __le16 tx_tail; 96fedd0c15SSalil Mehta __le16 tx_head; 97fedd0c15SSalil Mehta __le16 fbd_num; 98fedd0c15SSalil Mehta __le16 ring_offset; 99fedd0c15SSalil Mehta u8 rsv[14]; 100fedd0c15SSalil Mehta }; 101fedd0c15SSalil Mehta 1026b428b4fSHuazhong Tan /* this bit indicates that the driver is ready for hardware reset */ 1036b428b4fSHuazhong Tan #define HCLGEVF_NIC_SW_RST_RDY_B 16 1046b428b4fSHuazhong Tan #define HCLGEVF_NIC_SW_RST_RDY BIT(HCLGEVF_NIC_SW_RST_RDY_B) 1056b428b4fSHuazhong Tan 106fedd0c15SSalil Mehta #define HCLGEVF_NIC_CMQ_DESC_NUM 1024 107fedd0c15SSalil Mehta #define HCLGEVF_NIC_CMQ_DESC_NUM_S 3 108fedd0c15SSalil Mehta 109af2aedc5SGuangbin Huang #define HCLGEVF_QUERY_DEV_SPECS_BD_NUM 4 110af2aedc5SGuangbin Huang 111745f0a19SJie Wang #define hclgevf_cmd_setup_basic_desc(desc, opcode, is_read) \ 112*43710bfeSJie Wang hclge_comm_cmd_setup_basic_desc(desc, opcode, is_read) 113745f0a19SJie Wang 114af2aedc5SGuangbin Huang struct hclgevf_dev_specs_0_cmd { 115af2aedc5SGuangbin Huang __le32 rsv0; 116af2aedc5SGuangbin Huang __le32 mac_entry_num; 117af2aedc5SGuangbin Huang __le32 mng_entry_num; 118af2aedc5SGuangbin Huang __le16 rss_ind_tbl_size; 119af2aedc5SGuangbin Huang __le16 rss_key_size; 120af2aedc5SGuangbin Huang __le16 int_ql_max; 121af2aedc5SGuangbin Huang u8 max_non_tso_bd_num; 122af2aedc5SGuangbin Huang u8 rsv1[5]; 123af2aedc5SGuangbin Huang }; 124af2aedc5SGuangbin Huang 125ab16b49cSHuazhong Tan #define HCLGEVF_DEF_MAX_INT_GL 0x1FE0U 126ab16b49cSHuazhong Tan 127ab16b49cSHuazhong Tan struct hclgevf_dev_specs_1_cmd { 128e070c8b9SYufeng Mo __le16 max_frm_size; 129e070c8b9SYufeng Mo __le16 rsv0; 130ab16b49cSHuazhong Tan __le16 max_int_gl; 131ab16b49cSHuazhong Tan u8 rsv1[18]; 132ab16b49cSHuazhong Tan }; 133ab16b49cSHuazhong Tan 1346befad60SJie Wang int hclgevf_cmd_send(struct hclgevf_hw *hw, struct hclge_desc *desc, int num); 135cb413bfaSJie Wang void hclgevf_arq_init(struct hclgevf_dev *hdev); 136fedd0c15SSalil Mehta #endif 137