1 /* 2 * Socfpga Reset Controller Driver 3 * 4 * Copyright 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de> 5 * 6 * based on 7 * Allwinner SoCs Reset Controller driver 8 * 9 * Copyright 2013 Maxime Ripard 10 * 11 * Maxime Ripard <maxime.ripard@free-electrons.com> 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License as published by 15 * the Free Software Foundation; either version 2 of the License, or 16 * (at your option) any later version. 17 */ 18 19 #include <linux/err.h> 20 #include <linux/io.h> 21 #include <linux/init.h> 22 #include <linux/of.h> 23 #include <linux/platform_device.h> 24 #include <linux/reset-controller.h> 25 #include <linux/spinlock.h> 26 #include <linux/types.h> 27 28 #define BANK_INCREMENT 4 29 #define NR_BANKS 8 30 31 struct socfpga_reset_data { 32 spinlock_t lock; 33 void __iomem *membase; 34 struct reset_controller_dev rcdev; 35 }; 36 37 static int socfpga_reset_assert(struct reset_controller_dev *rcdev, 38 unsigned long id) 39 { 40 struct socfpga_reset_data *data = container_of(rcdev, 41 struct socfpga_reset_data, 42 rcdev); 43 int reg_width = sizeof(u32); 44 int bank = id / (reg_width * BITS_PER_BYTE); 45 int offset = id % (reg_width * BITS_PER_BYTE); 46 unsigned long flags; 47 u32 reg; 48 49 spin_lock_irqsave(&data->lock, flags); 50 51 reg = readl(data->membase + (bank * BANK_INCREMENT)); 52 writel(reg | BIT(offset), data->membase + (bank * BANK_INCREMENT)); 53 spin_unlock_irqrestore(&data->lock, flags); 54 55 return 0; 56 } 57 58 static int socfpga_reset_deassert(struct reset_controller_dev *rcdev, 59 unsigned long id) 60 { 61 struct socfpga_reset_data *data = container_of(rcdev, 62 struct socfpga_reset_data, 63 rcdev); 64 65 int reg_width = sizeof(u32); 66 int bank = id / (reg_width * BITS_PER_BYTE); 67 int offset = id % (reg_width * BITS_PER_BYTE); 68 unsigned long flags; 69 u32 reg; 70 71 spin_lock_irqsave(&data->lock, flags); 72 73 reg = readl(data->membase + (bank * BANK_INCREMENT)); 74 writel(reg & ~BIT(offset), data->membase + (bank * BANK_INCREMENT)); 75 76 spin_unlock_irqrestore(&data->lock, flags); 77 78 return 0; 79 } 80 81 static int socfpga_reset_status(struct reset_controller_dev *rcdev, 82 unsigned long id) 83 { 84 struct socfpga_reset_data *data = container_of(rcdev, 85 struct socfpga_reset_data, rcdev); 86 int reg_width = sizeof(u32); 87 int bank = id / (reg_width * BITS_PER_BYTE); 88 int offset = id % (reg_width * BITS_PER_BYTE); 89 u32 reg; 90 91 reg = readl(data->membase + (bank * BANK_INCREMENT)); 92 93 return !(reg & BIT(offset)); 94 } 95 96 static const struct reset_control_ops socfpga_reset_ops = { 97 .assert = socfpga_reset_assert, 98 .deassert = socfpga_reset_deassert, 99 .status = socfpga_reset_status, 100 }; 101 102 static int socfpga_reset_probe(struct platform_device *pdev) 103 { 104 struct socfpga_reset_data *data; 105 struct resource *res; 106 struct device *dev = &pdev->dev; 107 struct device_node *np = dev->of_node; 108 u32 modrst_offset; 109 110 /* 111 * The binding was mainlined without the required property. 112 * Do not continue, when we encounter an old DT. 113 */ 114 if (!of_find_property(pdev->dev.of_node, "#reset-cells", NULL)) { 115 dev_err(&pdev->dev, "%pOF missing #reset-cells property\n", 116 pdev->dev.of_node); 117 return -EINVAL; 118 } 119 120 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 121 if (!data) 122 return -ENOMEM; 123 124 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 125 data->membase = devm_ioremap_resource(&pdev->dev, res); 126 if (IS_ERR(data->membase)) 127 return PTR_ERR(data->membase); 128 129 if (of_property_read_u32(np, "altr,modrst-offset", &modrst_offset)) { 130 dev_warn(dev, "missing altr,modrst-offset property, assuming 0x10!\n"); 131 modrst_offset = 0x10; 132 } 133 data->membase += modrst_offset; 134 135 spin_lock_init(&data->lock); 136 137 data->rcdev.owner = THIS_MODULE; 138 data->rcdev.nr_resets = NR_BANKS * (sizeof(u32) * BITS_PER_BYTE); 139 data->rcdev.ops = &socfpga_reset_ops; 140 data->rcdev.of_node = pdev->dev.of_node; 141 142 return devm_reset_controller_register(dev, &data->rcdev); 143 } 144 145 static const struct of_device_id socfpga_reset_dt_ids[] = { 146 { .compatible = "altr,rst-mgr", }, 147 { /* sentinel */ }, 148 }; 149 150 static struct platform_driver socfpga_reset_driver = { 151 .probe = socfpga_reset_probe, 152 .driver = { 153 .name = "socfpga-reset", 154 .of_match_table = socfpga_reset_dt_ids, 155 }, 156 }; 157 builtin_platform_driver(socfpga_reset_driver); 158