1*d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2c8acd6aaSZhangfei Gao /* 3c8acd6aaSZhangfei Gao * MMP Platform DMA Management 4c8acd6aaSZhangfei Gao * 5c8acd6aaSZhangfei Gao * Copyright (c) 2011 Marvell Semiconductors Inc. 6c8acd6aaSZhangfei Gao */ 7c8acd6aaSZhangfei Gao 8c8acd6aaSZhangfei Gao #ifndef MMP_DMA_H 9c8acd6aaSZhangfei Gao #define MMP_DMA_H 10c8acd6aaSZhangfei Gao 11420c0117SRobert Jarzmik struct dma_slave_map; 12420c0117SRobert Jarzmik 13c8acd6aaSZhangfei Gao struct mmp_dma_platdata { 14c8acd6aaSZhangfei Gao int dma_channels; 15c283e41eSRobert Jarzmik int nb_requestors; 16420c0117SRobert Jarzmik int slave_map_cnt; 17420c0117SRobert Jarzmik const struct dma_slave_map *slave_map; 18c8acd6aaSZhangfei Gao }; 19c8acd6aaSZhangfei Gao 20c8acd6aaSZhangfei Gao #endif /* MMP_DMA_H */ 21