16954e415SSteven Rostedt (VMware) // SPDX-License-Identifier: GPL-2.0 26954e415SSteven Rostedt (VMware) 36954e415SSteven Rostedt (VMware) /* Do not include this file directly. */ 46954e415SSteven Rostedt (VMware) 56954e415SSteven Rostedt (VMware) #ifndef _TRACE_INTERNAL_PID_LIST_H 66954e415SSteven Rostedt (VMware) #define _TRACE_INTERNAL_PID_LIST_H 76954e415SSteven Rostedt (VMware) 8*8d6e9098SSteven Rostedt (VMware) /* 9*8d6e9098SSteven Rostedt (VMware) * In order to keep track of what pids to trace, a tree is created much 10*8d6e9098SSteven Rostedt (VMware) * like page tables are used. This creates a sparse bit map, where 11*8d6e9098SSteven Rostedt (VMware) * the tree is filled in when needed. A PID is at most 30 bits (see 12*8d6e9098SSteven Rostedt (VMware) * linux/thread.h), and is broken up into 3 sections based on the bit map 13*8d6e9098SSteven Rostedt (VMware) * of the bits. The 8 MSB is the "upper1" section. The next 8 MSB is the 14*8d6e9098SSteven Rostedt (VMware) * "upper2" section and the 14 LSB is the "lower" section. 15*8d6e9098SSteven Rostedt (VMware) * 16*8d6e9098SSteven Rostedt (VMware) * A trace_pid_list structure holds the "upper1" section, in an 17*8d6e9098SSteven Rostedt (VMware) * array of 256 pointers (1 or 2K in size) to "upper_chunk" unions, where 18*8d6e9098SSteven Rostedt (VMware) * each has an array of 256 pointers (1 or 2K in size) to the "lower_chunk" 19*8d6e9098SSteven Rostedt (VMware) * structures, where each has an array of size 2K bytes representing a bitmask 20*8d6e9098SSteven Rostedt (VMware) * of the 14 LSB of the PID (256 * 8 = 2048) 21*8d6e9098SSteven Rostedt (VMware) * 22*8d6e9098SSteven Rostedt (VMware) * When a trace_pid_list is allocated, it includes the 256 pointer array 23*8d6e9098SSteven Rostedt (VMware) * of the upper1 unions. Then a "cache" of upper and lower is allocated 24*8d6e9098SSteven Rostedt (VMware) * where these will be assigned as needed. 25*8d6e9098SSteven Rostedt (VMware) * 26*8d6e9098SSteven Rostedt (VMware) * When a bit is set in the pid_list bitmask, the pid to use has 27*8d6e9098SSteven Rostedt (VMware) * the 8 MSB masked, and this is used to index the array in the 28*8d6e9098SSteven Rostedt (VMware) * pid_list to find the next upper union. If the element is NULL, 29*8d6e9098SSteven Rostedt (VMware) * then one is retrieved from the upper_list cache. If none is 30*8d6e9098SSteven Rostedt (VMware) * available, then -ENOMEM is returned. 31*8d6e9098SSteven Rostedt (VMware) * 32*8d6e9098SSteven Rostedt (VMware) * The next 8 MSB is used to index into the "upper2" section. If this 33*8d6e9098SSteven Rostedt (VMware) * element is NULL, then it is retrieved from the lower_list cache. 34*8d6e9098SSteven Rostedt (VMware) * Again, if one is not available -ENOMEM is returned. 35*8d6e9098SSteven Rostedt (VMware) * 36*8d6e9098SSteven Rostedt (VMware) * Finally the 14 LSB of the PID is used to set the bit in the 16384 37*8d6e9098SSteven Rostedt (VMware) * bitmask (made up of 2K bytes). 38*8d6e9098SSteven Rostedt (VMware) * 39*8d6e9098SSteven Rostedt (VMware) * When the second upper section or the lower section has their last 40*8d6e9098SSteven Rostedt (VMware) * bit cleared, they are added back to the free list to be reused 41*8d6e9098SSteven Rostedt (VMware) * when needed. 42*8d6e9098SSteven Rostedt (VMware) */ 43*8d6e9098SSteven Rostedt (VMware) 44*8d6e9098SSteven Rostedt (VMware) #define UPPER_BITS 8 45*8d6e9098SSteven Rostedt (VMware) #define UPPER_MAX (1 << UPPER_BITS) 46*8d6e9098SSteven Rostedt (VMware) #define UPPER1_SIZE (1 << UPPER_BITS) 47*8d6e9098SSteven Rostedt (VMware) #define UPPER2_SIZE (1 << UPPER_BITS) 48*8d6e9098SSteven Rostedt (VMware) 49*8d6e9098SSteven Rostedt (VMware) #define LOWER_BITS 14 50*8d6e9098SSteven Rostedt (VMware) #define LOWER_MAX (1 << LOWER_BITS) 51*8d6e9098SSteven Rostedt (VMware) #define LOWER_SIZE (LOWER_MAX / BITS_PER_LONG) 52*8d6e9098SSteven Rostedt (VMware) 53*8d6e9098SSteven Rostedt (VMware) #define UPPER1_SHIFT (LOWER_BITS + UPPER_BITS) 54*8d6e9098SSteven Rostedt (VMware) #define UPPER2_SHIFT LOWER_BITS 55*8d6e9098SSteven Rostedt (VMware) #define LOWER_MASK (LOWER_MAX - 1) 56*8d6e9098SSteven Rostedt (VMware) 57*8d6e9098SSteven Rostedt (VMware) #define UPPER_MASK (UPPER_MAX - 1) 58*8d6e9098SSteven Rostedt (VMware) 59*8d6e9098SSteven Rostedt (VMware) /* According to linux/thread.h pids can not be bigger than or equal to 1 << 30 */ 60*8d6e9098SSteven Rostedt (VMware) #define MAX_PID (1 << 30) 61*8d6e9098SSteven Rostedt (VMware) 62*8d6e9098SSteven Rostedt (VMware) /* Just keep 6 chunks of both upper and lower in the cache on alloc */ 63*8d6e9098SSteven Rostedt (VMware) #define CHUNK_ALLOC 6 64*8d6e9098SSteven Rostedt (VMware) 65*8d6e9098SSteven Rostedt (VMware) /* Have 2 chunks free, trigger a refill of the cache */ 66*8d6e9098SSteven Rostedt (VMware) #define CHUNK_REALLOC 2 67*8d6e9098SSteven Rostedt (VMware) 68*8d6e9098SSteven Rostedt (VMware) union lower_chunk { 69*8d6e9098SSteven Rostedt (VMware) union lower_chunk *next; 70*8d6e9098SSteven Rostedt (VMware) unsigned long data[LOWER_SIZE]; // 2K in size 71*8d6e9098SSteven Rostedt (VMware) }; 72*8d6e9098SSteven Rostedt (VMware) 73*8d6e9098SSteven Rostedt (VMware) union upper_chunk { 74*8d6e9098SSteven Rostedt (VMware) union upper_chunk *next; 75*8d6e9098SSteven Rostedt (VMware) union lower_chunk *data[UPPER2_SIZE]; // 1 or 2K in size 76*8d6e9098SSteven Rostedt (VMware) }; 77*8d6e9098SSteven Rostedt (VMware) 786954e415SSteven Rostedt (VMware) struct trace_pid_list { 79*8d6e9098SSteven Rostedt (VMware) raw_spinlock_t lock; 80*8d6e9098SSteven Rostedt (VMware) struct irq_work refill_irqwork; 81*8d6e9098SSteven Rostedt (VMware) union upper_chunk *upper[UPPER1_SIZE]; // 1 or 2K in size 82*8d6e9098SSteven Rostedt (VMware) union upper_chunk *upper_list; 83*8d6e9098SSteven Rostedt (VMware) union lower_chunk *lower_list; 84*8d6e9098SSteven Rostedt (VMware) int free_upper_chunks; 85*8d6e9098SSteven Rostedt (VMware) int free_lower_chunks; 866954e415SSteven Rostedt (VMware) }; 876954e415SSteven Rostedt (VMware) 886954e415SSteven Rostedt (VMware) #endif /* _TRACE_INTERNAL_PID_LIST_H */ 89