1/*	$NetBSD: atomic_nand_32.S,v 1.1 2013/11/08 22:42:52 matt Exp $	*/
2
3/*-
4 * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas <matt@3am-software.com>
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#include "atomic_op_asm.h"
33
34#ifdef _ARM_ARCH_6
35
36ENTRY_NP(_atomic_nand_32)
37	mov	ip, r0
381:	ldrex	r0, [ip]		/* load old value (to be returned) */
39	mvns	r3, r0			/* complement source */
40	ands	r3, r3, r1		/* calculate new value */
41	strex	r2, r3, [ip]		/* try to store */
42	cmp	r2, #0			/*   succeed? */
43	bne	1b			/*     no, try again */
44#ifdef _ARM_ARCH_7
45	dmb
46#else
47	mcr	p15, 0, r2, c7, c10, 5	/* data memory barrier */
48#endif
49	RET				/* return old value */
50END(_atomic_nand_32)
51
52ATOMIC_OP_ALIAS(atomic_nand_32,_atomic_nand_32)
53ATOMIC_OP_ALIAS(atomic_nand_uint,_atomic_nand_32)
54ATOMIC_OP_ALIAS(atomic_nand_ulong,_atomic_nand_32)
55STRONG_ALIAS(__sync_fetch_and_nand_4,_atomic_nand_32)
56STRONG_ALIAS(_atomic_nand_uint,_atomic_nand_32)
57STRONG_ALIAS(_atomic_nand_ulong,_atomic_nand_32)
58
59ENTRY_NP(_atomic_nand_32_nv)
60	mov	ip, r0			/* need r0 for return value */
611:	ldrex	r0, [ip]		/* load old value */
62	mvns	r0, r0			/* complement source */
63	ands	r0, r0, r1		/* calculate new value (return value) */
64	strex	r2, r0, [ip]		/* try to store */
65	cmp	r2, #0			/*   succeed? */
66	bne	1b			/*     no, try again? */
67#ifdef _ARM_ARCH_7
68	dmb
69#else
70	mcr	p15, 0, r2, c7, c10, 5	/* data memory barrier */
71#endif
72	RET				/* return new value */
73END(_atomic_nand_32_nv)
74
75ATOMIC_OP_ALIAS(atomic_nand_32_nv,_atomic_nand_32_nv)
76ATOMIC_OP_ALIAS(atomic_nand_uint_nv,_atomic_nand_32_nv)
77ATOMIC_OP_ALIAS(atomic_nand_ulong_nv,_atomic_nand_32_nv)
78STRONG_ALIAS(__sync_nand_and_fetch_4,_atomic_nand_32_nv)
79STRONG_ALIAS(_atomic_nand_uint_nv,_atomic_nand_32_nv)
80STRONG_ALIAS(_atomic_nand_ulong_nv,_atomic_nand_32_nv)
81
82#endif /* _ARM_ARCH_6 */
83