xref: /minix/common/lib/libc/arch/mips/atomic/atomic_add.S (revision 0a6a1f1d)
1/*	$NetBSD: atomic_add.S,v 1.5 2015/06/01 23:16:54 matt Exp $	*/
2
3/*-
4 * Copyright (c) 2008 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <machine/asm.h>
30#include "atomic_op_asm.h"
31
32RCSID("$NetBSD: atomic_add.S,v 1.5 2015/06/01 23:16:54 matt Exp $")
33
34	.text
35	.set	noreorder
36#ifdef _KERNEL_OPT
37#include "opt_cputype.h"
38#ifndef MIPS3_LOONGSON2F
39	.set	noat
40	.set	nomacro
41#endif
42#else /* _KERNEL_OPT */
43	.set	noat
44	.set	nomacro
45#endif /* _KERNEL_OPT */
46
47
48LEAF(_atomic_add_32)
49#if defined(_MIPS_ARCH_OCTEONP) || defined(_MIPS_ARCH_OCTEON2)
50	saa		a1, (a0)
51#else
521:	INT_LL		t0, 0(a0)
53	 nop
54	INT_ADDU	t0, a1
55	INT_SC		t0, 0(a0)
56	beq		t0, zero, 1b
57 	 nop
58#endif
59	j		ra
60	 nop
61END(_atomic_add_32)
62ATOMIC_OP_ALIAS(atomic_add_32, _atomic_add_32)
63
64LEAF(_atomic_add_32_nv)
651:	INT_LL		v0, 0(a0)
66	 nop
67	INT_ADDU	v0, a1
68	move		t0, v0
69	INT_SC		t0, 0(a0)
70	beq		t0, zero, 1b
71 	 nop
72	j		ra
73	 nop
74END(_atomic_add_32_nv)
75ATOMIC_OP_ALIAS(atomic_add_32_nv, _atomic_add_32_nv)
76
77#if !defined(__mips_o32)
78LEAF(_atomic_add_64)
79#if defined(_MIPS_ARCH_OCTEONP) || defined(_MIPS_ARCH_OCTEON2)
80	saad		a1, (a0)
81#else
821:	REG_LL		t0, 0(a0)
83	 nop
84	REG_ADDU	t0, a1
85	REG_SC		t0, 0(a0)
86	beq		t0, zero, 1b
87 	 nop
88#endif
89	j		ra
90	 nop
91END(_atomic_add_64)
92ATOMIC_OP_ALIAS(atomic_add_64, _atomic_add_64)
93
94LEAF(_atomic_add_64_nv)
951:	REG_LL		v0, 0(a0)
96	 nop
97	REG_ADDU	v0, a1
98	move		t0, v0
99	REG_SC		t0, 0(a0)
100	beq		t0, zero, 1b
101 	 nop
102	j		ra
103	 nop
104END(_atomic_add_64_nv)
105ATOMIC_OP_ALIAS(atomic_add_64_nv, _atomic_add_64_nv)
106#endif
107
108#ifdef _LP64
109STRONG_ALIAS(_atomic_add_long,		_atomic_add_64)
110STRONG_ALIAS(_atomic_add_long_nv,	_atomic_add_64_nv)
111STRONG_ALIAS(_atomic_add_ptr,		_atomic_add_64)
112STRONG_ALIAS(_atomic_add_ptr_nv,	_atomic_add_64_nv)
113#else
114STRONG_ALIAS(_atomic_add_long,		_atomic_add_32)
115STRONG_ALIAS(_atomic_add_long_nv,	_atomic_add_32_nv)
116STRONG_ALIAS(_atomic_add_ptr,		_atomic_add_32)
117STRONG_ALIAS(_atomic_add_ptr_nv,	_atomic_add_32_nv)
118#endif
119STRONG_ALIAS(_atomic_add_int,		_atomic_add_32)
120STRONG_ALIAS(_atomic_add_int_nv,	_atomic_add_32_nv)
121
122ATOMIC_OP_ALIAS(atomic_add_int,		_atomic_add_int)
123ATOMIC_OP_ALIAS(atomic_add_int_nv,	_atomic_add_int_nv)
124ATOMIC_OP_ALIAS(atomic_add_ptr,		_atomic_add_ptr)
125ATOMIC_OP_ALIAS(atomic_add_ptr_nv,	_atomic_add_ptr_nv)
126ATOMIC_OP_ALIAS(atomic_add_long,	_atomic_add_long)
127ATOMIC_OP_ALIAS(atomic_add_long_nv,	_atomic_add_long_nv)
128