1 //===-- AArch64MCTargetDesc.h - AArch64 Target Descriptions -----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file provides AArch64 specific target descriptions. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_AARCH64MCTARGETDESC_H 15 #define LLVM_AARCH64MCTARGETDESC_H 16 17 #include "llvm/Support/DataTypes.h" 18 19 namespace llvm { 20 class MCAsmBackend; 21 class MCCodeEmitter; 22 class MCContext; 23 class MCInstrInfo; 24 class MCObjectWriter; 25 class MCRegisterInfo; 26 class MCSubtargetInfo; 27 class StringRef; 28 class Target; 29 class raw_ostream; 30 31 extern Target TheAArch64Target; 32 33 namespace AArch64_MC { 34 MCSubtargetInfo *createAArch64MCSubtargetInfo(StringRef TT, StringRef CPU, 35 StringRef FS); 36 } 37 38 MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII, 39 const MCRegisterInfo &MRI, 40 const MCSubtargetInfo &STI, 41 MCContext &Ctx); 42 43 MCObjectWriter *createAArch64ELFObjectWriter(raw_ostream &OS, 44 uint8_t OSABI); 45 46 MCAsmBackend *createAArch64AsmBackend(const Target &T, 47 const MCRegisterInfo &MRI, 48 StringRef TT, StringRef CPU); 49 50 } // End llvm namespace 51 52 // Defines symbolic names for AArch64 registers. This defines a mapping from 53 // register name to register number. 54 // 55 #define GET_REGINFO_ENUM 56 #include "AArch64GenRegisterInfo.inc" 57 58 // Defines symbolic names for the AArch64 instructions. 59 // 60 #define GET_INSTRINFO_ENUM 61 #include "AArch64GenInstrInfo.inc" 62 63 #define GET_SUBTARGETINFO_ENUM 64 #include "AArch64GenSubtargetInfo.inc" 65 66 #endif 67