1 //===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file provides Mips specific target descriptions. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "MipsMCTargetDesc.h" 15 #include "InstPrinter/MipsInstPrinter.h" 16 #include "MipsMCAsmInfo.h" 17 #include "MipsTargetStreamer.h" 18 #include "llvm/MC/MCCodeGenInfo.h" 19 #include "llvm/MC/MCELF.h" 20 #include "llvm/MC/MCELFStreamer.h" 21 #include "llvm/MC/MCInstrInfo.h" 22 #include "llvm/MC/MCRegisterInfo.h" 23 #include "llvm/MC/MCSubtargetInfo.h" 24 #include "llvm/MC/MCSymbol.h" 25 #include "llvm/MC/MachineLocation.h" 26 #include "llvm/Support/CommandLine.h" 27 #include "llvm/Support/ErrorHandling.h" 28 #include "llvm/Support/FormattedStream.h" 29 #include "llvm/Support/TargetRegistry.h" 30 31 #define GET_INSTRINFO_MC_DESC 32 #include "MipsGenInstrInfo.inc" 33 34 #define GET_SUBTARGETINFO_MC_DESC 35 #include "MipsGenSubtargetInfo.inc" 36 37 #define GET_REGINFO_MC_DESC 38 #include "MipsGenRegisterInfo.inc" 39 40 using namespace llvm; 41 42 static std::string ParseMipsTriple(StringRef TT, StringRef CPU) { 43 std::string MipsArchFeature; 44 size_t DashPosition = 0; 45 StringRef TheTriple; 46 47 // Let's see if there is a dash, like mips-unknown-linux. 48 DashPosition = TT.find('-'); 49 50 if (DashPosition == StringRef::npos) { 51 // No dash, we check the string size. 52 TheTriple = TT.substr(0); 53 } else { 54 // We are only interested in substring before dash. 55 TheTriple = TT.substr(0,DashPosition); 56 } 57 58 if (TheTriple == "mips" || TheTriple == "mipsel") { 59 if (CPU.empty() || CPU == "mips32") { 60 MipsArchFeature = "+mips32"; 61 } else if (CPU == "mips32r2") { 62 MipsArchFeature = "+mips32r2"; 63 } 64 } else { 65 if (CPU.empty() || CPU == "mips64") { 66 MipsArchFeature = "+mips64"; 67 } else if (CPU == "mips64r2") { 68 MipsArchFeature = "+mips64r2"; 69 } 70 } 71 return MipsArchFeature; 72 } 73 74 static MCInstrInfo *createMipsMCInstrInfo() { 75 MCInstrInfo *X = new MCInstrInfo(); 76 InitMipsMCInstrInfo(X); 77 return X; 78 } 79 80 static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) { 81 MCRegisterInfo *X = new MCRegisterInfo(); 82 InitMipsMCRegisterInfo(X, Mips::RA); 83 return X; 84 } 85 86 static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU, 87 StringRef FS) { 88 std::string ArchFS = ParseMipsTriple(TT,CPU); 89 if (!FS.empty()) { 90 if (!ArchFS.empty()) 91 ArchFS = ArchFS + "," + FS.str(); 92 else 93 ArchFS = FS; 94 } 95 MCSubtargetInfo *X = new MCSubtargetInfo(); 96 InitMipsMCSubtargetInfo(X, TT, CPU, ArchFS); 97 return X; 98 } 99 100 static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) { 101 MCAsmInfo *MAI = new MipsMCAsmInfo(TT); 102 103 unsigned SP = MRI.getDwarfRegNum(Mips::SP, true); 104 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, SP, 0); 105 MAI->addInitialFrameState(Inst); 106 107 return MAI; 108 } 109 110 static MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM, 111 CodeModel::Model CM, 112 CodeGenOpt::Level OL) { 113 MCCodeGenInfo *X = new MCCodeGenInfo(); 114 if (CM == CodeModel::JITDefault) 115 RM = Reloc::Static; 116 else if (RM == Reloc::Default) 117 RM = Reloc::PIC_; 118 X->InitMCCodeGenInfo(RM, CM, OL); 119 return X; 120 } 121 122 static MCInstPrinter *createMipsMCInstPrinter(const Target &T, 123 unsigned SyntaxVariant, 124 const MCAsmInfo &MAI, 125 const MCInstrInfo &MII, 126 const MCRegisterInfo &MRI, 127 const MCSubtargetInfo &STI) { 128 return new MipsInstPrinter(MAI, MII, MRI); 129 } 130 131 static MCStreamer *createMCStreamer(const Target &T, StringRef TT, 132 MCContext &Context, MCAsmBackend &MAB, 133 raw_ostream &OS, MCCodeEmitter *Emitter, 134 bool RelaxAll, bool NoExecStack) { 135 MipsTargetELFStreamer *S = new MipsTargetELFStreamer(); 136 return createELFStreamer(Context, S, MAB, OS, Emitter, RelaxAll, NoExecStack); 137 } 138 139 static MCStreamer * 140 createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS, 141 bool isVerboseAsm, bool useLoc, bool useCFI, 142 bool useDwarfDirectory, MCInstPrinter *InstPrint, 143 MCCodeEmitter *CE, MCAsmBackend *TAB, bool ShowInst) { 144 MipsTargetAsmStreamer *S = new MipsTargetAsmStreamer(OS); 145 146 return llvm::createAsmStreamer(Ctx, S, OS, isVerboseAsm, useLoc, useCFI, 147 useDwarfDirectory, InstPrint, CE, TAB, 148 ShowInst); 149 } 150 151 extern "C" void LLVMInitializeMipsTargetMC() { 152 // Register the MC asm info. 153 RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo); 154 RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo); 155 RegisterMCAsmInfoFn A(TheMips64Target, createMipsMCAsmInfo); 156 RegisterMCAsmInfoFn B(TheMips64elTarget, createMipsMCAsmInfo); 157 158 // Register the MC codegen info. 159 TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget, 160 createMipsMCCodeGenInfo); 161 TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget, 162 createMipsMCCodeGenInfo); 163 TargetRegistry::RegisterMCCodeGenInfo(TheMips64Target, 164 createMipsMCCodeGenInfo); 165 TargetRegistry::RegisterMCCodeGenInfo(TheMips64elTarget, 166 createMipsMCCodeGenInfo); 167 168 // Register the MC instruction info. 169 TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo); 170 TargetRegistry::RegisterMCInstrInfo(TheMipselTarget, createMipsMCInstrInfo); 171 TargetRegistry::RegisterMCInstrInfo(TheMips64Target, createMipsMCInstrInfo); 172 TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget, 173 createMipsMCInstrInfo); 174 175 // Register the MC register info. 176 TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo); 177 TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo); 178 TargetRegistry::RegisterMCRegInfo(TheMips64Target, createMipsMCRegisterInfo); 179 TargetRegistry::RegisterMCRegInfo(TheMips64elTarget, 180 createMipsMCRegisterInfo); 181 182 // Register the MC Code Emitter 183 TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget, 184 createMipsMCCodeEmitterEB); 185 TargetRegistry::RegisterMCCodeEmitter(TheMipselTarget, 186 createMipsMCCodeEmitterEL); 187 TargetRegistry::RegisterMCCodeEmitter(TheMips64Target, 188 createMipsMCCodeEmitterEB); 189 TargetRegistry::RegisterMCCodeEmitter(TheMips64elTarget, 190 createMipsMCCodeEmitterEL); 191 192 // Register the object streamer. 193 TargetRegistry::RegisterMCObjectStreamer(TheMipsTarget, createMCStreamer); 194 TargetRegistry::RegisterMCObjectStreamer(TheMipselTarget, createMCStreamer); 195 TargetRegistry::RegisterMCObjectStreamer(TheMips64Target, createMCStreamer); 196 TargetRegistry::RegisterMCObjectStreamer(TheMips64elTarget, 197 createMCStreamer); 198 199 // Register the asm streamer. 200 TargetRegistry::RegisterAsmStreamer(TheMipsTarget, createMCAsmStreamer); 201 TargetRegistry::RegisterAsmStreamer(TheMipselTarget, createMCAsmStreamer); 202 TargetRegistry::RegisterAsmStreamer(TheMips64Target, createMCAsmStreamer); 203 TargetRegistry::RegisterAsmStreamer(TheMips64elTarget, createMCAsmStreamer); 204 205 // Register the asm backend. 206 TargetRegistry::RegisterMCAsmBackend(TheMipsTarget, 207 createMipsAsmBackendEB32); 208 TargetRegistry::RegisterMCAsmBackend(TheMipselTarget, 209 createMipsAsmBackendEL32); 210 TargetRegistry::RegisterMCAsmBackend(TheMips64Target, 211 createMipsAsmBackendEB64); 212 TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget, 213 createMipsAsmBackendEL64); 214 215 // Register the MC subtarget info. 216 TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget, 217 createMipsMCSubtargetInfo); 218 TargetRegistry::RegisterMCSubtargetInfo(TheMipselTarget, 219 createMipsMCSubtargetInfo); 220 TargetRegistry::RegisterMCSubtargetInfo(TheMips64Target, 221 createMipsMCSubtargetInfo); 222 TargetRegistry::RegisterMCSubtargetInfo(TheMips64elTarget, 223 createMipsMCSubtargetInfo); 224 225 // Register the MCInstPrinter. 226 TargetRegistry::RegisterMCInstPrinter(TheMipsTarget, 227 createMipsMCInstPrinter); 228 TargetRegistry::RegisterMCInstPrinter(TheMipselTarget, 229 createMipsMCInstPrinter); 230 TargetRegistry::RegisterMCInstPrinter(TheMips64Target, 231 createMipsMCInstPrinter); 232 TargetRegistry::RegisterMCInstPrinter(TheMips64elTarget, 233 createMipsMCInstPrinter); 234 } 235