1 //===-- MipsISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Mips --------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines an instruction selector for the MIPS target.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "MipsISelDAGToDAG.h"
15 #include "MCTargetDesc/MipsBaseInfo.h"
16 #include "Mips.h"
17 #include "Mips16ISelDAGToDAG.h"
18 #include "MipsMachineFunction.h"
19 #include "MipsRegisterInfo.h"
20 #include "MipsSEISelDAGToDAG.h"
21 #include "llvm/CodeGen/MachineConstantPool.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/CodeGen/SelectionDAGNodes.h"
27 #include "llvm/IR/CFG.h"
28 #include "llvm/IR/GlobalValue.h"
29 #include "llvm/IR/Instructions.h"
30 #include "llvm/IR/Intrinsics.h"
31 #include "llvm/IR/Type.h"
32 #include "llvm/Support/Debug.h"
33 #include "llvm/Support/ErrorHandling.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/Target/TargetMachine.h"
36 using namespace llvm;
37
38 #define DEBUG_TYPE "mips-isel"
39
40 //===----------------------------------------------------------------------===//
41 // Instruction Selector Implementation
42 //===----------------------------------------------------------------------===//
43
44 //===----------------------------------------------------------------------===//
45 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
46 // instructions for SelectionDAG operations.
47 //===----------------------------------------------------------------------===//
48
runOnMachineFunction(MachineFunction & MF)49 bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
50 Subtarget = &TM.getSubtarget<MipsSubtarget>();
51 bool Ret = SelectionDAGISel::runOnMachineFunction(MF);
52
53 processFunctionAfterISel(MF);
54
55 return Ret;
56 }
57
58 /// getGlobalBaseReg - Output the instructions required to put the
59 /// GOT address into a register.
getGlobalBaseReg()60 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
61 unsigned GlobalBaseReg = MF->getInfo<MipsFunctionInfo>()->getGlobalBaseReg();
62 return CurDAG->getRegister(GlobalBaseReg,
63 getTargetLowering()->getPointerTy()).getNode();
64 }
65
66 /// ComplexPattern used on MipsInstrInfo
67 /// Used on Mips Load/Store instructions
selectAddrRegImm(SDValue Addr,SDValue & Base,SDValue & Offset) const68 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,
69 SDValue &Offset) const {
70 llvm_unreachable("Unimplemented function.");
71 return false;
72 }
73
selectAddrRegReg(SDValue Addr,SDValue & Base,SDValue & Offset) const74 bool MipsDAGToDAGISel::selectAddrRegReg(SDValue Addr, SDValue &Base,
75 SDValue &Offset) const {
76 llvm_unreachable("Unimplemented function.");
77 return false;
78 }
79
selectAddrDefault(SDValue Addr,SDValue & Base,SDValue & Offset) const80 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base,
81 SDValue &Offset) const {
82 llvm_unreachable("Unimplemented function.");
83 return false;
84 }
85
selectIntAddr(SDValue Addr,SDValue & Base,SDValue & Offset) const86 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base,
87 SDValue &Offset) const {
88 llvm_unreachable("Unimplemented function.");
89 return false;
90 }
91
selectIntAddrMM(SDValue Addr,SDValue & Base,SDValue & Offset) const92 bool MipsDAGToDAGISel::selectIntAddrMM(SDValue Addr, SDValue &Base,
93 SDValue &Offset) const {
94 llvm_unreachable("Unimplemented function.");
95 return false;
96 }
97
selectIntAddrMSA(SDValue Addr,SDValue & Base,SDValue & Offset) const98 bool MipsDAGToDAGISel::selectIntAddrMSA(SDValue Addr, SDValue &Base,
99 SDValue &Offset) const {
100 llvm_unreachable("Unimplemented function.");
101 return false;
102 }
103
selectAddr16(SDNode * Parent,SDValue N,SDValue & Base,SDValue & Offset,SDValue & Alias)104 bool MipsDAGToDAGISel::selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
105 SDValue &Offset, SDValue &Alias) {
106 llvm_unreachable("Unimplemented function.");
107 return false;
108 }
109
selectVSplat(SDNode * N,APInt & Imm) const110 bool MipsDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm) const {
111 llvm_unreachable("Unimplemented function.");
112 return false;
113 }
114
selectVSplatUimm1(SDValue N,SDValue & Imm) const115 bool MipsDAGToDAGISel::selectVSplatUimm1(SDValue N, SDValue &Imm) const {
116 llvm_unreachable("Unimplemented function.");
117 return false;
118 }
119
selectVSplatUimm2(SDValue N,SDValue & Imm) const120 bool MipsDAGToDAGISel::selectVSplatUimm2(SDValue N, SDValue &Imm) const {
121 llvm_unreachable("Unimplemented function.");
122 return false;
123 }
124
selectVSplatUimm3(SDValue N,SDValue & Imm) const125 bool MipsDAGToDAGISel::selectVSplatUimm3(SDValue N, SDValue &Imm) const {
126 llvm_unreachable("Unimplemented function.");
127 return false;
128 }
129
selectVSplatUimm4(SDValue N,SDValue & Imm) const130 bool MipsDAGToDAGISel::selectVSplatUimm4(SDValue N, SDValue &Imm) const {
131 llvm_unreachable("Unimplemented function.");
132 return false;
133 }
134
selectVSplatUimm5(SDValue N,SDValue & Imm) const135 bool MipsDAGToDAGISel::selectVSplatUimm5(SDValue N, SDValue &Imm) const {
136 llvm_unreachable("Unimplemented function.");
137 return false;
138 }
139
selectVSplatUimm6(SDValue N,SDValue & Imm) const140 bool MipsDAGToDAGISel::selectVSplatUimm6(SDValue N, SDValue &Imm) const {
141 llvm_unreachable("Unimplemented function.");
142 return false;
143 }
144
selectVSplatUimm8(SDValue N,SDValue & Imm) const145 bool MipsDAGToDAGISel::selectVSplatUimm8(SDValue N, SDValue &Imm) const {
146 llvm_unreachable("Unimplemented function.");
147 return false;
148 }
149
selectVSplatSimm5(SDValue N,SDValue & Imm) const150 bool MipsDAGToDAGISel::selectVSplatSimm5(SDValue N, SDValue &Imm) const {
151 llvm_unreachable("Unimplemented function.");
152 return false;
153 }
154
selectVSplatUimmPow2(SDValue N,SDValue & Imm) const155 bool MipsDAGToDAGISel::selectVSplatUimmPow2(SDValue N, SDValue &Imm) const {
156 llvm_unreachable("Unimplemented function.");
157 return false;
158 }
159
selectVSplatUimmInvPow2(SDValue N,SDValue & Imm) const160 bool MipsDAGToDAGISel::selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const {
161 llvm_unreachable("Unimplemented function.");
162 return false;
163 }
164
selectVSplatMaskL(SDValue N,SDValue & Imm) const165 bool MipsDAGToDAGISel::selectVSplatMaskL(SDValue N, SDValue &Imm) const {
166 llvm_unreachable("Unimplemented function.");
167 return false;
168 }
169
selectVSplatMaskR(SDValue N,SDValue & Imm) const170 bool MipsDAGToDAGISel::selectVSplatMaskR(SDValue N, SDValue &Imm) const {
171 llvm_unreachable("Unimplemented function.");
172 return false;
173 }
174
175 /// Select instructions not customized! Used for
176 /// expanded, promoted and normal instructions
Select(SDNode * Node)177 SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
178 unsigned Opcode = Node->getOpcode();
179
180 // Dump information about the Node being selected
181 DEBUG(errs() << "Selecting: "; Node->dump(CurDAG); errs() << "\n");
182
183 // If we have a custom node, we already have selected!
184 if (Node->isMachineOpcode()) {
185 DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
186 Node->setNodeId(-1);
187 return nullptr;
188 }
189
190 // See if subclasses can handle this node.
191 std::pair<bool, SDNode*> Ret = selectNode(Node);
192
193 if (Ret.first)
194 return Ret.second;
195
196 switch(Opcode) {
197 default: break;
198
199 // Get target GOT address.
200 case ISD::GLOBAL_OFFSET_TABLE:
201 return getGlobalBaseReg();
202
203 #ifndef NDEBUG
204 case ISD::LOAD:
205 case ISD::STORE:
206 assert((Subtarget->systemSupportsUnalignedAccess() ||
207 cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <=
208 cast<MemSDNode>(Node)->getAlignment()) &&
209 "Unexpected unaligned loads/stores.");
210 break;
211 #endif
212 }
213
214 // Select the default instruction
215 SDNode *ResNode = SelectCode(Node);
216
217 DEBUG(errs() << "=> ");
218 if (ResNode == nullptr || ResNode == Node)
219 DEBUG(Node->dump(CurDAG));
220 else
221 DEBUG(ResNode->dump(CurDAG));
222 DEBUG(errs() << "\n");
223 return ResNode;
224 }
225
226 bool MipsDAGToDAGISel::
SelectInlineAsmMemoryOperand(const SDValue & Op,char ConstraintCode,std::vector<SDValue> & OutOps)227 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
228 std::vector<SDValue> &OutOps) {
229 assert(ConstraintCode == 'm' && "unexpected asm memory constraint");
230 OutOps.push_back(Op);
231 return false;
232 }
233
234 /// createMipsISelDag - This pass converts a legalized DAG into a
235 /// MIPS-specific DAG, ready for instruction scheduling.
createMipsISelDag(MipsTargetMachine & TM)236 FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) {
237 if (TM.getSubtargetImpl()->inMips16Mode())
238 return llvm::createMips16ISelDag(TM);
239
240 return llvm::createMipsSEISelDag(TM);
241 }
242