1 //=======- NVPTXFrameLowering.cpp - NVPTX Frame Information ---*- C++ -*-=====// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the NVPTX implementation of TargetFrameLowering class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "NVPTXFrameLowering.h" 15 #include "NVPTX.h" 16 #include "NVPTXRegisterInfo.h" 17 #include "NVPTXSubtarget.h" 18 #include "NVPTXTargetMachine.h" 19 #include "llvm/ADT/BitVector.h" 20 #include "llvm/CodeGen/MachineFrameInfo.h" 21 #include "llvm/CodeGen/MachineFunction.h" 22 #include "llvm/CodeGen/MachineInstrBuilder.h" 23 #include "llvm/CodeGen/MachineRegisterInfo.h" 24 #include "llvm/MC/MachineLocation.h" 25 #include "llvm/Target/TargetInstrInfo.h" 26 27 using namespace llvm; 28 29 bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; } 30 31 void NVPTXFrameLowering::emitPrologue(MachineFunction &MF) const { 32 if (MF.getFrameInfo()->hasStackObjects()) { 33 MachineBasicBlock &MBB = MF.front(); 34 // Insert "mov.u32 %SP, %Depot" 35 MachineBasicBlock::iterator MBBI = MBB.begin(); 36 // This instruction really occurs before first instruction 37 // in the BB, so giving it no debug location. 38 DebugLoc dl = DebugLoc(); 39 40 MachineRegisterInfo &MRI = MF.getRegInfo(); 41 42 // mov %SPL, %depot; 43 // cvta.local %SP, %SPL; 44 if (is64bit) { 45 unsigned LocalReg = MRI.createVirtualRegister(&NVPTX::Int64RegsRegClass); 46 MachineInstr *MI = BuildMI( 47 MBB, MBBI, dl, tm.getInstrInfo()->get(NVPTX::cvta_local_yes_64), 48 NVPTX::VRFrame).addReg(LocalReg); 49 BuildMI(MBB, MI, dl, tm.getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR_64), 50 LocalReg).addImm(MF.getFunctionNumber()); 51 } else { 52 unsigned LocalReg = MRI.createVirtualRegister(&NVPTX::Int32RegsRegClass); 53 MachineInstr *MI = BuildMI( 54 MBB, MBBI, dl, tm.getInstrInfo()->get(NVPTX::cvta_local_yes), 55 NVPTX::VRFrame).addReg(LocalReg); 56 BuildMI(MBB, MI, dl, tm.getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR), 57 LocalReg).addImm(MF.getFunctionNumber()); 58 } 59 } 60 } 61 62 void NVPTXFrameLowering::emitEpilogue(MachineFunction &MF, 63 MachineBasicBlock &MBB) const {} 64 65 // This function eliminates ADJCALLSTACKDOWN, 66 // ADJCALLSTACKUP pseudo instructions 67 void NVPTXFrameLowering::eliminateCallFramePseudoInstr( 68 MachineFunction &MF, MachineBasicBlock &MBB, 69 MachineBasicBlock::iterator I) const { 70 // Simply discard ADJCALLSTACKDOWN, 71 // ADJCALLSTACKUP instructions. 72 MBB.erase(I); 73 } 74