1f4a2713aSLionel Sambuc //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
2f4a2713aSLionel Sambuc //
3f4a2713aSLionel Sambuc // The LLVM Compiler Infrastructure
4f4a2713aSLionel Sambuc //
5f4a2713aSLionel Sambuc // This file is distributed under the University of Illinois Open Source
6f4a2713aSLionel Sambuc // License. See LICENSE.TXT for details.
7f4a2713aSLionel Sambuc //
8f4a2713aSLionel Sambuc //===----------------------------------------------------------------------===//
9f4a2713aSLionel Sambuc //
10f4a2713aSLionel Sambuc // Top-level implementation for the PowerPC target.
11f4a2713aSLionel Sambuc //
12f4a2713aSLionel Sambuc //===----------------------------------------------------------------------===//
13f4a2713aSLionel Sambuc
14f4a2713aSLionel Sambuc #include "PPCTargetMachine.h"
15f4a2713aSLionel Sambuc #include "PPC.h"
16*0a6a1f1dSLionel Sambuc #include "PPCTargetObjectFile.h"
17f4a2713aSLionel Sambuc #include "llvm/CodeGen/Passes.h"
18*0a6a1f1dSLionel Sambuc #include "llvm/IR/Function.h"
19f4a2713aSLionel Sambuc #include "llvm/MC/MCStreamer.h"
20f4a2713aSLionel Sambuc #include "llvm/PassManager.h"
21f4a2713aSLionel Sambuc #include "llvm/Support/CommandLine.h"
22f4a2713aSLionel Sambuc #include "llvm/Support/FormattedStream.h"
23f4a2713aSLionel Sambuc #include "llvm/Support/TargetRegistry.h"
24f4a2713aSLionel Sambuc #include "llvm/Target/TargetOptions.h"
25*0a6a1f1dSLionel Sambuc #include "llvm/Transforms/Scalar.h"
26f4a2713aSLionel Sambuc using namespace llvm;
27f4a2713aSLionel Sambuc
28f4a2713aSLionel Sambuc static cl::
29f4a2713aSLionel Sambuc opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden,
30f4a2713aSLionel Sambuc cl::desc("Disable CTR loops for PPC"));
31f4a2713aSLionel Sambuc
32*0a6a1f1dSLionel Sambuc static cl::opt<bool>
33*0a6a1f1dSLionel Sambuc VSXFMAMutateEarly("schedule-ppc-vsx-fma-mutation-early",
34*0a6a1f1dSLionel Sambuc cl::Hidden, cl::desc("Schedule VSX FMA instruction mutation early"));
35*0a6a1f1dSLionel Sambuc
36*0a6a1f1dSLionel Sambuc static cl::opt<bool>
37*0a6a1f1dSLionel Sambuc EnableGEPOpt("ppc-gep-opt", cl::Hidden,
38*0a6a1f1dSLionel Sambuc cl::desc("Enable optimizations on complex GEPs"),
39*0a6a1f1dSLionel Sambuc cl::init(true));
40*0a6a1f1dSLionel Sambuc
LLVMInitializePowerPCTarget()41f4a2713aSLionel Sambuc extern "C" void LLVMInitializePowerPCTarget() {
42f4a2713aSLionel Sambuc // Register the targets
43f4a2713aSLionel Sambuc RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
44f4a2713aSLionel Sambuc RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
45f4a2713aSLionel Sambuc RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget);
46f4a2713aSLionel Sambuc }
47f4a2713aSLionel Sambuc
computeFSAdditions(StringRef FS,CodeGenOpt::Level OL,StringRef TT)48*0a6a1f1dSLionel Sambuc static std::string computeFSAdditions(StringRef FS, CodeGenOpt::Level OL, StringRef TT) {
49*0a6a1f1dSLionel Sambuc std::string FullFS = FS;
50*0a6a1f1dSLionel Sambuc Triple TargetTriple(TT);
51f4a2713aSLionel Sambuc
52*0a6a1f1dSLionel Sambuc // Make sure 64-bit features are available when CPUname is generic
53*0a6a1f1dSLionel Sambuc if (TargetTriple.getArch() == Triple::ppc64 ||
54*0a6a1f1dSLionel Sambuc TargetTriple.getArch() == Triple::ppc64le) {
55*0a6a1f1dSLionel Sambuc if (!FullFS.empty())
56*0a6a1f1dSLionel Sambuc FullFS = "+64bit," + FullFS;
57*0a6a1f1dSLionel Sambuc else
58*0a6a1f1dSLionel Sambuc FullFS = "+64bit";
59*0a6a1f1dSLionel Sambuc }
60*0a6a1f1dSLionel Sambuc
61*0a6a1f1dSLionel Sambuc if (OL >= CodeGenOpt::Default) {
62*0a6a1f1dSLionel Sambuc if (!FullFS.empty())
63*0a6a1f1dSLionel Sambuc FullFS = "+crbits," + FullFS;
64*0a6a1f1dSLionel Sambuc else
65*0a6a1f1dSLionel Sambuc FullFS = "+crbits";
66*0a6a1f1dSLionel Sambuc }
67*0a6a1f1dSLionel Sambuc return FullFS;
68*0a6a1f1dSLionel Sambuc }
69*0a6a1f1dSLionel Sambuc
createTLOF(const Triple & TT)70*0a6a1f1dSLionel Sambuc static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {
71*0a6a1f1dSLionel Sambuc // If it isn't a Mach-O file then it's going to be a linux ELF
72*0a6a1f1dSLionel Sambuc // object file.
73*0a6a1f1dSLionel Sambuc if (TT.isOSDarwin())
74*0a6a1f1dSLionel Sambuc return make_unique<TargetLoweringObjectFileMachO>();
75*0a6a1f1dSLionel Sambuc
76*0a6a1f1dSLionel Sambuc return make_unique<PPC64LinuxTargetObjectFile>();
77*0a6a1f1dSLionel Sambuc }
78*0a6a1f1dSLionel Sambuc
79*0a6a1f1dSLionel Sambuc // The FeatureString here is a little subtle. We are modifying the feature string
80*0a6a1f1dSLionel Sambuc // with what are (currently) non-function specific overrides as it goes into the
81*0a6a1f1dSLionel Sambuc // LLVMTargetMachine constructor and then using the stored value in the
82*0a6a1f1dSLionel Sambuc // Subtarget constructor below it.
PPCTargetMachine(const Target & T,StringRef TT,StringRef CPU,StringRef FS,const TargetOptions & Options,Reloc::Model RM,CodeModel::Model CM,CodeGenOpt::Level OL)83*0a6a1f1dSLionel Sambuc PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU,
84*0a6a1f1dSLionel Sambuc StringRef FS, const TargetOptions &Options,
85*0a6a1f1dSLionel Sambuc Reloc::Model RM, CodeModel::Model CM,
86*0a6a1f1dSLionel Sambuc CodeGenOpt::Level OL)
87*0a6a1f1dSLionel Sambuc : LLVMTargetMachine(T, TT, CPU, computeFSAdditions(FS, OL, TT), Options, RM,
88*0a6a1f1dSLionel Sambuc CM, OL),
89*0a6a1f1dSLionel Sambuc TLOF(createTLOF(Triple(getTargetTriple()))),
90*0a6a1f1dSLionel Sambuc Subtarget(TT, CPU, TargetFS, *this) {
91f4a2713aSLionel Sambuc initAsmInfo();
92f4a2713aSLionel Sambuc }
93f4a2713aSLionel Sambuc
~PPCTargetMachine()94*0a6a1f1dSLionel Sambuc PPCTargetMachine::~PPCTargetMachine() {}
95*0a6a1f1dSLionel Sambuc
anchor()96f4a2713aSLionel Sambuc void PPC32TargetMachine::anchor() { }
97f4a2713aSLionel Sambuc
PPC32TargetMachine(const Target & T,StringRef TT,StringRef CPU,StringRef FS,const TargetOptions & Options,Reloc::Model RM,CodeModel::Model CM,CodeGenOpt::Level OL)98f4a2713aSLionel Sambuc PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT,
99f4a2713aSLionel Sambuc StringRef CPU, StringRef FS,
100f4a2713aSLionel Sambuc const TargetOptions &Options,
101f4a2713aSLionel Sambuc Reloc::Model RM, CodeModel::Model CM,
102f4a2713aSLionel Sambuc CodeGenOpt::Level OL)
103*0a6a1f1dSLionel Sambuc : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
104f4a2713aSLionel Sambuc }
105f4a2713aSLionel Sambuc
anchor()106f4a2713aSLionel Sambuc void PPC64TargetMachine::anchor() { }
107f4a2713aSLionel Sambuc
PPC64TargetMachine(const Target & T,StringRef TT,StringRef CPU,StringRef FS,const TargetOptions & Options,Reloc::Model RM,CodeModel::Model CM,CodeGenOpt::Level OL)108f4a2713aSLionel Sambuc PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT,
109f4a2713aSLionel Sambuc StringRef CPU, StringRef FS,
110f4a2713aSLionel Sambuc const TargetOptions &Options,
111f4a2713aSLionel Sambuc Reloc::Model RM, CodeModel::Model CM,
112f4a2713aSLionel Sambuc CodeGenOpt::Level OL)
113*0a6a1f1dSLionel Sambuc : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
114f4a2713aSLionel Sambuc }
115f4a2713aSLionel Sambuc
116*0a6a1f1dSLionel Sambuc const PPCSubtarget *
getSubtargetImpl(const Function & F) const117*0a6a1f1dSLionel Sambuc PPCTargetMachine::getSubtargetImpl(const Function &F) const {
118*0a6a1f1dSLionel Sambuc AttributeSet FnAttrs = F.getAttributes();
119*0a6a1f1dSLionel Sambuc Attribute CPUAttr =
120*0a6a1f1dSLionel Sambuc FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-cpu");
121*0a6a1f1dSLionel Sambuc Attribute FSAttr =
122*0a6a1f1dSLionel Sambuc FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-features");
123*0a6a1f1dSLionel Sambuc
124*0a6a1f1dSLionel Sambuc std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
125*0a6a1f1dSLionel Sambuc ? CPUAttr.getValueAsString().str()
126*0a6a1f1dSLionel Sambuc : TargetCPU;
127*0a6a1f1dSLionel Sambuc std::string FS = !FSAttr.hasAttribute(Attribute::None)
128*0a6a1f1dSLionel Sambuc ? FSAttr.getValueAsString().str()
129*0a6a1f1dSLionel Sambuc : TargetFS;
130*0a6a1f1dSLionel Sambuc
131*0a6a1f1dSLionel Sambuc auto &I = SubtargetMap[CPU + FS];
132*0a6a1f1dSLionel Sambuc if (!I) {
133*0a6a1f1dSLionel Sambuc // This needs to be done before we create a new subtarget since any
134*0a6a1f1dSLionel Sambuc // creation will depend on the TM and the code generation flags on the
135*0a6a1f1dSLionel Sambuc // function that reside in TargetOptions.
136*0a6a1f1dSLionel Sambuc resetTargetOptions(F);
137*0a6a1f1dSLionel Sambuc I = llvm::make_unique<PPCSubtarget>(TargetTriple, CPU, FS, *this);
138*0a6a1f1dSLionel Sambuc }
139*0a6a1f1dSLionel Sambuc return I.get();
140*0a6a1f1dSLionel Sambuc }
141f4a2713aSLionel Sambuc
142f4a2713aSLionel Sambuc //===----------------------------------------------------------------------===//
143f4a2713aSLionel Sambuc // Pass Pipeline Configuration
144f4a2713aSLionel Sambuc //===----------------------------------------------------------------------===//
145f4a2713aSLionel Sambuc
146f4a2713aSLionel Sambuc namespace {
147f4a2713aSLionel Sambuc /// PPC Code Generator Pass Configuration Options.
148f4a2713aSLionel Sambuc class PPCPassConfig : public TargetPassConfig {
149f4a2713aSLionel Sambuc public:
PPCPassConfig(PPCTargetMachine * TM,PassManagerBase & PM)150f4a2713aSLionel Sambuc PPCPassConfig(PPCTargetMachine *TM, PassManagerBase &PM)
151f4a2713aSLionel Sambuc : TargetPassConfig(TM, PM) {}
152f4a2713aSLionel Sambuc
getPPCTargetMachine() const153f4a2713aSLionel Sambuc PPCTargetMachine &getPPCTargetMachine() const {
154f4a2713aSLionel Sambuc return getTM<PPCTargetMachine>();
155f4a2713aSLionel Sambuc }
156f4a2713aSLionel Sambuc
getPPCSubtarget() const157f4a2713aSLionel Sambuc const PPCSubtarget &getPPCSubtarget() const {
158f4a2713aSLionel Sambuc return *getPPCTargetMachine().getSubtargetImpl();
159f4a2713aSLionel Sambuc }
160f4a2713aSLionel Sambuc
161*0a6a1f1dSLionel Sambuc void addIRPasses() override;
162*0a6a1f1dSLionel Sambuc bool addPreISel() override;
163*0a6a1f1dSLionel Sambuc bool addILPOpts() override;
164*0a6a1f1dSLionel Sambuc bool addInstSelector() override;
165*0a6a1f1dSLionel Sambuc void addPreRegAlloc() override;
166*0a6a1f1dSLionel Sambuc void addPreSched2() override;
167*0a6a1f1dSLionel Sambuc void addPreEmitPass() override;
168f4a2713aSLionel Sambuc };
169f4a2713aSLionel Sambuc } // namespace
170f4a2713aSLionel Sambuc
createPassConfig(PassManagerBase & PM)171f4a2713aSLionel Sambuc TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) {
172f4a2713aSLionel Sambuc return new PPCPassConfig(this, PM);
173f4a2713aSLionel Sambuc }
174f4a2713aSLionel Sambuc
addIRPasses()175*0a6a1f1dSLionel Sambuc void PPCPassConfig::addIRPasses() {
176*0a6a1f1dSLionel Sambuc addPass(createAtomicExpandPass(&getPPCTargetMachine()));
177*0a6a1f1dSLionel Sambuc
178*0a6a1f1dSLionel Sambuc if (TM->getOptLevel() == CodeGenOpt::Aggressive && EnableGEPOpt) {
179*0a6a1f1dSLionel Sambuc // Call SeparateConstOffsetFromGEP pass to extract constants within indices
180*0a6a1f1dSLionel Sambuc // and lower a GEP with multiple indices to either arithmetic operations or
181*0a6a1f1dSLionel Sambuc // multiple GEPs with single index.
182*0a6a1f1dSLionel Sambuc addPass(createSeparateConstOffsetFromGEPPass(TM, true));
183*0a6a1f1dSLionel Sambuc // Call EarlyCSE pass to find and remove subexpressions in the lowered
184*0a6a1f1dSLionel Sambuc // result.
185*0a6a1f1dSLionel Sambuc addPass(createEarlyCSEPass());
186*0a6a1f1dSLionel Sambuc // Do loop invariant code motion in case part of the lowered result is
187*0a6a1f1dSLionel Sambuc // invariant.
188*0a6a1f1dSLionel Sambuc addPass(createLICMPass());
189*0a6a1f1dSLionel Sambuc }
190*0a6a1f1dSLionel Sambuc
191*0a6a1f1dSLionel Sambuc TargetPassConfig::addIRPasses();
192*0a6a1f1dSLionel Sambuc }
193*0a6a1f1dSLionel Sambuc
addPreISel()194f4a2713aSLionel Sambuc bool PPCPassConfig::addPreISel() {
195f4a2713aSLionel Sambuc if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
196f4a2713aSLionel Sambuc addPass(createPPCCTRLoops(getPPCTargetMachine()));
197f4a2713aSLionel Sambuc
198f4a2713aSLionel Sambuc return false;
199f4a2713aSLionel Sambuc }
200f4a2713aSLionel Sambuc
addILPOpts()201f4a2713aSLionel Sambuc bool PPCPassConfig::addILPOpts() {
202f4a2713aSLionel Sambuc addPass(&EarlyIfConverterID);
203f4a2713aSLionel Sambuc return true;
204f4a2713aSLionel Sambuc }
205f4a2713aSLionel Sambuc
addInstSelector()206f4a2713aSLionel Sambuc bool PPCPassConfig::addInstSelector() {
207f4a2713aSLionel Sambuc // Install an instruction selector.
208f4a2713aSLionel Sambuc addPass(createPPCISelDag(getPPCTargetMachine()));
209f4a2713aSLionel Sambuc
210f4a2713aSLionel Sambuc #ifndef NDEBUG
211f4a2713aSLionel Sambuc if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
212f4a2713aSLionel Sambuc addPass(createPPCCTRLoopsVerify());
213f4a2713aSLionel Sambuc #endif
214f4a2713aSLionel Sambuc
215*0a6a1f1dSLionel Sambuc addPass(createPPCVSXCopyPass());
216f4a2713aSLionel Sambuc return false;
217f4a2713aSLionel Sambuc }
218f4a2713aSLionel Sambuc
addPreRegAlloc()219*0a6a1f1dSLionel Sambuc void PPCPassConfig::addPreRegAlloc() {
220*0a6a1f1dSLionel Sambuc initializePPCVSXFMAMutatePass(*PassRegistry::getPassRegistry());
221*0a6a1f1dSLionel Sambuc insertPass(VSXFMAMutateEarly ? &RegisterCoalescerID : &MachineSchedulerID,
222*0a6a1f1dSLionel Sambuc &PPCVSXFMAMutateID);
223*0a6a1f1dSLionel Sambuc }
224*0a6a1f1dSLionel Sambuc
addPreSched2()225*0a6a1f1dSLionel Sambuc void PPCPassConfig::addPreSched2() {
226*0a6a1f1dSLionel Sambuc addPass(createPPCVSXCopyCleanupPass(), false);
227*0a6a1f1dSLionel Sambuc
228f4a2713aSLionel Sambuc if (getOptLevel() != CodeGenOpt::None)
229f4a2713aSLionel Sambuc addPass(&IfConverterID);
230f4a2713aSLionel Sambuc }
231f4a2713aSLionel Sambuc
addPreEmitPass()232*0a6a1f1dSLionel Sambuc void PPCPassConfig::addPreEmitPass() {
233f4a2713aSLionel Sambuc if (getOptLevel() != CodeGenOpt::None)
234*0a6a1f1dSLionel Sambuc addPass(createPPCEarlyReturnPass(), false);
235f4a2713aSLionel Sambuc // Must run branch selection immediately preceding the asm printer.
236*0a6a1f1dSLionel Sambuc addPass(createPPCBranchSelectionPass(), false);
237f4a2713aSLionel Sambuc }
238f4a2713aSLionel Sambuc
addAnalysisPasses(PassManagerBase & PM)239f4a2713aSLionel Sambuc void PPCTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
240f4a2713aSLionel Sambuc // Add first the target-independent BasicTTI pass, then our PPC pass. This
241f4a2713aSLionel Sambuc // allows the PPC pass to delegate to the target independent layer when
242f4a2713aSLionel Sambuc // appropriate.
243f4a2713aSLionel Sambuc PM.add(createBasicTargetTransformInfoPass(this));
244f4a2713aSLionel Sambuc PM.add(createPPCTargetTransformInfoPass(this));
245f4a2713aSLionel Sambuc }
246f4a2713aSLionel Sambuc
247