1f4a2713aSLionel Sambuc //===-- PPCTargetTransformInfo.cpp - PPC specific TTI pass ----------------===//
2f4a2713aSLionel Sambuc //
3f4a2713aSLionel Sambuc // The LLVM Compiler Infrastructure
4f4a2713aSLionel Sambuc //
5f4a2713aSLionel Sambuc // This file is distributed under the University of Illinois Open Source
6f4a2713aSLionel Sambuc // License. See LICENSE.TXT for details.
7f4a2713aSLionel Sambuc //
8f4a2713aSLionel Sambuc //===----------------------------------------------------------------------===//
9f4a2713aSLionel Sambuc /// \file
10f4a2713aSLionel Sambuc /// This file implements a TargetTransformInfo analysis pass specific to the
11f4a2713aSLionel Sambuc /// PPC target machine. It uses the target's detailed information to provide
12f4a2713aSLionel Sambuc /// more precise answers to certain TTI queries, while letting the target
13f4a2713aSLionel Sambuc /// independent and default TTI implementations handle the rest.
14f4a2713aSLionel Sambuc ///
15f4a2713aSLionel Sambuc //===----------------------------------------------------------------------===//
16f4a2713aSLionel Sambuc
17f4a2713aSLionel Sambuc #include "PPC.h"
18f4a2713aSLionel Sambuc #include "PPCTargetMachine.h"
19f4a2713aSLionel Sambuc #include "llvm/Analysis/TargetTransformInfo.h"
20*0a6a1f1dSLionel Sambuc #include "llvm/Support/CommandLine.h"
21f4a2713aSLionel Sambuc #include "llvm/Support/Debug.h"
22f4a2713aSLionel Sambuc #include "llvm/Target/CostTable.h"
23*0a6a1f1dSLionel Sambuc #include "llvm/Target/TargetLowering.h"
24f4a2713aSLionel Sambuc using namespace llvm;
25f4a2713aSLionel Sambuc
26*0a6a1f1dSLionel Sambuc #define DEBUG_TYPE "ppctti"
27*0a6a1f1dSLionel Sambuc
28*0a6a1f1dSLionel Sambuc static cl::opt<bool> DisablePPCConstHoist("disable-ppc-constant-hoisting",
29*0a6a1f1dSLionel Sambuc cl::desc("disable constant hoisting on PPC"), cl::init(false), cl::Hidden);
30*0a6a1f1dSLionel Sambuc
31f4a2713aSLionel Sambuc // Declare the pass initialization routine locally as target-specific passes
32*0a6a1f1dSLionel Sambuc // don't have a target-wide initialization entry point, and so we rely on the
33f4a2713aSLionel Sambuc // pass constructor initialization.
34f4a2713aSLionel Sambuc namespace llvm {
35f4a2713aSLionel Sambuc void initializePPCTTIPass(PassRegistry &);
36f4a2713aSLionel Sambuc }
37f4a2713aSLionel Sambuc
38f4a2713aSLionel Sambuc namespace {
39f4a2713aSLionel Sambuc
40*0a6a1f1dSLionel Sambuc class PPCTTI final : public ImmutablePass, public TargetTransformInfo {
41*0a6a1f1dSLionel Sambuc const TargetMachine *TM;
42f4a2713aSLionel Sambuc const PPCSubtarget *ST;
43f4a2713aSLionel Sambuc const PPCTargetLowering *TLI;
44f4a2713aSLionel Sambuc
45f4a2713aSLionel Sambuc public:
PPCTTI()46*0a6a1f1dSLionel Sambuc PPCTTI() : ImmutablePass(ID), ST(nullptr), TLI(nullptr) {
47f4a2713aSLionel Sambuc llvm_unreachable("This pass cannot be directly constructed");
48f4a2713aSLionel Sambuc }
49f4a2713aSLionel Sambuc
PPCTTI(const PPCTargetMachine * TM)50f4a2713aSLionel Sambuc PPCTTI(const PPCTargetMachine *TM)
51f4a2713aSLionel Sambuc : ImmutablePass(ID), TM(TM), ST(TM->getSubtargetImpl()),
52*0a6a1f1dSLionel Sambuc TLI(TM->getSubtargetImpl()->getTargetLowering()) {
53f4a2713aSLionel Sambuc initializePPCTTIPass(*PassRegistry::getPassRegistry());
54f4a2713aSLionel Sambuc }
55f4a2713aSLionel Sambuc
initializePass()56*0a6a1f1dSLionel Sambuc void initializePass() override {
57f4a2713aSLionel Sambuc pushTTIStack(this);
58f4a2713aSLionel Sambuc }
59f4a2713aSLionel Sambuc
getAnalysisUsage(AnalysisUsage & AU) const60*0a6a1f1dSLionel Sambuc void getAnalysisUsage(AnalysisUsage &AU) const override {
61f4a2713aSLionel Sambuc TargetTransformInfo::getAnalysisUsage(AU);
62f4a2713aSLionel Sambuc }
63f4a2713aSLionel Sambuc
64f4a2713aSLionel Sambuc /// Pass identification.
65f4a2713aSLionel Sambuc static char ID;
66f4a2713aSLionel Sambuc
67f4a2713aSLionel Sambuc /// Provide necessary pointer adjustments for the two base classes.
getAdjustedAnalysisPointer(const void * ID)68*0a6a1f1dSLionel Sambuc void *getAdjustedAnalysisPointer(const void *ID) override {
69f4a2713aSLionel Sambuc if (ID == &TargetTransformInfo::ID)
70f4a2713aSLionel Sambuc return (TargetTransformInfo*)this;
71f4a2713aSLionel Sambuc return this;
72f4a2713aSLionel Sambuc }
73f4a2713aSLionel Sambuc
74f4a2713aSLionel Sambuc /// \name Scalar TTI Implementations
75f4a2713aSLionel Sambuc /// @{
76*0a6a1f1dSLionel Sambuc unsigned getIntImmCost(const APInt &Imm, Type *Ty) const override;
77*0a6a1f1dSLionel Sambuc
78*0a6a1f1dSLionel Sambuc unsigned getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
79*0a6a1f1dSLionel Sambuc Type *Ty) const override;
80*0a6a1f1dSLionel Sambuc unsigned getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
81*0a6a1f1dSLionel Sambuc Type *Ty) const override;
82*0a6a1f1dSLionel Sambuc
83*0a6a1f1dSLionel Sambuc PopcntSupportKind getPopcntSupport(unsigned TyWidth) const override;
84*0a6a1f1dSLionel Sambuc void getUnrollingPreferences(const Function *F, Loop *L,
85*0a6a1f1dSLionel Sambuc UnrollingPreferences &UP) const override;
86f4a2713aSLionel Sambuc
87f4a2713aSLionel Sambuc /// @}
88f4a2713aSLionel Sambuc
89f4a2713aSLionel Sambuc /// \name Vector TTI Implementations
90f4a2713aSLionel Sambuc /// @{
91f4a2713aSLionel Sambuc
92*0a6a1f1dSLionel Sambuc unsigned getNumberOfRegisters(bool Vector) const override;
93*0a6a1f1dSLionel Sambuc unsigned getRegisterBitWidth(bool Vector) const override;
94*0a6a1f1dSLionel Sambuc unsigned getMaxInterleaveFactor() const override;
95*0a6a1f1dSLionel Sambuc unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueKind,
96*0a6a1f1dSLionel Sambuc OperandValueKind, OperandValueProperties,
97*0a6a1f1dSLionel Sambuc OperandValueProperties) const override;
98*0a6a1f1dSLionel Sambuc unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
99*0a6a1f1dSLionel Sambuc int Index, Type *SubTp) const override;
100*0a6a1f1dSLionel Sambuc unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
101*0a6a1f1dSLionel Sambuc Type *Src) const override;
102*0a6a1f1dSLionel Sambuc unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
103*0a6a1f1dSLionel Sambuc Type *CondTy) const override;
104*0a6a1f1dSLionel Sambuc unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
105*0a6a1f1dSLionel Sambuc unsigned Index) const override;
106*0a6a1f1dSLionel Sambuc unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
107*0a6a1f1dSLionel Sambuc unsigned AddressSpace) const override;
108f4a2713aSLionel Sambuc
109f4a2713aSLionel Sambuc /// @}
110f4a2713aSLionel Sambuc };
111f4a2713aSLionel Sambuc
112f4a2713aSLionel Sambuc } // end anonymous namespace
113f4a2713aSLionel Sambuc
114f4a2713aSLionel Sambuc INITIALIZE_AG_PASS(PPCTTI, TargetTransformInfo, "ppctti",
115f4a2713aSLionel Sambuc "PPC Target Transform Info", true, true, false)
116f4a2713aSLionel Sambuc char PPCTTI::ID = 0;
117f4a2713aSLionel Sambuc
118f4a2713aSLionel Sambuc ImmutablePass *
createPPCTargetTransformInfoPass(const PPCTargetMachine * TM)119f4a2713aSLionel Sambuc llvm::createPPCTargetTransformInfoPass(const PPCTargetMachine *TM) {
120f4a2713aSLionel Sambuc return new PPCTTI(TM);
121f4a2713aSLionel Sambuc }
122f4a2713aSLionel Sambuc
123f4a2713aSLionel Sambuc
124f4a2713aSLionel Sambuc //===----------------------------------------------------------------------===//
125f4a2713aSLionel Sambuc //
126f4a2713aSLionel Sambuc // PPC cost model.
127f4a2713aSLionel Sambuc //
128f4a2713aSLionel Sambuc //===----------------------------------------------------------------------===//
129f4a2713aSLionel Sambuc
getPopcntSupport(unsigned TyWidth) const130f4a2713aSLionel Sambuc PPCTTI::PopcntSupportKind PPCTTI::getPopcntSupport(unsigned TyWidth) const {
131f4a2713aSLionel Sambuc assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
132f4a2713aSLionel Sambuc if (ST->hasPOPCNTD() && TyWidth <= 64)
133f4a2713aSLionel Sambuc return PSK_FastHardware;
134f4a2713aSLionel Sambuc return PSK_Software;
135f4a2713aSLionel Sambuc }
136f4a2713aSLionel Sambuc
getIntImmCost(const APInt & Imm,Type * Ty) const137*0a6a1f1dSLionel Sambuc unsigned PPCTTI::getIntImmCost(const APInt &Imm, Type *Ty) const {
138*0a6a1f1dSLionel Sambuc if (DisablePPCConstHoist)
139*0a6a1f1dSLionel Sambuc return TargetTransformInfo::getIntImmCost(Imm, Ty);
140*0a6a1f1dSLionel Sambuc
141*0a6a1f1dSLionel Sambuc assert(Ty->isIntegerTy());
142*0a6a1f1dSLionel Sambuc
143*0a6a1f1dSLionel Sambuc unsigned BitSize = Ty->getPrimitiveSizeInBits();
144*0a6a1f1dSLionel Sambuc if (BitSize == 0)
145*0a6a1f1dSLionel Sambuc return ~0U;
146*0a6a1f1dSLionel Sambuc
147*0a6a1f1dSLionel Sambuc if (Imm == 0)
148*0a6a1f1dSLionel Sambuc return TCC_Free;
149*0a6a1f1dSLionel Sambuc
150*0a6a1f1dSLionel Sambuc if (Imm.getBitWidth() <= 64) {
151*0a6a1f1dSLionel Sambuc if (isInt<16>(Imm.getSExtValue()))
152*0a6a1f1dSLionel Sambuc return TCC_Basic;
153*0a6a1f1dSLionel Sambuc
154*0a6a1f1dSLionel Sambuc if (isInt<32>(Imm.getSExtValue())) {
155*0a6a1f1dSLionel Sambuc // A constant that can be materialized using lis.
156*0a6a1f1dSLionel Sambuc if ((Imm.getZExtValue() & 0xFFFF) == 0)
157*0a6a1f1dSLionel Sambuc return TCC_Basic;
158*0a6a1f1dSLionel Sambuc
159*0a6a1f1dSLionel Sambuc return 2 * TCC_Basic;
160*0a6a1f1dSLionel Sambuc }
161*0a6a1f1dSLionel Sambuc }
162*0a6a1f1dSLionel Sambuc
163*0a6a1f1dSLionel Sambuc return 4 * TCC_Basic;
164*0a6a1f1dSLionel Sambuc }
165*0a6a1f1dSLionel Sambuc
getIntImmCost(Intrinsic::ID IID,unsigned Idx,const APInt & Imm,Type * Ty) const166*0a6a1f1dSLionel Sambuc unsigned PPCTTI::getIntImmCost(Intrinsic::ID IID, unsigned Idx,
167*0a6a1f1dSLionel Sambuc const APInt &Imm, Type *Ty) const {
168*0a6a1f1dSLionel Sambuc if (DisablePPCConstHoist)
169*0a6a1f1dSLionel Sambuc return TargetTransformInfo::getIntImmCost(IID, Idx, Imm, Ty);
170*0a6a1f1dSLionel Sambuc
171*0a6a1f1dSLionel Sambuc assert(Ty->isIntegerTy());
172*0a6a1f1dSLionel Sambuc
173*0a6a1f1dSLionel Sambuc unsigned BitSize = Ty->getPrimitiveSizeInBits();
174*0a6a1f1dSLionel Sambuc if (BitSize == 0)
175*0a6a1f1dSLionel Sambuc return ~0U;
176*0a6a1f1dSLionel Sambuc
177*0a6a1f1dSLionel Sambuc switch (IID) {
178*0a6a1f1dSLionel Sambuc default: return TCC_Free;
179*0a6a1f1dSLionel Sambuc case Intrinsic::sadd_with_overflow:
180*0a6a1f1dSLionel Sambuc case Intrinsic::uadd_with_overflow:
181*0a6a1f1dSLionel Sambuc case Intrinsic::ssub_with_overflow:
182*0a6a1f1dSLionel Sambuc case Intrinsic::usub_with_overflow:
183*0a6a1f1dSLionel Sambuc if ((Idx == 1) && Imm.getBitWidth() <= 64 && isInt<16>(Imm.getSExtValue()))
184*0a6a1f1dSLionel Sambuc return TCC_Free;
185*0a6a1f1dSLionel Sambuc break;
186*0a6a1f1dSLionel Sambuc case Intrinsic::experimental_stackmap:
187*0a6a1f1dSLionel Sambuc if ((Idx < 2) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue())))
188*0a6a1f1dSLionel Sambuc return TCC_Free;
189*0a6a1f1dSLionel Sambuc break;
190*0a6a1f1dSLionel Sambuc case Intrinsic::experimental_patchpoint_void:
191*0a6a1f1dSLionel Sambuc case Intrinsic::experimental_patchpoint_i64:
192*0a6a1f1dSLionel Sambuc if ((Idx < 4) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue())))
193*0a6a1f1dSLionel Sambuc return TCC_Free;
194*0a6a1f1dSLionel Sambuc break;
195*0a6a1f1dSLionel Sambuc }
196*0a6a1f1dSLionel Sambuc return PPCTTI::getIntImmCost(Imm, Ty);
197*0a6a1f1dSLionel Sambuc }
198*0a6a1f1dSLionel Sambuc
getIntImmCost(unsigned Opcode,unsigned Idx,const APInt & Imm,Type * Ty) const199*0a6a1f1dSLionel Sambuc unsigned PPCTTI::getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
200*0a6a1f1dSLionel Sambuc Type *Ty) const {
201*0a6a1f1dSLionel Sambuc if (DisablePPCConstHoist)
202*0a6a1f1dSLionel Sambuc return TargetTransformInfo::getIntImmCost(Opcode, Idx, Imm, Ty);
203*0a6a1f1dSLionel Sambuc
204*0a6a1f1dSLionel Sambuc assert(Ty->isIntegerTy());
205*0a6a1f1dSLionel Sambuc
206*0a6a1f1dSLionel Sambuc unsigned BitSize = Ty->getPrimitiveSizeInBits();
207*0a6a1f1dSLionel Sambuc if (BitSize == 0)
208*0a6a1f1dSLionel Sambuc return ~0U;
209*0a6a1f1dSLionel Sambuc
210*0a6a1f1dSLionel Sambuc unsigned ImmIdx = ~0U;
211*0a6a1f1dSLionel Sambuc bool ShiftedFree = false, RunFree = false, UnsignedFree = false,
212*0a6a1f1dSLionel Sambuc ZeroFree = false;
213*0a6a1f1dSLionel Sambuc switch (Opcode) {
214*0a6a1f1dSLionel Sambuc default: return TCC_Free;
215*0a6a1f1dSLionel Sambuc case Instruction::GetElementPtr:
216*0a6a1f1dSLionel Sambuc // Always hoist the base address of a GetElementPtr. This prevents the
217*0a6a1f1dSLionel Sambuc // creation of new constants for every base constant that gets constant
218*0a6a1f1dSLionel Sambuc // folded with the offset.
219*0a6a1f1dSLionel Sambuc if (Idx == 0)
220*0a6a1f1dSLionel Sambuc return 2 * TCC_Basic;
221*0a6a1f1dSLionel Sambuc return TCC_Free;
222*0a6a1f1dSLionel Sambuc case Instruction::And:
223*0a6a1f1dSLionel Sambuc RunFree = true; // (for the rotate-and-mask instructions)
224*0a6a1f1dSLionel Sambuc // Fallthrough...
225*0a6a1f1dSLionel Sambuc case Instruction::Add:
226*0a6a1f1dSLionel Sambuc case Instruction::Or:
227*0a6a1f1dSLionel Sambuc case Instruction::Xor:
228*0a6a1f1dSLionel Sambuc ShiftedFree = true;
229*0a6a1f1dSLionel Sambuc // Fallthrough...
230*0a6a1f1dSLionel Sambuc case Instruction::Sub:
231*0a6a1f1dSLionel Sambuc case Instruction::Mul:
232*0a6a1f1dSLionel Sambuc case Instruction::Shl:
233*0a6a1f1dSLionel Sambuc case Instruction::LShr:
234*0a6a1f1dSLionel Sambuc case Instruction::AShr:
235*0a6a1f1dSLionel Sambuc ImmIdx = 1;
236*0a6a1f1dSLionel Sambuc break;
237*0a6a1f1dSLionel Sambuc case Instruction::ICmp:
238*0a6a1f1dSLionel Sambuc UnsignedFree = true;
239*0a6a1f1dSLionel Sambuc ImmIdx = 1;
240*0a6a1f1dSLionel Sambuc // Fallthrough... (zero comparisons can use record-form instructions)
241*0a6a1f1dSLionel Sambuc case Instruction::Select:
242*0a6a1f1dSLionel Sambuc ZeroFree = true;
243*0a6a1f1dSLionel Sambuc break;
244*0a6a1f1dSLionel Sambuc case Instruction::PHI:
245*0a6a1f1dSLionel Sambuc case Instruction::Call:
246*0a6a1f1dSLionel Sambuc case Instruction::Ret:
247*0a6a1f1dSLionel Sambuc case Instruction::Load:
248*0a6a1f1dSLionel Sambuc case Instruction::Store:
249*0a6a1f1dSLionel Sambuc break;
250*0a6a1f1dSLionel Sambuc }
251*0a6a1f1dSLionel Sambuc
252*0a6a1f1dSLionel Sambuc if (ZeroFree && Imm == 0)
253*0a6a1f1dSLionel Sambuc return TCC_Free;
254*0a6a1f1dSLionel Sambuc
255*0a6a1f1dSLionel Sambuc if (Idx == ImmIdx && Imm.getBitWidth() <= 64) {
256*0a6a1f1dSLionel Sambuc if (isInt<16>(Imm.getSExtValue()))
257*0a6a1f1dSLionel Sambuc return TCC_Free;
258*0a6a1f1dSLionel Sambuc
259*0a6a1f1dSLionel Sambuc if (RunFree) {
260*0a6a1f1dSLionel Sambuc if (Imm.getBitWidth() <= 32 &&
261*0a6a1f1dSLionel Sambuc (isShiftedMask_32(Imm.getZExtValue()) ||
262*0a6a1f1dSLionel Sambuc isShiftedMask_32(~Imm.getZExtValue())))
263*0a6a1f1dSLionel Sambuc return TCC_Free;
264*0a6a1f1dSLionel Sambuc
265*0a6a1f1dSLionel Sambuc
266*0a6a1f1dSLionel Sambuc if (ST->isPPC64() &&
267*0a6a1f1dSLionel Sambuc (isShiftedMask_64(Imm.getZExtValue()) ||
268*0a6a1f1dSLionel Sambuc isShiftedMask_64(~Imm.getZExtValue())))
269*0a6a1f1dSLionel Sambuc return TCC_Free;
270*0a6a1f1dSLionel Sambuc }
271*0a6a1f1dSLionel Sambuc
272*0a6a1f1dSLionel Sambuc if (UnsignedFree && isUInt<16>(Imm.getZExtValue()))
273*0a6a1f1dSLionel Sambuc return TCC_Free;
274*0a6a1f1dSLionel Sambuc
275*0a6a1f1dSLionel Sambuc if (ShiftedFree && (Imm.getZExtValue() & 0xFFFF) == 0)
276*0a6a1f1dSLionel Sambuc return TCC_Free;
277*0a6a1f1dSLionel Sambuc }
278*0a6a1f1dSLionel Sambuc
279*0a6a1f1dSLionel Sambuc return PPCTTI::getIntImmCost(Imm, Ty);
280*0a6a1f1dSLionel Sambuc }
281*0a6a1f1dSLionel Sambuc
getUnrollingPreferences(const Function * F,Loop * L,UnrollingPreferences & UP) const282*0a6a1f1dSLionel Sambuc void PPCTTI::getUnrollingPreferences(const Function *F, Loop *L,
283*0a6a1f1dSLionel Sambuc UnrollingPreferences &UP) const {
284*0a6a1f1dSLionel Sambuc if (TM->getSubtarget<PPCSubtarget>(F).getDarwinDirective() == PPC::DIR_A2) {
285f4a2713aSLionel Sambuc // The A2 is in-order with a deep pipeline, and concatenation unrolling
286f4a2713aSLionel Sambuc // helps expose latency-hiding opportunities to the instruction scheduler.
287f4a2713aSLionel Sambuc UP.Partial = UP.Runtime = true;
288f4a2713aSLionel Sambuc }
289*0a6a1f1dSLionel Sambuc
290*0a6a1f1dSLionel Sambuc TargetTransformInfo::getUnrollingPreferences(F, L, UP);
291f4a2713aSLionel Sambuc }
292f4a2713aSLionel Sambuc
getNumberOfRegisters(bool Vector) const293f4a2713aSLionel Sambuc unsigned PPCTTI::getNumberOfRegisters(bool Vector) const {
294f4a2713aSLionel Sambuc if (Vector && !ST->hasAltivec())
295f4a2713aSLionel Sambuc return 0;
296*0a6a1f1dSLionel Sambuc return ST->hasVSX() ? 64 : 32;
297f4a2713aSLionel Sambuc }
298f4a2713aSLionel Sambuc
getRegisterBitWidth(bool Vector) const299f4a2713aSLionel Sambuc unsigned PPCTTI::getRegisterBitWidth(bool Vector) const {
300f4a2713aSLionel Sambuc if (Vector) {
301f4a2713aSLionel Sambuc if (ST->hasAltivec()) return 128;
302f4a2713aSLionel Sambuc return 0;
303f4a2713aSLionel Sambuc }
304f4a2713aSLionel Sambuc
305f4a2713aSLionel Sambuc if (ST->isPPC64())
306f4a2713aSLionel Sambuc return 64;
307f4a2713aSLionel Sambuc return 32;
308f4a2713aSLionel Sambuc
309f4a2713aSLionel Sambuc }
310f4a2713aSLionel Sambuc
getMaxInterleaveFactor() const311*0a6a1f1dSLionel Sambuc unsigned PPCTTI::getMaxInterleaveFactor() const {
312f4a2713aSLionel Sambuc unsigned Directive = ST->getDarwinDirective();
313f4a2713aSLionel Sambuc // The 440 has no SIMD support, but floating-point instructions
314f4a2713aSLionel Sambuc // have a 5-cycle latency, so unroll by 5x for latency hiding.
315f4a2713aSLionel Sambuc if (Directive == PPC::DIR_440)
316f4a2713aSLionel Sambuc return 5;
317f4a2713aSLionel Sambuc
318f4a2713aSLionel Sambuc // The A2 has no SIMD support, but floating-point instructions
319f4a2713aSLionel Sambuc // have a 6-cycle latency, so unroll by 6x for latency hiding.
320f4a2713aSLionel Sambuc if (Directive == PPC::DIR_A2)
321f4a2713aSLionel Sambuc return 6;
322f4a2713aSLionel Sambuc
323f4a2713aSLionel Sambuc // FIXME: For lack of any better information, do no harm...
324f4a2713aSLionel Sambuc if (Directive == PPC::DIR_E500mc || Directive == PPC::DIR_E5500)
325f4a2713aSLionel Sambuc return 1;
326f4a2713aSLionel Sambuc
327f4a2713aSLionel Sambuc // For most things, modern systems have two execution units (and
328f4a2713aSLionel Sambuc // out-of-order execution).
329f4a2713aSLionel Sambuc return 2;
330f4a2713aSLionel Sambuc }
331f4a2713aSLionel Sambuc
getArithmeticInstrCost(unsigned Opcode,Type * Ty,OperandValueKind Op1Info,OperandValueKind Op2Info,OperandValueProperties Opd1PropInfo,OperandValueProperties Opd2PropInfo) const332*0a6a1f1dSLionel Sambuc unsigned PPCTTI::getArithmeticInstrCost(
333*0a6a1f1dSLionel Sambuc unsigned Opcode, Type *Ty, OperandValueKind Op1Info,
334*0a6a1f1dSLionel Sambuc OperandValueKind Op2Info, OperandValueProperties Opd1PropInfo,
335*0a6a1f1dSLionel Sambuc OperandValueProperties Opd2PropInfo) const {
336f4a2713aSLionel Sambuc assert(TLI->InstructionOpcodeToISD(Opcode) && "Invalid opcode");
337f4a2713aSLionel Sambuc
338f4a2713aSLionel Sambuc // Fallback to the default implementation.
339*0a6a1f1dSLionel Sambuc return TargetTransformInfo::getArithmeticInstrCost(
340*0a6a1f1dSLionel Sambuc Opcode, Ty, Op1Info, Op2Info, Opd1PropInfo, Opd2PropInfo);
341f4a2713aSLionel Sambuc }
342f4a2713aSLionel Sambuc
getShuffleCost(ShuffleKind Kind,Type * Tp,int Index,Type * SubTp) const343f4a2713aSLionel Sambuc unsigned PPCTTI::getShuffleCost(ShuffleKind Kind, Type *Tp, int Index,
344f4a2713aSLionel Sambuc Type *SubTp) const {
345f4a2713aSLionel Sambuc return TargetTransformInfo::getShuffleCost(Kind, Tp, Index, SubTp);
346f4a2713aSLionel Sambuc }
347f4a2713aSLionel Sambuc
getCastInstrCost(unsigned Opcode,Type * Dst,Type * Src) const348f4a2713aSLionel Sambuc unsigned PPCTTI::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) const {
349f4a2713aSLionel Sambuc assert(TLI->InstructionOpcodeToISD(Opcode) && "Invalid opcode");
350f4a2713aSLionel Sambuc
351f4a2713aSLionel Sambuc return TargetTransformInfo::getCastInstrCost(Opcode, Dst, Src);
352f4a2713aSLionel Sambuc }
353f4a2713aSLionel Sambuc
getCmpSelInstrCost(unsigned Opcode,Type * ValTy,Type * CondTy) const354f4a2713aSLionel Sambuc unsigned PPCTTI::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
355f4a2713aSLionel Sambuc Type *CondTy) const {
356f4a2713aSLionel Sambuc return TargetTransformInfo::getCmpSelInstrCost(Opcode, ValTy, CondTy);
357f4a2713aSLionel Sambuc }
358f4a2713aSLionel Sambuc
getVectorInstrCost(unsigned Opcode,Type * Val,unsigned Index) const359f4a2713aSLionel Sambuc unsigned PPCTTI::getVectorInstrCost(unsigned Opcode, Type *Val,
360f4a2713aSLionel Sambuc unsigned Index) const {
361f4a2713aSLionel Sambuc assert(Val->isVectorTy() && "This must be a vector type");
362f4a2713aSLionel Sambuc
363f4a2713aSLionel Sambuc int ISD = TLI->InstructionOpcodeToISD(Opcode);
364f4a2713aSLionel Sambuc assert(ISD && "Invalid opcode");
365f4a2713aSLionel Sambuc
366*0a6a1f1dSLionel Sambuc if (ST->hasVSX() && Val->getScalarType()->isDoubleTy()) {
367*0a6a1f1dSLionel Sambuc // Double-precision scalars are already located in index #0.
368*0a6a1f1dSLionel Sambuc if (Index == 0)
369*0a6a1f1dSLionel Sambuc return 0;
370*0a6a1f1dSLionel Sambuc
371*0a6a1f1dSLionel Sambuc return TargetTransformInfo::getVectorInstrCost(Opcode, Val, Index);
372*0a6a1f1dSLionel Sambuc }
373*0a6a1f1dSLionel Sambuc
374f4a2713aSLionel Sambuc // Estimated cost of a load-hit-store delay. This was obtained
375f4a2713aSLionel Sambuc // experimentally as a minimum needed to prevent unprofitable
376f4a2713aSLionel Sambuc // vectorization for the paq8p benchmark. It may need to be
377f4a2713aSLionel Sambuc // raised further if other unprofitable cases remain.
378*0a6a1f1dSLionel Sambuc unsigned LHSPenalty = 2;
379*0a6a1f1dSLionel Sambuc if (ISD == ISD::INSERT_VECTOR_ELT)
380*0a6a1f1dSLionel Sambuc LHSPenalty += 7;
381f4a2713aSLionel Sambuc
382f4a2713aSLionel Sambuc // Vector element insert/extract with Altivec is very expensive,
383f4a2713aSLionel Sambuc // because they require store and reload with the attendant
384f4a2713aSLionel Sambuc // processor stall for load-hit-store. Until VSX is available,
385f4a2713aSLionel Sambuc // these need to be estimated as very costly.
386f4a2713aSLionel Sambuc if (ISD == ISD::EXTRACT_VECTOR_ELT ||
387f4a2713aSLionel Sambuc ISD == ISD::INSERT_VECTOR_ELT)
388f4a2713aSLionel Sambuc return LHSPenalty +
389f4a2713aSLionel Sambuc TargetTransformInfo::getVectorInstrCost(Opcode, Val, Index);
390f4a2713aSLionel Sambuc
391f4a2713aSLionel Sambuc return TargetTransformInfo::getVectorInstrCost(Opcode, Val, Index);
392f4a2713aSLionel Sambuc }
393f4a2713aSLionel Sambuc
getMemoryOpCost(unsigned Opcode,Type * Src,unsigned Alignment,unsigned AddressSpace) const394f4a2713aSLionel Sambuc unsigned PPCTTI::getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
395f4a2713aSLionel Sambuc unsigned AddressSpace) const {
396f4a2713aSLionel Sambuc // Legalize the type.
397f4a2713aSLionel Sambuc std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(Src);
398f4a2713aSLionel Sambuc assert((Opcode == Instruction::Load || Opcode == Instruction::Store) &&
399f4a2713aSLionel Sambuc "Invalid Opcode");
400f4a2713aSLionel Sambuc
401*0a6a1f1dSLionel Sambuc unsigned Cost =
402*0a6a1f1dSLionel Sambuc TargetTransformInfo::getMemoryOpCost(Opcode, Src, Alignment, AddressSpace);
403*0a6a1f1dSLionel Sambuc
404*0a6a1f1dSLionel Sambuc // VSX loads/stores support unaligned access.
405*0a6a1f1dSLionel Sambuc if (ST->hasVSX()) {
406*0a6a1f1dSLionel Sambuc if (LT.second == MVT::v2f64 || LT.second == MVT::v2i64)
407*0a6a1f1dSLionel Sambuc return Cost;
408*0a6a1f1dSLionel Sambuc }
409*0a6a1f1dSLionel Sambuc
410*0a6a1f1dSLionel Sambuc bool UnalignedAltivec =
411*0a6a1f1dSLionel Sambuc Src->isVectorTy() &&
412*0a6a1f1dSLionel Sambuc Src->getPrimitiveSizeInBits() >= LT.second.getSizeInBits() &&
413*0a6a1f1dSLionel Sambuc LT.second.getSizeInBits() == 128 &&
414*0a6a1f1dSLionel Sambuc Opcode == Instruction::Load;
415f4a2713aSLionel Sambuc
416f4a2713aSLionel Sambuc // PPC in general does not support unaligned loads and stores. They'll need
417f4a2713aSLionel Sambuc // to be decomposed based on the alignment factor.
418f4a2713aSLionel Sambuc unsigned SrcBytes = LT.second.getStoreSize();
419*0a6a1f1dSLionel Sambuc if (SrcBytes && Alignment && Alignment < SrcBytes && !UnalignedAltivec) {
420*0a6a1f1dSLionel Sambuc Cost += LT.first*(SrcBytes/Alignment-1);
421*0a6a1f1dSLionel Sambuc
422*0a6a1f1dSLionel Sambuc // For a vector type, there is also scalarization overhead (only for
423*0a6a1f1dSLionel Sambuc // stores, loads are expanded using the vector-load + permutation sequence,
424*0a6a1f1dSLionel Sambuc // which is much less expensive).
425*0a6a1f1dSLionel Sambuc if (Src->isVectorTy() && Opcode == Instruction::Store)
426*0a6a1f1dSLionel Sambuc for (int i = 0, e = Src->getVectorNumElements(); i < e; ++i)
427*0a6a1f1dSLionel Sambuc Cost += getVectorInstrCost(Instruction::ExtractElement, Src, i);
428*0a6a1f1dSLionel Sambuc }
429f4a2713aSLionel Sambuc
430f4a2713aSLionel Sambuc return Cost;
431f4a2713aSLionel Sambuc }
432f4a2713aSLionel Sambuc
433