1; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu -mattr=+neon -fp-contract=fast | FileCheck %s
2
3define float @test_fmul_lane_ss2S(float %a, <2 x float> %v) {
4  ; CHECK-LABEL: test_fmul_lane_ss2S
5  ; CHECK: fmul {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1]
6  %tmp1 = extractelement <2 x float> %v, i32 1
7  %tmp2 = fmul float %a, %tmp1;
8  ret float %tmp2;
9}
10
11define float @test_fmul_lane_ss2S_swap(float %a, <2 x float> %v) {
12  ; CHECK-LABEL: test_fmul_lane_ss2S_swap
13  ; CHECK: fmul {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1]
14  %tmp1 = extractelement <2 x float> %v, i32 1
15  %tmp2 = fmul float %tmp1, %a;
16  ret float %tmp2;
17}
18
19
20define float @test_fmul_lane_ss4S(float %a, <4 x float> %v) {
21  ; CHECK-LABEL: test_fmul_lane_ss4S
22  ; CHECK: fmul {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
23  %tmp1 = extractelement <4 x float> %v, i32 3
24  %tmp2 = fmul float %a, %tmp1;
25  ret float %tmp2;
26}
27
28define float @test_fmul_lane_ss4S_swap(float %a, <4 x float> %v) {
29  ; CHECK-LABEL: test_fmul_lane_ss4S_swap
30  ; CHECK: fmul {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
31  %tmp1 = extractelement <4 x float> %v, i32 3
32  %tmp2 = fmul float %tmp1, %a;
33  ret float %tmp2;
34}
35
36
37define double @test_fmul_lane_ddD(double %a, <1 x double> %v) {
38  ; CHECK-LABEL: test_fmul_lane_ddD
39  ; CHECK: fmul {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+.d\[0]|d[0-9]+}}
40  %tmp1 = extractelement <1 x double> %v, i32 0
41  %tmp2 = fmul double %a, %tmp1;
42  ret double %tmp2;
43}
44
45
46
47define double @test_fmul_lane_dd2D(double %a, <2 x double> %v) {
48  ; CHECK-LABEL: test_fmul_lane_dd2D
49  ; CHECK: fmul {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}.d[1]
50  %tmp1 = extractelement <2 x double> %v, i32 1
51  %tmp2 = fmul double %a, %tmp1;
52  ret double %tmp2;
53}
54
55
56define double @test_fmul_lane_dd2D_swap(double %a, <2 x double> %v) {
57  ; CHECK-LABEL: test_fmul_lane_dd2D_swap
58  ; CHECK: fmul {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}.d[1]
59  %tmp1 = extractelement <2 x double> %v, i32 1
60  %tmp2 = fmul double %tmp1, %a;
61  ret double %tmp2;
62}
63
64declare float @llvm.aarch64.neon.fmulx.f32(float, float)
65
66define float @test_fmulx_lane_f32(float %a, <2 x float> %v) {
67  ; CHECK-LABEL: test_fmulx_lane_f32
68  ; CHECK: fmulx {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1]
69  %tmp1 = extractelement <2 x float> %v, i32 1
70  %tmp2 = call float @llvm.aarch64.neon.fmulx.f32(float %a, float %tmp1)
71  ret float %tmp2;
72}
73
74define float @test_fmulx_laneq_f32(float %a, <4 x float> %v) {
75  ; CHECK-LABEL: test_fmulx_laneq_f32
76  ; CHECK: fmulx {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
77  %tmp1 = extractelement <4 x float> %v, i32 3
78  %tmp2 = call float @llvm.aarch64.neon.fmulx.f32(float %a, float %tmp1)
79  ret float %tmp2;
80}
81
82define float @test_fmulx_laneq_f32_swap(float %a, <4 x float> %v) {
83  ; CHECK-LABEL: test_fmulx_laneq_f32_swap
84  ; CHECK: fmulx {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
85  %tmp1 = extractelement <4 x float> %v, i32 3
86  %tmp2 = call float @llvm.aarch64.neon.fmulx.f32(float %tmp1, float %a)
87  ret float %tmp2;
88}
89
90declare double @llvm.aarch64.neon.fmulx.f64(double, double)
91
92define double @test_fmulx_lane_f64(double %a, <1 x double> %v) {
93  ; CHECK-LABEL: test_fmulx_lane_f64
94  ; CHECK: fmulx {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+.d\[0]|d[0-9]+}}
95  %tmp1 = extractelement <1 x double> %v, i32 0
96  %tmp2 = call double @llvm.aarch64.neon.fmulx.f64(double %a, double %tmp1)
97  ret double %tmp2;
98}
99
100define double @test_fmulx_laneq_f64_0(double %a, <2 x double> %v) {
101  ; CHECK-LABEL: test_fmulx_laneq_f64_0
102  ; CHECK: fmulx {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}.d[0]
103  %tmp1 = extractelement <2 x double> %v, i32 0
104  %tmp2 = call double @llvm.aarch64.neon.fmulx.f64(double %a, double %tmp1)
105  ret double %tmp2;
106}
107
108
109define double @test_fmulx_laneq_f64_1(double %a, <2 x double> %v) {
110  ; CHECK-LABEL: test_fmulx_laneq_f64_1
111  ; CHECK: fmulx {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}.d[1]
112  %tmp1 = extractelement <2 x double> %v, i32 1
113  %tmp2 = call double @llvm.aarch64.neon.fmulx.f64(double %a, double %tmp1)
114  ret double %tmp2;
115}
116
117define double @test_fmulx_laneq_f64_1_swap(double %a, <2 x double> %v) {
118  ; CHECK-LABEL: test_fmulx_laneq_f64_1_swap
119  ; CHECK: fmulx {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}.d[1]
120  %tmp1 = extractelement <2 x double> %v, i32 1
121  %tmp2 = call double @llvm.aarch64.neon.fmulx.f64(double %tmp1, double %a)
122  ret double %tmp2;
123}
124
125