1; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
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3
4define <8 x i8> @mla8xi8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C) {
5;CHECK: mla {{v[0-31]+}}.8b, {{v[0-31]+}}.8b, {{v[0-31]+}}.8b
6	%tmp1 = mul <8 x i8> %A, %B;
7	%tmp2 = add <8 x i8> %C, %tmp1;
8	ret <8 x i8> %tmp2
9}
10
11define <16 x i8> @mla16xi8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C) {
12;CHECK: mla {{v[0-31]+}}.16b, {{v[0-31]+}}.16b, {{v[0-31]+}}.16b
13	%tmp1 = mul <16 x i8> %A, %B;
14	%tmp2 = add <16 x i8> %C, %tmp1;
15	ret <16 x i8> %tmp2
16}
17
18define <4 x i16> @mla4xi16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C) {
19;CHECK: mla {{v[0-31]+}}.4h, {{v[0-31]+}}.4h, {{v[0-31]+}}.4h
20	%tmp1 = mul <4 x i16> %A, %B;
21	%tmp2 = add <4 x i16> %C, %tmp1;
22	ret <4 x i16> %tmp2
23}
24
25define <8 x i16> @mla8xi16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C) {
26;CHECK: mla {{v[0-31]+}}.8h, {{v[0-31]+}}.8h, {{v[0-31]+}}.8h
27	%tmp1 = mul <8 x i16> %A, %B;
28	%tmp2 = add <8 x i16> %C, %tmp1;
29	ret <8 x i16> %tmp2
30}
31
32define <2 x i32> @mla2xi32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C) {
33;CHECK: mla {{v[0-31]+}}.2s, {{v[0-31]+}}.2s, {{v[0-31]+}}.2s
34	%tmp1 = mul <2 x i32> %A, %B;
35	%tmp2 = add <2 x i32> %C, %tmp1;
36	ret <2 x i32> %tmp2
37}
38
39define <4 x i32> @mla4xi32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) {
40;CHECK: mla {{v[0-31]+}}.4s, {{v[0-31]+}}.4s, {{v[0-31]+}}.4s
41	%tmp1 = mul <4 x i32> %A, %B;
42	%tmp2 = add <4 x i32> %C, %tmp1;
43	ret <4 x i32> %tmp2
44}
45
46define <8 x i8> @mls8xi8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C) {
47;CHECK: mls {{v[0-31]+}}.8b, {{v[0-31]+}}.8b, {{v[0-31]+}}.8b
48	%tmp1 = mul <8 x i8> %A, %B;
49	%tmp2 = sub <8 x i8> %C, %tmp1;
50	ret <8 x i8> %tmp2
51}
52
53define <16 x i8> @mls16xi8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C) {
54;CHECK: mls {{v[0-31]+}}.16b, {{v[0-31]+}}.16b, {{v[0-31]+}}.16b
55	%tmp1 = mul <16 x i8> %A, %B;
56	%tmp2 = sub <16 x i8> %C, %tmp1;
57	ret <16 x i8> %tmp2
58}
59
60define <4 x i16> @mls4xi16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C) {
61;CHECK: mls {{v[0-31]+}}.4h, {{v[0-31]+}}.4h, {{v[0-31]+}}.4h
62	%tmp1 = mul <4 x i16> %A, %B;
63	%tmp2 = sub <4 x i16> %C, %tmp1;
64	ret <4 x i16> %tmp2
65}
66
67define <8 x i16> @mls8xi16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C) {
68;CHECK: mls {{v[0-31]+}}.8h, {{v[0-31]+}}.8h, {{v[0-31]+}}.8h
69	%tmp1 = mul <8 x i16> %A, %B;
70	%tmp2 = sub <8 x i16> %C, %tmp1;
71	ret <8 x i16> %tmp2
72}
73
74define <2 x i32> @mls2xi32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C) {
75;CHECK: mls {{v[0-31]+}}.2s, {{v[0-31]+}}.2s, {{v[0-31]+}}.2s
76	%tmp1 = mul <2 x i32> %A, %B;
77	%tmp2 = sub <2 x i32> %C, %tmp1;
78	ret <2 x i32> %tmp2
79}
80
81define <4 x i32> @mls4xi32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) {
82;CHECK: mls {{v[0-31]+}}.4s, {{v[0-31]+}}.4s, {{v[0-31]+}}.4s
83	%tmp1 = mul <4 x i32> %A, %B;
84	%tmp2 = sub <4 x i32> %C, %tmp1;
85	ret <4 x i32> %tmp2
86}
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