1; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s 2 3%struct.int8x8x2_t = type { [2 x <8 x i8>] } 4%struct.int16x4x2_t = type { [2 x <4 x i16>] } 5%struct.int32x2x2_t = type { [2 x <2 x i32>] } 6%struct.uint8x8x2_t = type { [2 x <8 x i8>] } 7%struct.uint16x4x2_t = type { [2 x <4 x i16>] } 8%struct.uint32x2x2_t = type { [2 x <2 x i32>] } 9%struct.float32x2x2_t = type { [2 x <2 x float>] } 10%struct.poly8x8x2_t = type { [2 x <8 x i8>] } 11%struct.poly16x4x2_t = type { [2 x <4 x i16>] } 12%struct.int8x16x2_t = type { [2 x <16 x i8>] } 13%struct.int16x8x2_t = type { [2 x <8 x i16>] } 14%struct.int32x4x2_t = type { [2 x <4 x i32>] } 15%struct.uint8x16x2_t = type { [2 x <16 x i8>] } 16%struct.uint16x8x2_t = type { [2 x <8 x i16>] } 17%struct.uint32x4x2_t = type { [2 x <4 x i32>] } 18%struct.float32x4x2_t = type { [2 x <4 x float>] } 19%struct.poly8x16x2_t = type { [2 x <16 x i8>] } 20%struct.poly16x8x2_t = type { [2 x <8 x i16>] } 21 22define <8 x i8> @test_vuzp1_s8(<8 x i8> %a, <8 x i8> %b) { 23; CHECK: test_vuzp1_s8: 24; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 25entry: 26 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 27 ret <8 x i8> %shuffle.i 28} 29 30define <16 x i8> @test_vuzp1q_s8(<16 x i8> %a, <16 x i8> %b) { 31; CHECK: test_vuzp1q_s8: 32; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 33entry: 34 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 35 ret <16 x i8> %shuffle.i 36} 37 38define <4 x i16> @test_vuzp1_s16(<4 x i16> %a, <4 x i16> %b) { 39; CHECK: test_vuzp1_s16: 40; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 41entry: 42 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 43 ret <4 x i16> %shuffle.i 44} 45 46define <8 x i16> @test_vuzp1q_s16(<8 x i16> %a, <8 x i16> %b) { 47; CHECK: test_vuzp1q_s16: 48; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 49entry: 50 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 51 ret <8 x i16> %shuffle.i 52} 53 54define <2 x i32> @test_vuzp1_s32(<2 x i32> %a, <2 x i32> %b) { 55; CHECK: test_vuzp1_s32: 56; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 57entry: 58 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 59 ret <2 x i32> %shuffle.i 60} 61 62define <4 x i32> @test_vuzp1q_s32(<4 x i32> %a, <4 x i32> %b) { 63; CHECK: test_vuzp1q_s32: 64; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 65entry: 66 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 67 ret <4 x i32> %shuffle.i 68} 69 70define <2 x i64> @test_vuzp1q_s64(<2 x i64> %a, <2 x i64> %b) { 71; CHECK: test_vuzp1q_s64: 72; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0] 73entry: 74 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 75 ret <2 x i64> %shuffle.i 76} 77 78define <8 x i8> @test_vuzp1_u8(<8 x i8> %a, <8 x i8> %b) { 79; CHECK: test_vuzp1_u8: 80; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 81entry: 82 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 83 ret <8 x i8> %shuffle.i 84} 85 86define <16 x i8> @test_vuzp1q_u8(<16 x i8> %a, <16 x i8> %b) { 87; CHECK: test_vuzp1q_u8: 88; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 89entry: 90 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 91 ret <16 x i8> %shuffle.i 92} 93 94define <4 x i16> @test_vuzp1_u16(<4 x i16> %a, <4 x i16> %b) { 95; CHECK: test_vuzp1_u16: 96; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 97entry: 98 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 99 ret <4 x i16> %shuffle.i 100} 101 102define <8 x i16> @test_vuzp1q_u16(<8 x i16> %a, <8 x i16> %b) { 103; CHECK: test_vuzp1q_u16: 104; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 105entry: 106 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 107 ret <8 x i16> %shuffle.i 108} 109 110define <2 x i32> @test_vuzp1_u32(<2 x i32> %a, <2 x i32> %b) { 111; CHECK: test_vuzp1_u32: 112; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 113entry: 114 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 115 ret <2 x i32> %shuffle.i 116} 117 118define <4 x i32> @test_vuzp1q_u32(<4 x i32> %a, <4 x i32> %b) { 119; CHECK: test_vuzp1q_u32: 120; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 121entry: 122 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 123 ret <4 x i32> %shuffle.i 124} 125 126define <2 x i64> @test_vuzp1q_u64(<2 x i64> %a, <2 x i64> %b) { 127; CHECK: test_vuzp1q_u64: 128; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0] 129entry: 130 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 131 ret <2 x i64> %shuffle.i 132} 133 134define <2 x float> @test_vuzp1_f32(<2 x float> %a, <2 x float> %b) { 135; CHECK: test_vuzp1_f32: 136; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 137entry: 138 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 139 ret <2 x float> %shuffle.i 140} 141 142define <4 x float> @test_vuzp1q_f32(<4 x float> %a, <4 x float> %b) { 143; CHECK: test_vuzp1q_f32: 144; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 145entry: 146 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 147 ret <4 x float> %shuffle.i 148} 149 150define <2 x double> @test_vuzp1q_f64(<2 x double> %a, <2 x double> %b) { 151; CHECK: test_vuzp1q_f64: 152; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0] 153entry: 154 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2> 155 ret <2 x double> %shuffle.i 156} 157 158define <8 x i8> @test_vuzp1_p8(<8 x i8> %a, <8 x i8> %b) { 159; CHECK: test_vuzp1_p8: 160; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 161entry: 162 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 163 ret <8 x i8> %shuffle.i 164} 165 166define <16 x i8> @test_vuzp1q_p8(<16 x i8> %a, <16 x i8> %b) { 167; CHECK: test_vuzp1q_p8: 168; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 169entry: 170 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 171 ret <16 x i8> %shuffle.i 172} 173 174define <4 x i16> @test_vuzp1_p16(<4 x i16> %a, <4 x i16> %b) { 175; CHECK: test_vuzp1_p16: 176; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 177entry: 178 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 179 ret <4 x i16> %shuffle.i 180} 181 182define <8 x i16> @test_vuzp1q_p16(<8 x i16> %a, <8 x i16> %b) { 183; CHECK: test_vuzp1q_p16: 184; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 185entry: 186 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 187 ret <8 x i16> %shuffle.i 188} 189 190define <8 x i8> @test_vuzp2_s8(<8 x i8> %a, <8 x i8> %b) { 191; CHECK: test_vuzp2_s8: 192; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 193entry: 194 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 195 ret <8 x i8> %shuffle.i 196} 197 198define <16 x i8> @test_vuzp2q_s8(<16 x i8> %a, <16 x i8> %b) { 199; CHECK: test_vuzp2q_s8: 200; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 201entry: 202 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 203 ret <16 x i8> %shuffle.i 204} 205 206define <4 x i16> @test_vuzp2_s16(<4 x i16> %a, <4 x i16> %b) { 207; CHECK: test_vuzp2_s16: 208; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 209entry: 210 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 211 ret <4 x i16> %shuffle.i 212} 213 214define <8 x i16> @test_vuzp2q_s16(<8 x i16> %a, <8 x i16> %b) { 215; CHECK: test_vuzp2q_s16: 216; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 217entry: 218 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 219 ret <8 x i16> %shuffle.i 220} 221 222define <2 x i32> @test_vuzp2_s32(<2 x i32> %a, <2 x i32> %b) { 223; CHECK: test_vuzp2_s32: 224; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 225entry: 226 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 227 ret <2 x i32> %shuffle.i 228} 229 230define <4 x i32> @test_vuzp2q_s32(<4 x i32> %a, <4 x i32> %b) { 231; CHECK: test_vuzp2q_s32: 232; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 233entry: 234 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 235 ret <4 x i32> %shuffle.i 236} 237 238define <2 x i64> @test_vuzp2q_s64(<2 x i64> %a, <2 x i64> %b) { 239; CHECK: test_vuzp2q_s64: 240; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1] 241; CHECK-NEXT: orr {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 242entry: 243 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 244 ret <2 x i64> %shuffle.i 245} 246 247define <8 x i8> @test_vuzp2_u8(<8 x i8> %a, <8 x i8> %b) { 248; CHECK: test_vuzp2_u8: 249; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 250entry: 251 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 252 ret <8 x i8> %shuffle.i 253} 254 255define <16 x i8> @test_vuzp2q_u8(<16 x i8> %a, <16 x i8> %b) { 256; CHECK: test_vuzp2q_u8: 257; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 258entry: 259 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 260 ret <16 x i8> %shuffle.i 261} 262 263define <4 x i16> @test_vuzp2_u16(<4 x i16> %a, <4 x i16> %b) { 264; CHECK: test_vuzp2_u16: 265; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 266entry: 267 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 268 ret <4 x i16> %shuffle.i 269} 270 271define <8 x i16> @test_vuzp2q_u16(<8 x i16> %a, <8 x i16> %b) { 272; CHECK: test_vuzp2q_u16: 273; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 274entry: 275 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 276 ret <8 x i16> %shuffle.i 277} 278 279define <2 x i32> @test_vuzp2_u32(<2 x i32> %a, <2 x i32> %b) { 280; CHECK: test_vuzp2_u32: 281; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 282entry: 283 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 284 ret <2 x i32> %shuffle.i 285} 286 287define <4 x i32> @test_vuzp2q_u32(<4 x i32> %a, <4 x i32> %b) { 288; CHECK: test_vuzp2q_u32: 289; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 290entry: 291 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 292 ret <4 x i32> %shuffle.i 293} 294 295define <2 x i64> @test_vuzp2q_u64(<2 x i64> %a, <2 x i64> %b) { 296; CHECK: test_vuzp2q_u64: 297; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1] 298; CHECK-NEXT: orr {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 299entry: 300 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 301 ret <2 x i64> %shuffle.i 302} 303 304define <2 x float> @test_vuzp2_f32(<2 x float> %a, <2 x float> %b) { 305; CHECK: test_vuzp2_f32: 306; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 307entry: 308 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 309 ret <2 x float> %shuffle.i 310} 311 312define <4 x float> @test_vuzp2q_f32(<4 x float> %a, <4 x float> %b) { 313; CHECK: test_vuzp2q_f32: 314; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 315entry: 316 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 317 ret <4 x float> %shuffle.i 318} 319 320define <2 x double> @test_vuzp2q_f64(<2 x double> %a, <2 x double> %b) { 321; CHECK: test_vuzp2q_f64: 322; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1] 323; CHECK-NEXT: orr {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 324entry: 325 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3> 326 ret <2 x double> %shuffle.i 327} 328 329define <8 x i8> @test_vuzp2_p8(<8 x i8> %a, <8 x i8> %b) { 330; CHECK: test_vuzp2_p8: 331; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 332entry: 333 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 334 ret <8 x i8> %shuffle.i 335} 336 337define <16 x i8> @test_vuzp2q_p8(<16 x i8> %a, <16 x i8> %b) { 338; CHECK: test_vuzp2q_p8: 339; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 340entry: 341 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 342 ret <16 x i8> %shuffle.i 343} 344 345define <4 x i16> @test_vuzp2_p16(<4 x i16> %a, <4 x i16> %b) { 346; CHECK: test_vuzp2_p16: 347; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 348entry: 349 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 350 ret <4 x i16> %shuffle.i 351} 352 353define <8 x i16> @test_vuzp2q_p16(<8 x i16> %a, <8 x i16> %b) { 354; CHECK: test_vuzp2q_p16: 355; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 356entry: 357 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 358 ret <8 x i16> %shuffle.i 359} 360 361define <8 x i8> @test_vzip1_s8(<8 x i8> %a, <8 x i8> %b) { 362; CHECK: test_vzip1_s8: 363; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 364entry: 365 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 366 ret <8 x i8> %shuffle.i 367} 368 369define <16 x i8> @test_vzip1q_s8(<16 x i8> %a, <16 x i8> %b) { 370; CHECK: test_vzip1q_s8: 371; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 372entry: 373 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 374 ret <16 x i8> %shuffle.i 375} 376 377define <4 x i16> @test_vzip1_s16(<4 x i16> %a, <4 x i16> %b) { 378; CHECK: test_vzip1_s16: 379; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 380entry: 381 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 382 ret <4 x i16> %shuffle.i 383} 384 385define <8 x i16> @test_vzip1q_s16(<8 x i16> %a, <8 x i16> %b) { 386; CHECK: test_vzip1q_s16: 387; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 388entry: 389 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 390 ret <8 x i16> %shuffle.i 391} 392 393define <2 x i32> @test_vzip1_s32(<2 x i32> %a, <2 x i32> %b) { 394; CHECK: test_vzip1_s32: 395; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 396entry: 397 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 398 ret <2 x i32> %shuffle.i 399} 400 401define <4 x i32> @test_vzip1q_s32(<4 x i32> %a, <4 x i32> %b) { 402; CHECK: test_vzip1q_s32: 403; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 404entry: 405 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 406 ret <4 x i32> %shuffle.i 407} 408 409define <2 x i64> @test_vzip1q_s64(<2 x i64> %a, <2 x i64> %b) { 410; CHECK: test_vzip1q_s64: 411; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0] 412entry: 413 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 414 ret <2 x i64> %shuffle.i 415} 416 417define <8 x i8> @test_vzip1_u8(<8 x i8> %a, <8 x i8> %b) { 418; CHECK: test_vzip1_u8: 419; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 420entry: 421 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 422 ret <8 x i8> %shuffle.i 423} 424 425define <16 x i8> @test_vzip1q_u8(<16 x i8> %a, <16 x i8> %b) { 426; CHECK: test_vzip1q_u8: 427; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 428entry: 429 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 430 ret <16 x i8> %shuffle.i 431} 432 433define <4 x i16> @test_vzip1_u16(<4 x i16> %a, <4 x i16> %b) { 434; CHECK: test_vzip1_u16: 435; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 436entry: 437 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 438 ret <4 x i16> %shuffle.i 439} 440 441define <8 x i16> @test_vzip1q_u16(<8 x i16> %a, <8 x i16> %b) { 442; CHECK: test_vzip1q_u16: 443; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 444entry: 445 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 446 ret <8 x i16> %shuffle.i 447} 448 449define <2 x i32> @test_vzip1_u32(<2 x i32> %a, <2 x i32> %b) { 450; CHECK: test_vzip1_u32: 451; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 452entry: 453 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 454 ret <2 x i32> %shuffle.i 455} 456 457define <4 x i32> @test_vzip1q_u32(<4 x i32> %a, <4 x i32> %b) { 458; CHECK: test_vzip1q_u32: 459; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 460entry: 461 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 462 ret <4 x i32> %shuffle.i 463} 464 465define <2 x i64> @test_vzip1q_u64(<2 x i64> %a, <2 x i64> %b) { 466; CHECK: test_vzip1q_u64: 467; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0] 468entry: 469 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 470 ret <2 x i64> %shuffle.i 471} 472 473define <2 x float> @test_vzip1_f32(<2 x float> %a, <2 x float> %b) { 474; CHECK: test_vzip1_f32: 475; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 476entry: 477 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 478 ret <2 x float> %shuffle.i 479} 480 481define <4 x float> @test_vzip1q_f32(<4 x float> %a, <4 x float> %b) { 482; CHECK: test_vzip1q_f32: 483; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 484entry: 485 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 486 ret <4 x float> %shuffle.i 487} 488 489define <2 x double> @test_vzip1q_f64(<2 x double> %a, <2 x double> %b) { 490; CHECK: test_vzip1q_f64: 491; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0] 492entry: 493 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2> 494 ret <2 x double> %shuffle.i 495} 496 497define <8 x i8> @test_vzip1_p8(<8 x i8> %a, <8 x i8> %b) { 498; CHECK: test_vzip1_p8: 499; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 500entry: 501 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 502 ret <8 x i8> %shuffle.i 503} 504 505define <16 x i8> @test_vzip1q_p8(<16 x i8> %a, <16 x i8> %b) { 506; CHECK: test_vzip1q_p8: 507; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 508entry: 509 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 510 ret <16 x i8> %shuffle.i 511} 512 513define <4 x i16> @test_vzip1_p16(<4 x i16> %a, <4 x i16> %b) { 514; CHECK: test_vzip1_p16: 515; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 516entry: 517 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 518 ret <4 x i16> %shuffle.i 519} 520 521define <8 x i16> @test_vzip1q_p16(<8 x i16> %a, <8 x i16> %b) { 522; CHECK: test_vzip1q_p16: 523; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 524entry: 525 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 526 ret <8 x i16> %shuffle.i 527} 528 529define <8 x i8> @test_vzip2_s8(<8 x i8> %a, <8 x i8> %b) { 530; CHECK: test_vzip2_s8: 531; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 532entry: 533 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 534 ret <8 x i8> %shuffle.i 535} 536 537define <16 x i8> @test_vzip2q_s8(<16 x i8> %a, <16 x i8> %b) { 538; CHECK: test_vzip2q_s8: 539; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 540entry: 541 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 542 ret <16 x i8> %shuffle.i 543} 544 545define <4 x i16> @test_vzip2_s16(<4 x i16> %a, <4 x i16> %b) { 546; CHECK: test_vzip2_s16: 547; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 548entry: 549 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 550 ret <4 x i16> %shuffle.i 551} 552 553define <8 x i16> @test_vzip2q_s16(<8 x i16> %a, <8 x i16> %b) { 554; CHECK: test_vzip2q_s16: 555; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 556entry: 557 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 558 ret <8 x i16> %shuffle.i 559} 560 561define <2 x i32> @test_vzip2_s32(<2 x i32> %a, <2 x i32> %b) { 562; CHECK: test_vzip2_s32: 563; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 564entry: 565 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 566 ret <2 x i32> %shuffle.i 567} 568 569define <4 x i32> @test_vzip2q_s32(<4 x i32> %a, <4 x i32> %b) { 570; CHECK: test_vzip2q_s32: 571; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 572entry: 573 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 574 ret <4 x i32> %shuffle.i 575} 576 577define <2 x i64> @test_vzip2q_s64(<2 x i64> %a, <2 x i64> %b) { 578; CHECK: test_vzip2q_s64: 579; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1] 580entry: 581 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 582 ret <2 x i64> %shuffle.i 583} 584 585define <8 x i8> @test_vzip2_u8(<8 x i8> %a, <8 x i8> %b) { 586; CHECK: test_vzip2_u8: 587; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 588entry: 589 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 590 ret <8 x i8> %shuffle.i 591} 592 593define <16 x i8> @test_vzip2q_u8(<16 x i8> %a, <16 x i8> %b) { 594; CHECK: test_vzip2q_u8: 595; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 596entry: 597 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 598 ret <16 x i8> %shuffle.i 599} 600 601define <4 x i16> @test_vzip2_u16(<4 x i16> %a, <4 x i16> %b) { 602; CHECK: test_vzip2_u16: 603; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 604entry: 605 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 606 ret <4 x i16> %shuffle.i 607} 608 609define <8 x i16> @test_vzip2q_u16(<8 x i16> %a, <8 x i16> %b) { 610; CHECK: test_vzip2q_u16: 611; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 612entry: 613 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 614 ret <8 x i16> %shuffle.i 615} 616 617define <2 x i32> @test_vzip2_u32(<2 x i32> %a, <2 x i32> %b) { 618; CHECK: test_vzip2_u32: 619; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 620entry: 621 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 622 ret <2 x i32> %shuffle.i 623} 624 625define <4 x i32> @test_vzip2q_u32(<4 x i32> %a, <4 x i32> %b) { 626; CHECK: test_vzip2q_u32: 627; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 628entry: 629 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 630 ret <4 x i32> %shuffle.i 631} 632 633define <2 x i64> @test_vzip2q_u64(<2 x i64> %a, <2 x i64> %b) { 634; CHECK: test_vzip2q_u64: 635; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1] 636entry: 637 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 638 ret <2 x i64> %shuffle.i 639} 640 641define <2 x float> @test_vzip2_f32(<2 x float> %a, <2 x float> %b) { 642; CHECK: test_vzip2_f32: 643; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 644entry: 645 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 646 ret <2 x float> %shuffle.i 647} 648 649define <4 x float> @test_vzip2q_f32(<4 x float> %a, <4 x float> %b) { 650; CHECK: test_vzip2q_f32: 651; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 652entry: 653 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 654 ret <4 x float> %shuffle.i 655} 656 657define <2 x double> @test_vzip2q_f64(<2 x double> %a, <2 x double> %b) { 658; CHECK: test_vzip2q_f64: 659; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1] 660entry: 661 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3> 662 ret <2 x double> %shuffle.i 663} 664 665define <8 x i8> @test_vzip2_p8(<8 x i8> %a, <8 x i8> %b) { 666; CHECK: test_vzip2_p8: 667; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 668entry: 669 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 670 ret <8 x i8> %shuffle.i 671} 672 673define <16 x i8> @test_vzip2q_p8(<16 x i8> %a, <16 x i8> %b) { 674; CHECK: test_vzip2q_p8: 675; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 676entry: 677 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 678 ret <16 x i8> %shuffle.i 679} 680 681define <4 x i16> @test_vzip2_p16(<4 x i16> %a, <4 x i16> %b) { 682; CHECK: test_vzip2_p16: 683; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 684entry: 685 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 686 ret <4 x i16> %shuffle.i 687} 688 689define <8 x i16> @test_vzip2q_p16(<8 x i16> %a, <8 x i16> %b) { 690; CHECK: test_vzip2q_p16: 691; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 692entry: 693 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 694 ret <8 x i16> %shuffle.i 695} 696 697define <8 x i8> @test_vtrn1_s8(<8 x i8> %a, <8 x i8> %b) { 698; CHECK: test_vtrn1_s8: 699; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 700entry: 701 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 702 ret <8 x i8> %shuffle.i 703} 704 705define <16 x i8> @test_vtrn1q_s8(<16 x i8> %a, <16 x i8> %b) { 706; CHECK: test_vtrn1q_s8: 707; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 708entry: 709 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 710 ret <16 x i8> %shuffle.i 711} 712 713define <4 x i16> @test_vtrn1_s16(<4 x i16> %a, <4 x i16> %b) { 714; CHECK: test_vtrn1_s16: 715; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 716entry: 717 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 718 ret <4 x i16> %shuffle.i 719} 720 721define <8 x i16> @test_vtrn1q_s16(<8 x i16> %a, <8 x i16> %b) { 722; CHECK: test_vtrn1q_s16: 723; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 724entry: 725 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 726 ret <8 x i16> %shuffle.i 727} 728 729define <2 x i32> @test_vtrn1_s32(<2 x i32> %a, <2 x i32> %b) { 730; CHECK: test_vtrn1_s32: 731; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 732entry: 733 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 734 ret <2 x i32> %shuffle.i 735} 736 737define <4 x i32> @test_vtrn1q_s32(<4 x i32> %a, <4 x i32> %b) { 738; CHECK: test_vtrn1q_s32: 739; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 740entry: 741 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 742 ret <4 x i32> %shuffle.i 743} 744 745define <2 x i64> @test_vtrn1q_s64(<2 x i64> %a, <2 x i64> %b) { 746; CHECK: test_vtrn1q_s64: 747; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0] 748entry: 749 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 750 ret <2 x i64> %shuffle.i 751} 752 753define <8 x i8> @test_vtrn1_u8(<8 x i8> %a, <8 x i8> %b) { 754; CHECK: test_vtrn1_u8: 755; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 756entry: 757 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 758 ret <8 x i8> %shuffle.i 759} 760 761define <16 x i8> @test_vtrn1q_u8(<16 x i8> %a, <16 x i8> %b) { 762; CHECK: test_vtrn1q_u8: 763; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 764entry: 765 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 766 ret <16 x i8> %shuffle.i 767} 768 769define <4 x i16> @test_vtrn1_u16(<4 x i16> %a, <4 x i16> %b) { 770; CHECK: test_vtrn1_u16: 771; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 772entry: 773 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 774 ret <4 x i16> %shuffle.i 775} 776 777define <8 x i16> @test_vtrn1q_u16(<8 x i16> %a, <8 x i16> %b) { 778; CHECK: test_vtrn1q_u16: 779; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 780entry: 781 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 782 ret <8 x i16> %shuffle.i 783} 784 785define <2 x i32> @test_vtrn1_u32(<2 x i32> %a, <2 x i32> %b) { 786; CHECK: test_vtrn1_u32: 787; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 788entry: 789 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 790 ret <2 x i32> %shuffle.i 791} 792 793define <4 x i32> @test_vtrn1q_u32(<4 x i32> %a, <4 x i32> %b) { 794; CHECK: test_vtrn1q_u32: 795; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 796entry: 797 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 798 ret <4 x i32> %shuffle.i 799} 800 801define <2 x i64> @test_vtrn1q_u64(<2 x i64> %a, <2 x i64> %b) { 802; CHECK: test_vtrn1q_u64: 803; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0] 804entry: 805 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 806 ret <2 x i64> %shuffle.i 807} 808 809define <2 x float> @test_vtrn1_f32(<2 x float> %a, <2 x float> %b) { 810; CHECK: test_vtrn1_f32: 811; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 812entry: 813 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 814 ret <2 x float> %shuffle.i 815} 816 817define <4 x float> @test_vtrn1q_f32(<4 x float> %a, <4 x float> %b) { 818; CHECK: test_vtrn1q_f32: 819; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 820entry: 821 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 822 ret <4 x float> %shuffle.i 823} 824 825define <2 x double> @test_vtrn1q_f64(<2 x double> %a, <2 x double> %b) { 826; CHECK: test_vtrn1q_f64: 827; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0] 828entry: 829 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2> 830 ret <2 x double> %shuffle.i 831} 832 833define <8 x i8> @test_vtrn1_p8(<8 x i8> %a, <8 x i8> %b) { 834; CHECK: test_vtrn1_p8: 835; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 836entry: 837 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 838 ret <8 x i8> %shuffle.i 839} 840 841define <16 x i8> @test_vtrn1q_p8(<16 x i8> %a, <16 x i8> %b) { 842; CHECK: test_vtrn1q_p8: 843; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 844entry: 845 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 846 ret <16 x i8> %shuffle.i 847} 848 849define <4 x i16> @test_vtrn1_p16(<4 x i16> %a, <4 x i16> %b) { 850; CHECK: test_vtrn1_p16: 851; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 852entry: 853 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 854 ret <4 x i16> %shuffle.i 855} 856 857define <8 x i16> @test_vtrn1q_p16(<8 x i16> %a, <8 x i16> %b) { 858; CHECK: test_vtrn1q_p16: 859; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 860entry: 861 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 862 ret <8 x i16> %shuffle.i 863} 864 865define <8 x i8> @test_vtrn2_s8(<8 x i8> %a, <8 x i8> %b) { 866; CHECK: test_vtrn2_s8: 867; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 868entry: 869 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 870 ret <8 x i8> %shuffle.i 871} 872 873define <16 x i8> @test_vtrn2q_s8(<16 x i8> %a, <16 x i8> %b) { 874; CHECK: test_vtrn2q_s8: 875; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 876entry: 877 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 878 ret <16 x i8> %shuffle.i 879} 880 881define <4 x i16> @test_vtrn2_s16(<4 x i16> %a, <4 x i16> %b) { 882; CHECK: test_vtrn2_s16: 883; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 884entry: 885 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 886 ret <4 x i16> %shuffle.i 887} 888 889define <8 x i16> @test_vtrn2q_s16(<8 x i16> %a, <8 x i16> %b) { 890; CHECK: test_vtrn2q_s16: 891; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 892entry: 893 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 894 ret <8 x i16> %shuffle.i 895} 896 897define <2 x i32> @test_vtrn2_s32(<2 x i32> %a, <2 x i32> %b) { 898; CHECK: test_vtrn2_s32: 899; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 900entry: 901 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 902 ret <2 x i32> %shuffle.i 903} 904 905define <4 x i32> @test_vtrn2q_s32(<4 x i32> %a, <4 x i32> %b) { 906; CHECK: test_vtrn2q_s32: 907; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 908entry: 909 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 910 ret <4 x i32> %shuffle.i 911} 912 913define <2 x i64> @test_vtrn2q_s64(<2 x i64> %a, <2 x i64> %b) { 914; CHECK: test_vtrn2q_s64: 915; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1] 916entry: 917 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 918 ret <2 x i64> %shuffle.i 919} 920 921define <8 x i8> @test_vtrn2_u8(<8 x i8> %a, <8 x i8> %b) { 922; CHECK: test_vtrn2_u8: 923; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 924entry: 925 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 926 ret <8 x i8> %shuffle.i 927} 928 929define <16 x i8> @test_vtrn2q_u8(<16 x i8> %a, <16 x i8> %b) { 930; CHECK: test_vtrn2q_u8: 931; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 932entry: 933 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 934 ret <16 x i8> %shuffle.i 935} 936 937define <4 x i16> @test_vtrn2_u16(<4 x i16> %a, <4 x i16> %b) { 938; CHECK: test_vtrn2_u16: 939; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 940entry: 941 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 942 ret <4 x i16> %shuffle.i 943} 944 945define <8 x i16> @test_vtrn2q_u16(<8 x i16> %a, <8 x i16> %b) { 946; CHECK: test_vtrn2q_u16: 947; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 948entry: 949 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 950 ret <8 x i16> %shuffle.i 951} 952 953define <2 x i32> @test_vtrn2_u32(<2 x i32> %a, <2 x i32> %b) { 954; CHECK: test_vtrn2_u32: 955; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 956entry: 957 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 958 ret <2 x i32> %shuffle.i 959} 960 961define <4 x i32> @test_vtrn2q_u32(<4 x i32> %a, <4 x i32> %b) { 962; CHECK: test_vtrn2q_u32: 963; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 964entry: 965 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 966 ret <4 x i32> %shuffle.i 967} 968 969define <2 x i64> @test_vtrn2q_u64(<2 x i64> %a, <2 x i64> %b) { 970; CHECK: test_vtrn2q_u64: 971; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1] 972entry: 973 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 974 ret <2 x i64> %shuffle.i 975} 976 977define <2 x float> @test_vtrn2_f32(<2 x float> %a, <2 x float> %b) { 978; CHECK: test_vtrn2_f32: 979; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 980entry: 981 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 982 ret <2 x float> %shuffle.i 983} 984 985define <4 x float> @test_vtrn2q_f32(<4 x float> %a, <4 x float> %b) { 986; CHECK: test_vtrn2q_f32: 987; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 988entry: 989 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 990 ret <4 x float> %shuffle.i 991} 992 993define <2 x double> @test_vtrn2q_f64(<2 x double> %a, <2 x double> %b) { 994; CHECK: test_vtrn2q_f64: 995; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1] 996entry: 997 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3> 998 ret <2 x double> %shuffle.i 999} 1000 1001define <8 x i8> @test_vtrn2_p8(<8 x i8> %a, <8 x i8> %b) { 1002; CHECK: test_vtrn2_p8: 1003; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1004entry: 1005 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1006 ret <8 x i8> %shuffle.i 1007} 1008 1009define <16 x i8> @test_vtrn2q_p8(<16 x i8> %a, <16 x i8> %b) { 1010; CHECK: test_vtrn2q_p8: 1011; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1012entry: 1013 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 1014 ret <16 x i8> %shuffle.i 1015} 1016 1017define <4 x i16> @test_vtrn2_p16(<4 x i16> %a, <4 x i16> %b) { 1018; CHECK: test_vtrn2_p16: 1019; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1020entry: 1021 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1022 ret <4 x i16> %shuffle.i 1023} 1024 1025define <8 x i16> @test_vtrn2q_p16(<8 x i16> %a, <8 x i16> %b) { 1026; CHECK: test_vtrn2q_p16: 1027; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1028entry: 1029 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1030 ret <8 x i16> %shuffle.i 1031} 1032 1033define %struct.int8x8x2_t @test_vuzp_s8(<8 x i8> %a, <8 x i8> %b) { 1034; CHECK: test_vuzp_s8: 1035; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1036; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1037entry: 1038 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1039 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1040 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0 1041 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1 1042 ret %struct.int8x8x2_t %.fca.0.1.insert 1043} 1044 1045define %struct.int16x4x2_t @test_vuzp_s16(<4 x i16> %a, <4 x i16> %b) { 1046; CHECK: test_vuzp_s16: 1047; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1048; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1049entry: 1050 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1051 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1052 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0 1053 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1 1054 ret %struct.int16x4x2_t %.fca.0.1.insert 1055} 1056 1057define %struct.int32x2x2_t @test_vuzp_s32(<2 x i32> %a, <2 x i32> %b) { 1058; CHECK: test_vuzp_s32: 1059; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 1060; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 1061entry: 1062 %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 1063 %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 1064 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0 1065 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vuzp1.i, 0, 1 1066 ret %struct.int32x2x2_t %.fca.0.1.insert 1067} 1068 1069define %struct.uint8x8x2_t @test_vuzp_u8(<8 x i8> %a, <8 x i8> %b) { 1070; CHECK: test_vuzp_u8: 1071; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1072; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1073entry: 1074 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1075 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1076 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0 1077 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1 1078 ret %struct.uint8x8x2_t %.fca.0.1.insert 1079} 1080 1081define %struct.uint16x4x2_t @test_vuzp_u16(<4 x i16> %a, <4 x i16> %b) { 1082; CHECK: test_vuzp_u16: 1083; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1084; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1085entry: 1086 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1087 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1088 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0 1089 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1 1090 ret %struct.uint16x4x2_t %.fca.0.1.insert 1091} 1092 1093define %struct.uint32x2x2_t @test_vuzp_u32(<2 x i32> %a, <2 x i32> %b) { 1094; CHECK: test_vuzp_u32: 1095; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 1096; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 1097entry: 1098 %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 1099 %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 1100 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0 1101 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vuzp1.i, 0, 1 1102 ret %struct.uint32x2x2_t %.fca.0.1.insert 1103} 1104 1105define %struct.float32x2x2_t @test_vuzp_f32(<2 x float> %a, <2 x float> %b) { 1106; CHECK: test_vuzp_f32: 1107; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 1108; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 1109entry: 1110 %vuzp.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 1111 %vuzp1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 1112 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vuzp.i, 0, 0 1113 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vuzp1.i, 0, 1 1114 ret %struct.float32x2x2_t %.fca.0.1.insert 1115} 1116 1117define %struct.poly8x8x2_t @test_vuzp_p8(<8 x i8> %a, <8 x i8> %b) { 1118; CHECK: test_vuzp_p8: 1119; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1120; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1121entry: 1122 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1123 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1124 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0 1125 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1 1126 ret %struct.poly8x8x2_t %.fca.0.1.insert 1127} 1128 1129define %struct.poly16x4x2_t @test_vuzp_p16(<4 x i16> %a, <4 x i16> %b) { 1130; CHECK: test_vuzp_p16: 1131; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1132; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1133entry: 1134 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1135 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1136 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0 1137 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1 1138 ret %struct.poly16x4x2_t %.fca.0.1.insert 1139} 1140 1141define %struct.int8x16x2_t @test_vuzpq_s8(<16 x i8> %a, <16 x i8> %b) { 1142; CHECK: test_vuzpq_s8: 1143; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1144; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1145entry: 1146 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 1147 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 1148 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0 1149 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1 1150 ret %struct.int8x16x2_t %.fca.0.1.insert 1151} 1152 1153define %struct.int16x8x2_t @test_vuzpq_s16(<8 x i16> %a, <8 x i16> %b) { 1154; CHECK: test_vuzpq_s16: 1155; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1156; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1157entry: 1158 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1159 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1160 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0 1161 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1 1162 ret %struct.int16x8x2_t %.fca.0.1.insert 1163} 1164 1165define %struct.int32x4x2_t @test_vuzpq_s32(<4 x i32> %a, <4 x i32> %b) { 1166; CHECK: test_vuzpq_s32: 1167; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1168; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1169entry: 1170 %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1171 %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1172 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vuzp.i, 0, 0 1173 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vuzp1.i, 0, 1 1174 ret %struct.int32x4x2_t %.fca.0.1.insert 1175} 1176 1177define %struct.uint8x16x2_t @test_vuzpq_u8(<16 x i8> %a, <16 x i8> %b) { 1178; CHECK: test_vuzpq_u8: 1179; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1180; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1181entry: 1182 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 1183 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 1184 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0 1185 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1 1186 ret %struct.uint8x16x2_t %.fca.0.1.insert 1187} 1188 1189define %struct.uint16x8x2_t @test_vuzpq_u16(<8 x i16> %a, <8 x i16> %b) { 1190; CHECK: test_vuzpq_u16: 1191; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1192; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1193entry: 1194 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1195 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1196 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0 1197 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1 1198 ret %struct.uint16x8x2_t %.fca.0.1.insert 1199} 1200 1201define %struct.uint32x4x2_t @test_vuzpq_u32(<4 x i32> %a, <4 x i32> %b) { 1202; CHECK: test_vuzpq_u32: 1203; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1204; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1205entry: 1206 %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1207 %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1208 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vuzp.i, 0, 0 1209 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vuzp1.i, 0, 1 1210 ret %struct.uint32x4x2_t %.fca.0.1.insert 1211} 1212 1213define %struct.float32x4x2_t @test_vuzpq_f32(<4 x float> %a, <4 x float> %b) { 1214; CHECK: test_vuzpq_f32: 1215; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1216; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1217entry: 1218 %vuzp.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1219 %vuzp1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1220 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vuzp.i, 0, 0 1221 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vuzp1.i, 0, 1 1222 ret %struct.float32x4x2_t %.fca.0.1.insert 1223} 1224 1225define %struct.poly8x16x2_t @test_vuzpq_p8(<16 x i8> %a, <16 x i8> %b) { 1226; CHECK: test_vuzpq_p8: 1227; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1228; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1229entry: 1230 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 1231 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 1232 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0 1233 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1 1234 ret %struct.poly8x16x2_t %.fca.0.1.insert 1235} 1236 1237define %struct.poly16x8x2_t @test_vuzpq_p16(<8 x i16> %a, <8 x i16> %b) { 1238; CHECK: test_vuzpq_p16: 1239; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1240; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1241entry: 1242 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1243 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1244 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0 1245 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1 1246 ret %struct.poly16x8x2_t %.fca.0.1.insert 1247} 1248 1249define %struct.int8x8x2_t @test_vzip_s8(<8 x i8> %a, <8 x i8> %b) { 1250; CHECK: test_vzip_s8: 1251; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1252; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1253entry: 1254 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1255 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1256 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vzip.i, 0, 0 1257 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1 1258 ret %struct.int8x8x2_t %.fca.0.1.insert 1259} 1260 1261define %struct.int16x4x2_t @test_vzip_s16(<4 x i16> %a, <4 x i16> %b) { 1262; CHECK: test_vzip_s16: 1263; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1264; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1265entry: 1266 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1267 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1268 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vzip.i, 0, 0 1269 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1 1270 ret %struct.int16x4x2_t %.fca.0.1.insert 1271} 1272 1273define %struct.int32x2x2_t @test_vzip_s32(<2 x i32> %a, <2 x i32> %b) { 1274; CHECK: test_vzip_s32: 1275; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 1276; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 1277entry: 1278 %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 1279 %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 1280 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vzip.i, 0, 0 1281 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vzip1.i, 0, 1 1282 ret %struct.int32x2x2_t %.fca.0.1.insert 1283} 1284 1285define %struct.uint8x8x2_t @test_vzip_u8(<8 x i8> %a, <8 x i8> %b) { 1286; CHECK: test_vzip_u8: 1287; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1288; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1289entry: 1290 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1291 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1292 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vzip.i, 0, 0 1293 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1 1294 ret %struct.uint8x8x2_t %.fca.0.1.insert 1295} 1296 1297define %struct.uint16x4x2_t @test_vzip_u16(<4 x i16> %a, <4 x i16> %b) { 1298; CHECK: test_vzip_u16: 1299; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1300; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1301entry: 1302 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1303 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1304 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vzip.i, 0, 0 1305 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1 1306 ret %struct.uint16x4x2_t %.fca.0.1.insert 1307} 1308 1309define %struct.uint32x2x2_t @test_vzip_u32(<2 x i32> %a, <2 x i32> %b) { 1310; CHECK: test_vzip_u32: 1311; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 1312; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 1313entry: 1314 %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 1315 %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 1316 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vzip.i, 0, 0 1317 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vzip1.i, 0, 1 1318 ret %struct.uint32x2x2_t %.fca.0.1.insert 1319} 1320 1321define %struct.float32x2x2_t @test_vzip_f32(<2 x float> %a, <2 x float> %b) { 1322; CHECK: test_vzip_f32: 1323; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 1324; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 1325entry: 1326 %vzip.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 1327 %vzip1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 1328 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vzip.i, 0, 0 1329 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vzip1.i, 0, 1 1330 ret %struct.float32x2x2_t %.fca.0.1.insert 1331} 1332 1333define %struct.poly8x8x2_t @test_vzip_p8(<8 x i8> %a, <8 x i8> %b) { 1334; CHECK: test_vzip_p8: 1335; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1336; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1337entry: 1338 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1339 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1340 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vzip.i, 0, 0 1341 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1 1342 ret %struct.poly8x8x2_t %.fca.0.1.insert 1343} 1344 1345define %struct.poly16x4x2_t @test_vzip_p16(<4 x i16> %a, <4 x i16> %b) { 1346; CHECK: test_vzip_p16: 1347; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1348; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1349entry: 1350 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1351 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1352 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vzip.i, 0, 0 1353 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1 1354 ret %struct.poly16x4x2_t %.fca.0.1.insert 1355} 1356 1357define %struct.int8x16x2_t @test_vzipq_s8(<16 x i8> %a, <16 x i8> %b) { 1358; CHECK: test_vzipq_s8: 1359; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1360; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1361entry: 1362 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 1363 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 1364 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vzip.i, 0, 0 1365 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1 1366 ret %struct.int8x16x2_t %.fca.0.1.insert 1367} 1368 1369define %struct.int16x8x2_t @test_vzipq_s16(<8 x i16> %a, <8 x i16> %b) { 1370; CHECK: test_vzipq_s16: 1371; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1372; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1373entry: 1374 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1375 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1376 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vzip.i, 0, 0 1377 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1 1378 ret %struct.int16x8x2_t %.fca.0.1.insert 1379} 1380 1381define %struct.int32x4x2_t @test_vzipq_s32(<4 x i32> %a, <4 x i32> %b) { 1382; CHECK: test_vzipq_s32: 1383; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1384; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1385entry: 1386 %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1387 %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1388 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vzip.i, 0, 0 1389 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vzip1.i, 0, 1 1390 ret %struct.int32x4x2_t %.fca.0.1.insert 1391} 1392 1393define %struct.uint8x16x2_t @test_vzipq_u8(<16 x i8> %a, <16 x i8> %b) { 1394; CHECK: test_vzipq_u8: 1395; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1396; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1397entry: 1398 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 1399 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 1400 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vzip.i, 0, 0 1401 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1 1402 ret %struct.uint8x16x2_t %.fca.0.1.insert 1403} 1404 1405define %struct.uint16x8x2_t @test_vzipq_u16(<8 x i16> %a, <8 x i16> %b) { 1406; CHECK: test_vzipq_u16: 1407; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1408; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1409entry: 1410 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1411 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1412 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vzip.i, 0, 0 1413 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1 1414 ret %struct.uint16x8x2_t %.fca.0.1.insert 1415} 1416 1417define %struct.uint32x4x2_t @test_vzipq_u32(<4 x i32> %a, <4 x i32> %b) { 1418; CHECK: test_vzipq_u32: 1419; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1420; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1421entry: 1422 %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1423 %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1424 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vzip.i, 0, 0 1425 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vzip1.i, 0, 1 1426 ret %struct.uint32x4x2_t %.fca.0.1.insert 1427} 1428 1429define %struct.float32x4x2_t @test_vzipq_f32(<4 x float> %a, <4 x float> %b) { 1430; CHECK: test_vzipq_f32: 1431; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1432; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1433entry: 1434 %vzip.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1435 %vzip1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1436 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vzip.i, 0, 0 1437 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vzip1.i, 0, 1 1438 ret %struct.float32x4x2_t %.fca.0.1.insert 1439} 1440 1441define %struct.poly8x16x2_t @test_vzipq_p8(<16 x i8> %a, <16 x i8> %b) { 1442; CHECK: test_vzipq_p8: 1443; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1444; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1445entry: 1446 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 1447 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 1448 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vzip.i, 0, 0 1449 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1 1450 ret %struct.poly8x16x2_t %.fca.0.1.insert 1451} 1452 1453define %struct.poly16x8x2_t @test_vzipq_p16(<8 x i16> %a, <8 x i16> %b) { 1454; CHECK: test_vzipq_p16: 1455; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1456; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1457entry: 1458 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1459 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1460 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vzip.i, 0, 0 1461 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1 1462 ret %struct.poly16x8x2_t %.fca.0.1.insert 1463} 1464 1465define %struct.int8x8x2_t @test_vtrn_s8(<8 x i8> %a, <8 x i8> %b) { 1466; CHECK: test_vtrn_s8: 1467; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1468; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1469entry: 1470 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1471 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1472 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0 1473 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1 1474 ret %struct.int8x8x2_t %.fca.0.1.insert 1475} 1476 1477define %struct.int16x4x2_t @test_vtrn_s16(<4 x i16> %a, <4 x i16> %b) { 1478; CHECK: test_vtrn_s16: 1479; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1480; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1481entry: 1482 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1483 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1484 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0 1485 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1 1486 ret %struct.int16x4x2_t %.fca.0.1.insert 1487} 1488 1489define %struct.int32x2x2_t @test_vtrn_s32(<2 x i32> %a, <2 x i32> %b) { 1490; CHECK: test_vtrn_s32: 1491; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 1492; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 1493entry: 1494 %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 1495 %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 1496 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vtrn.i, 0, 0 1497 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vtrn1.i, 0, 1 1498 ret %struct.int32x2x2_t %.fca.0.1.insert 1499} 1500 1501define %struct.uint8x8x2_t @test_vtrn_u8(<8 x i8> %a, <8 x i8> %b) { 1502; CHECK: test_vtrn_u8: 1503; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1504; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1505entry: 1506 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1507 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1508 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0 1509 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1 1510 ret %struct.uint8x8x2_t %.fca.0.1.insert 1511} 1512 1513define %struct.uint16x4x2_t @test_vtrn_u16(<4 x i16> %a, <4 x i16> %b) { 1514; CHECK: test_vtrn_u16: 1515; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1516; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1517entry: 1518 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1519 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1520 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0 1521 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1 1522 ret %struct.uint16x4x2_t %.fca.0.1.insert 1523} 1524 1525define %struct.uint32x2x2_t @test_vtrn_u32(<2 x i32> %a, <2 x i32> %b) { 1526; CHECK: test_vtrn_u32: 1527; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 1528; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 1529entry: 1530 %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 1531 %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 1532 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vtrn.i, 0, 0 1533 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vtrn1.i, 0, 1 1534 ret %struct.uint32x2x2_t %.fca.0.1.insert 1535} 1536 1537define %struct.float32x2x2_t @test_vtrn_f32(<2 x float> %a, <2 x float> %b) { 1538; CHECK: test_vtrn_f32: 1539; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] 1540; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1] 1541entry: 1542 %vtrn.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 1543 %vtrn1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 1544 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vtrn.i, 0, 0 1545 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vtrn1.i, 0, 1 1546 ret %struct.float32x2x2_t %.fca.0.1.insert 1547} 1548 1549define %struct.poly8x8x2_t @test_vtrn_p8(<8 x i8> %a, <8 x i8> %b) { 1550; CHECK: test_vtrn_p8: 1551; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1552; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1553entry: 1554 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1555 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1556 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0 1557 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1 1558 ret %struct.poly8x8x2_t %.fca.0.1.insert 1559} 1560 1561define %struct.poly16x4x2_t @test_vtrn_p16(<4 x i16> %a, <4 x i16> %b) { 1562; CHECK: test_vtrn_p16: 1563; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1564; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1565entry: 1566 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1567 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1568 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0 1569 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1 1570 ret %struct.poly16x4x2_t %.fca.0.1.insert 1571} 1572 1573define %struct.int8x16x2_t @test_vtrnq_s8(<16 x i8> %a, <16 x i8> %b) { 1574; CHECK: test_vtrnq_s8: 1575; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1576; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1577entry: 1578 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 1579 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 1580 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0 1581 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1 1582 ret %struct.int8x16x2_t %.fca.0.1.insert 1583} 1584 1585define %struct.int16x8x2_t @test_vtrnq_s16(<8 x i16> %a, <8 x i16> %b) { 1586; CHECK: test_vtrnq_s16: 1587; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1588; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1589entry: 1590 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1591 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1592 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0 1593 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1 1594 ret %struct.int16x8x2_t %.fca.0.1.insert 1595} 1596 1597define %struct.int32x4x2_t @test_vtrnq_s32(<4 x i32> %a, <4 x i32> %b) { 1598; CHECK: test_vtrnq_s32: 1599; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1600; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1601entry: 1602 %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1603 %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1604 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vtrn.i, 0, 0 1605 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vtrn1.i, 0, 1 1606 ret %struct.int32x4x2_t %.fca.0.1.insert 1607} 1608 1609define %struct.uint8x16x2_t @test_vtrnq_u8(<16 x i8> %a, <16 x i8> %b) { 1610; CHECK: test_vtrnq_u8: 1611; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1612; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1613entry: 1614 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 1615 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 1616 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0 1617 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1 1618 ret %struct.uint8x16x2_t %.fca.0.1.insert 1619} 1620 1621define %struct.uint16x8x2_t @test_vtrnq_u16(<8 x i16> %a, <8 x i16> %b) { 1622; CHECK: test_vtrnq_u16: 1623; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1624; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1625entry: 1626 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1627 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1628 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0 1629 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1 1630 ret %struct.uint16x8x2_t %.fca.0.1.insert 1631} 1632 1633define %struct.uint32x4x2_t @test_vtrnq_u32(<4 x i32> %a, <4 x i32> %b) { 1634; CHECK: test_vtrnq_u32: 1635; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1636; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1637entry: 1638 %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1639 %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1640 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vtrn.i, 0, 0 1641 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vtrn1.i, 0, 1 1642 ret %struct.uint32x4x2_t %.fca.0.1.insert 1643} 1644 1645define %struct.float32x4x2_t @test_vtrnq_f32(<4 x float> %a, <4 x float> %b) { 1646; CHECK: test_vtrnq_f32: 1647; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1648; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1649entry: 1650 %vtrn.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1651 %vtrn1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1652 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vtrn.i, 0, 0 1653 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vtrn1.i, 0, 1 1654 ret %struct.float32x4x2_t %.fca.0.1.insert 1655} 1656 1657define %struct.poly8x16x2_t @test_vtrnq_p8(<16 x i8> %a, <16 x i8> %b) { 1658; CHECK: test_vtrnq_p8: 1659; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1660; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1661entry: 1662 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 1663 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 1664 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0 1665 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1 1666 ret %struct.poly8x16x2_t %.fca.0.1.insert 1667} 1668 1669define %struct.poly16x8x2_t @test_vtrnq_p16(<8 x i16> %a, <8 x i16> %b) { 1670; CHECK: test_vtrnq_p16: 1671; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1672; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1673entry: 1674 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1675 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1676 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0 1677 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1 1678 ret %struct.poly16x8x2_t %.fca.0.1.insert 1679} 1680 1681define %struct.uint8x8x2_t @test_uzp(<16 x i8> %y) { 1682; CHECK: test_uzp: 1683 1684 %vuzp.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1685 %vuzp1.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1686 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0 1687 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1 1688 ret %struct.uint8x8x2_t %.fca.0.1.insert 1689 1690; CHECK: dup {{d[0-9]+}}, {{v[0-9]+}}.d[1] 1691; CHECK-NEXT: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1692; CHECK-NEXT: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1693} 1694