1; RUN: llc < %s -march=arm -mattr=+vfp2 -post-RA-scheduler -mcpu=cortex-a8
2
3; ModuleID = '<stdin>'
4target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
5target triple = "armv7-apple-darwin9"
6
7%struct.tree = type { i32, double, double, %struct.tree*, %struct.tree*, %struct.tree*, %struct.tree* }
8@g = common global %struct.tree* null
9
10define %struct.tree* @tsp(%struct.tree* %t, i32 %nproc) nounwind {
11entry:
12  %t.idx51.val.i = load double* null              ; <double> [#uses=1]
13  br i1 undef, label %bb4.i, label %bb.i
14
15bb.i:                                             ; preds = %entry
16  unreachable
17
18bb4.i:                                            ; preds = %entry
19  %0 = load %struct.tree** @g, align 4         ; <%struct.tree*> [#uses=2]
20  %.idx45.i = getelementptr %struct.tree* %0, i32 0, i32 1 ; <double*> [#uses=1]
21  %.idx45.val.i = load double* %.idx45.i          ; <double> [#uses=1]
22  %.idx46.i = getelementptr %struct.tree* %0, i32 0, i32 2 ; <double*> [#uses=1]
23  %.idx46.val.i = load double* %.idx46.i          ; <double> [#uses=1]
24  %1 = fsub double 0.000000e+00, %.idx45.val.i    ; <double> [#uses=2]
25  %2 = fmul double %1, %1                         ; <double> [#uses=1]
26  %3 = fsub double %t.idx51.val.i, %.idx46.val.i  ; <double> [#uses=2]
27  %4 = fmul double %3, %3                         ; <double> [#uses=1]
28  %5 = fadd double %2, %4                         ; <double> [#uses=1]
29  %6 = tail call double @llvm.sqrt.f64(double %5) nounwind ; <double> [#uses=1]
30  br i1 undef, label %bb7.i4, label %bb6.i
31
32bb6.i:                                            ; preds = %bb4.i
33  br label %bb7.i4
34
35bb7.i4:                                           ; preds = %bb6.i, %bb4.i
36  %tton1.0.i = phi double [ %6, %bb6.i ], [ undef, %bb4.i ] ; <double> [#uses=0]
37  unreachable
38}
39
40declare double @llvm.sqrt.f64(double) nounwind readonly
41