1; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK-ARM
2; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=swift     | FileCheck %s -check-prefix=CHECK-HWDIV
3; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r5 | FileCheck %s -check-prefix=CHECK-HWDIV
4
5define i32 @f1(i32 %a, i32 %b) {
6entry:
7; CHECK-ARM: f1
8; CHECK-ARM: __divsi3
9
10; CHECK-HWDIV: f1
11; CHECK-HWDIV: sdiv
12        %tmp1 = sdiv i32 %a, %b         ; <i32> [#uses=1]
13        ret i32 %tmp1
14}
15
16define i32 @f2(i32 %a, i32 %b) {
17entry:
18; CHECK-ARM: f2
19; CHECK-ARM: __udivsi3
20
21; CHECK-HWDIV: f2
22; CHECK-HWDIV: udiv
23        %tmp1 = udiv i32 %a, %b         ; <i32> [#uses=1]
24        ret i32 %tmp1
25}
26
27define i32 @f3(i32 %a, i32 %b) {
28entry:
29; CHECK-ARM: f3
30; CHECK-ARM: __modsi3
31
32; CHECK-HWDIV: f3
33; CHECK-HWDIV: sdiv
34; CHECK-HWDIV: mls
35        %tmp1 = srem i32 %a, %b         ; <i32> [#uses=1]
36        ret i32 %tmp1
37}
38
39define i32 @f4(i32 %a, i32 %b) {
40entry:
41; CHECK-ARM: f4
42; CHECK-ARM: __umodsi3
43
44; CHECK-HWDIV: f4
45; CHECK-HWDIV: udiv
46; CHECK-HWDIV: mls
47        %tmp1 = urem i32 %a, %b         ; <i32> [#uses=1]
48        ret i32 %tmp1
49}
50
51