1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM 2; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM 3; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB 4; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv8-apple-ios | FileCheck %s --check-prefix=THUMB 5 6define i32 @t1(i1 %c) nounwind readnone { 7entry: 8; ARM: t1 9; ARM: movw r{{[1-9]}}, #10 10; ARM: cmp r0, #0 11; ARM: moveq r{{[1-9]}}, #20 12; ARM: mov r0, r{{[1-9]}} 13; THUMB: t1 14; THUMB: movs r{{[1-9]}}, #10 15; THUMB: movt r{{[1-9]}}, #0 16; THUMB: cmp r0, #0 17; THUMB: it eq 18; THUMB: moveq r{{[1-9]}}, #20 19; THUMB: mov r0, r{{[1-9]}} 20 %0 = select i1 %c, i32 10, i32 20 21 ret i32 %0 22} 23 24define i32 @t2(i1 %c, i32 %a) nounwind readnone { 25entry: 26; ARM: t2 27; ARM: cmp r0, #0 28; ARM: moveq r{{[1-9]}}, #20 29; ARM: mov r0, r{{[1-9]}} 30; THUMB: t2 31; THUMB: cmp r0, #0 32; THUMB: it eq 33; THUMB: moveq r{{[1-9]}}, #20 34; THUMB: mov r0, r{{[1-9]}} 35 %0 = select i1 %c, i32 %a, i32 20 36 ret i32 %0 37} 38 39define i32 @t3(i1 %c, i32 %a, i32 %b) nounwind readnone { 40entry: 41; ARM: t3 42; ARM: cmp r0, #0 43; ARM: movne r2, r1 44; ARM: add r0, r2, r1 45; THUMB: t3 46; THUMB: cmp r0, #0 47; THUMB: it ne 48; THUMB: movne r2, r1 49; THUMB: add.w r0, r2, r1 50 %0 = select i1 %c, i32 %a, i32 %b 51 %1 = add i32 %0, %a 52 ret i32 %1 53} 54 55define i32 @t4(i1 %c) nounwind readnone { 56entry: 57; ARM: t4 58; ARM: mvn r{{[1-9]}}, #9 59; ARM: cmp r0, #0 60; ARM: mvneq r{{[1-9]}}, #0 61; ARM: mov r0, r{{[1-9]}} 62; THUMB: t4 63; THUMB: movw r{{[1-9]}}, #65526 64; THUMB: movt r{{[1-9]}}, #65535 65; THUMB: cmp r0, #0 66; THUMB: it eq 67; THUMB: mvneq r{{[1-9]}}, #0 68; THUMB: mov r0, r{{[1-9]}} 69 %0 = select i1 %c, i32 -10, i32 -1 70 ret i32 %0 71} 72 73define i32 @t5(i1 %c, i32 %a) nounwind readnone { 74entry: 75; ARM: t5 76; ARM: cmp r0, #0 77; ARM: mvneq r{{[1-9]}}, #1 78; ARM: mov r0, r{{[1-9]}} 79; THUMB: t5 80; THUMB: cmp r0, #0 81; THUMB: it eq 82; THUMB: mvneq r{{[1-9]}}, #1 83; THUMB: mov r0, r{{[1-9]}} 84 %0 = select i1 %c, i32 %a, i32 -2 85 ret i32 %0 86} 87 88; Check one large negative immediates. 89define i32 @t6(i1 %c, i32 %a) nounwind readnone { 90entry: 91; ARM: t6 92; ARM: cmp r0, #0 93; ARM: mvneq r{{[1-9]}}, #978944 94; ARM: mov r0, r{{[1-9]}} 95; THUMB: t6 96; THUMB: cmp r0, #0 97; THUMB: it eq 98; THUMB: mvneq r{{[1-9]}}, #978944 99; THUMB: mov r0, r{{[1-9]}} 100 %0 = select i1 %c, i32 %a, i32 -978945 101 ret i32 %0 102} 103