1; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
2
3define i32 @f1(float %a) {
4;CHECK-LABEL: f1:
5;CHECK: vcmpe.f32
6;CHECK: movmi
7entry:
8        %tmp = fcmp olt float %a, 1.000000e+00          ; <i1> [#uses=1]
9        %tmp1 = zext i1 %tmp to i32              ; <i32> [#uses=1]
10        ret i32 %tmp1
11}
12
13define i32 @f2(float %a) {
14;CHECK-LABEL: f2:
15;CHECK: vcmpe.f32
16;CHECK: moveq
17entry:
18        %tmp = fcmp oeq float %a, 1.000000e+00          ; <i1> [#uses=1]
19        %tmp2 = zext i1 %tmp to i32              ; <i32> [#uses=1]
20        ret i32 %tmp2
21}
22
23define i32 @f3(float %a) {
24;CHECK-LABEL: f3:
25;CHECK: vcmpe.f32
26;CHECK: movgt
27entry:
28        %tmp = fcmp ogt float %a, 1.000000e+00          ; <i1> [#uses=1]
29        %tmp3 = zext i1 %tmp to i32              ; <i32> [#uses=1]
30        ret i32 %tmp3
31}
32
33define i32 @f4(float %a) {
34;CHECK-LABEL: f4:
35;CHECK: vcmpe.f32
36;CHECK: movge
37entry:
38        %tmp = fcmp oge float %a, 1.000000e+00          ; <i1> [#uses=1]
39        %tmp4 = zext i1 %tmp to i32              ; <i32> [#uses=1]
40        ret i32 %tmp4
41}
42
43define i32 @f5(float %a) {
44;CHECK-LABEL: f5:
45;CHECK: vcmpe.f32
46;CHECK: movls
47entry:
48        %tmp = fcmp ole float %a, 1.000000e+00          ; <i1> [#uses=1]
49        %tmp5 = zext i1 %tmp to i32              ; <i32> [#uses=1]
50        ret i32 %tmp5
51}
52
53define i32 @f6(float %a) {
54;CHECK-LABEL: f6:
55;CHECK: vcmpe.f32
56;CHECK: movne
57entry:
58        %tmp = fcmp une float %a, 1.000000e+00          ; <i1> [#uses=1]
59        %tmp6 = zext i1 %tmp to i32              ; <i32> [#uses=1]
60        ret i32 %tmp6
61}
62
63define i32 @g1(double %a) {
64;CHECK-LABEL: g1:
65;CHECK: vcmpe.f64
66;CHECK: movmi
67entry:
68        %tmp = fcmp olt double %a, 1.000000e+00         ; <i1> [#uses=1]
69        %tmp7 = zext i1 %tmp to i32              ; <i32> [#uses=1]
70        ret i32 %tmp7
71}
72