1; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s 2; RUN: llc < %s -mtriple=thumbv7-apple-darwin > %t 3; RUN: FileCheck %s < %t 4; RUN: FileCheck %s < %t --check-prefix=CHECK-T2ADDRMODE 5 6%0 = type { i32, i32 } 7 8; CHECK-LABEL: f0: 9; CHECK: ldrexd 10define i64 @f0(i8* %p) nounwind readonly { 11entry: 12 %ldrexd = tail call %0 @llvm.arm.ldrexd(i8* %p) 13 %0 = extractvalue %0 %ldrexd, 1 14 %1 = extractvalue %0 %ldrexd, 0 15 %2 = zext i32 %0 to i64 16 %3 = zext i32 %1 to i64 17 %shl = shl nuw i64 %2, 32 18 %4 = or i64 %shl, %3 19 ret i64 %4 20} 21 22; CHECK-LABEL: f1: 23; CHECK: strexd 24define i32 @f1(i8* %ptr, i64 %val) nounwind { 25entry: 26 %tmp4 = trunc i64 %val to i32 27 %tmp6 = lshr i64 %val, 32 28 %tmp7 = trunc i64 %tmp6 to i32 29 %strexd = tail call i32 @llvm.arm.strexd(i32 %tmp4, i32 %tmp7, i8* %ptr) 30 ret i32 %strexd 31} 32 33declare %0 @llvm.arm.ldrexd(i8*) nounwind readonly 34declare i32 @llvm.arm.strexd(i32, i32, i8*) nounwind 35 36; CHECK-LABEL: test_load_i8: 37; CHECK: ldrexb r0, [r0] 38; CHECK-NOT: uxtb 39define i32 @test_load_i8(i8* %addr) { 40 %val = call i32 @llvm.arm.ldrex.p0i8(i8* %addr) 41 ret i32 %val 42} 43 44; CHECK-LABEL: test_load_i16: 45; CHECK: ldrexh r0, [r0] 46; CHECK-NOT: uxth 47define i32 @test_load_i16(i16* %addr) { 48 %val = call i32 @llvm.arm.ldrex.p0i16(i16* %addr) 49 ret i32 %val 50} 51 52; CHECK-LABEL: test_load_i32: 53; CHECK: ldrex r0, [r0] 54define i32 @test_load_i32(i32* %addr) { 55 %val = call i32 @llvm.arm.ldrex.p0i32(i32* %addr) 56 ret i32 %val 57} 58 59declare i32 @llvm.arm.ldrex.p0i8(i8*) nounwind readonly 60declare i32 @llvm.arm.ldrex.p0i16(i16*) nounwind readonly 61declare i32 @llvm.arm.ldrex.p0i32(i32*) nounwind readonly 62 63; CHECK-LABEL: test_store_i8: 64; CHECK-NOT: uxtb 65; CHECK: strexb r0, r1, [r2] 66define i32 @test_store_i8(i32, i8 %val, i8* %addr) { 67 %extval = zext i8 %val to i32 68 %res = call i32 @llvm.arm.strex.p0i8(i32 %extval, i8* %addr) 69 ret i32 %res 70} 71 72; CHECK-LABEL: test_store_i16: 73; CHECK-NOT: uxth 74; CHECK: strexh r0, r1, [r2] 75define i32 @test_store_i16(i32, i16 %val, i16* %addr) { 76 %extval = zext i16 %val to i32 77 %res = call i32 @llvm.arm.strex.p0i16(i32 %extval, i16* %addr) 78 ret i32 %res 79} 80 81; CHECK-LABEL: test_store_i32: 82; CHECK: strex r0, r1, [r2] 83define i32 @test_store_i32(i32, i32 %val, i32* %addr) { 84 %res = call i32 @llvm.arm.strex.p0i32(i32 %val, i32* %addr) 85 ret i32 %res 86} 87 88declare i32 @llvm.arm.strex.p0i8(i32, i8*) nounwind 89declare i32 @llvm.arm.strex.p0i16(i32, i16*) nounwind 90declare i32 @llvm.arm.strex.p0i32(i32, i32*) nounwind 91 92; CHECK-LABEL: test_clear: 93; CHECK: clrex 94define void @test_clear() { 95 call void @llvm.arm.clrex() 96 ret void 97} 98 99declare void @llvm.arm.clrex() nounwind 100 101@base = global i32* null 102 103define void @excl_addrmode() { 104; CHECK-T2ADDRMODE-LABEL: excl_addrmode: 105 %base1020 = load i32** @base 106 %offset1020 = getelementptr i32* %base1020, i32 255 107 call i32 @llvm.arm.ldrex.p0i32(i32* %offset1020) 108 call i32 @llvm.arm.strex.p0i32(i32 0, i32* %offset1020) 109; CHECK-T2ADDRMODE: ldrex {{r[0-9]+}}, [{{r[0-9]+}}, #1020] 110; CHECK-T2ADDRMODE: strex {{r[0-9]+}}, {{r[0-9]+}}, [{{r[0-9]+}}, #1020] 111 112 %base1024 = load i32** @base 113 %offset1024 = getelementptr i32* %base1024, i32 256 114 call i32 @llvm.arm.ldrex.p0i32(i32* %offset1024) 115 call i32 @llvm.arm.strex.p0i32(i32 0, i32* %offset1024) 116; CHECK-T2ADDRMODE: add.w r[[ADDR:[0-9]+]], {{r[0-9]+}}, #1024 117; CHECK-T2ADDRMODE: ldrex {{r[0-9]+}}, [r[[ADDR]]] 118; CHECK-T2ADDRMODE: strex {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]] 119 120 %base1 = load i32** @base 121 %addr8 = bitcast i32* %base1 to i8* 122 %offset1_8 = getelementptr i8* %addr8, i32 1 123 %offset1 = bitcast i8* %offset1_8 to i32* 124 call i32 @llvm.arm.ldrex.p0i32(i32* %offset1) 125 call i32 @llvm.arm.strex.p0i32(i32 0, i32* %offset1) 126; CHECK-T2ADDRMODE: adds r[[ADDR:[0-9]+]], #1 127; CHECK-T2ADDRMODE: ldrex {{r[0-9]+}}, [r[[ADDR]]] 128; CHECK-T2ADDRMODE: strex {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]] 129 130 %local = alloca i8, i32 1024 131 %local32 = bitcast i8* %local to i32* 132 call i32 @llvm.arm.ldrex.p0i32(i32* %local32) 133 call i32 @llvm.arm.strex.p0i32(i32 0, i32* %local32) 134; CHECK-T2ADDRMODE: mov r[[ADDR:[0-9]+]], sp 135; CHECK-T2ADDRMODE: ldrex {{r[0-9]+}}, [r[[ADDR]]] 136; CHECK-T2ADDRMODE: strex {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]] 137 138 ret void 139} 140