1; RUN: llc -mtriple=armv8 -mcpu=cyclone < %s | FileCheck %s --check-prefix=CHECK-CYCLONE
2; RUN: llc -mtriple=armv8 -mcpu=swift < %s | FileCheck %s --check-prefix=CHECK-SWIFT
3
4declare arm_aapcs_vfpcc void @take_vec64(<2 x i32>)
5
6define void @test_vec64() {
7; CHECK-CYCLONE-LABEL: test_vec64:
8; CHECK-SWIFT-LABEL: test_vec64:
9
10  call arm_aapcs_vfpcc void @take_vec64(<2 x i32> <i32 0, i32 0>)
11  call arm_aapcs_vfpcc void @take_vec64(<2 x i32> <i32 0, i32 0>)
12; CHECK-CYCLONE-NOT: vmov.f64 d0,
13; CHECK-CYCLONE: vmov.i32 d0, #0
14; CHECK-CYCLONE: bl
15; CHECK-CYCLONE: vmov.i32 d0, #0
16; CHECK-CYCLONE: bl
17
18; CHECK-SWIFT: vmov.f64 [[ZEROREG:d[0-9]+]],
19; CHECK-SWIFT: vmov.i32 [[ZEROREG]], #0
20; CHECK-SWIFT: vorr d0, [[ZEROREG]], [[ZEROREG]]
21; CHECK-SWIFT: bl
22; CHECK-SWIFT: vorr d0, [[ZEROREG]], [[ZEROREG]]
23; CHECK-SWIFT: bl
24
25  ret void
26}
27
28declare arm_aapcs_vfpcc void @take_vec128(<8 x i16>)
29
30define void @test_vec128() {
31; CHECK-CYCLONE-LABEL: test_vec128:
32; CHECK-SWIFT-LABEL: test_vec128:
33
34  call arm_aapcs_vfpcc void @take_vec128(<8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>)
35  call arm_aapcs_vfpcc void @take_vec128(<8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>)
36; CHECK-CYCLONE-NOT: vmov.f64 [[ZEROREG:d[0-9]+]],
37; CHECK-CYCLONE: vmov.i32 q0, #0
38; CHECK-CYCLONE: bl
39; CHECK-CYCLONE: vmov.i32 q0, #0
40; CHECK-CYCLONE: bl
41
42; CHECK-SWIFT-NOT: vmov.f64 [[ZEROREG:d[0-9]+]],
43; CHECK-SWIFT: vmov.i32 [[ZEROREG:q[0-9]+]], #0
44; CHECK-SWIFT: vorr q0, [[ZEROREG]], [[ZEROREG]]
45; CHECK-SWIFT: bl
46; CHECK-SWIFT: vorr q0, [[ZEROREG]], [[ZEROREG]]
47; CHECK-SWIFT: bl
48
49  ret void
50}
51
52declare void @take_i32(i32)
53
54define void @test_i32() {
55; CHECK-CYCLONE-LABEL: test_i32:
56; CHECK-SWIFT-LABEL: test_i32:
57
58  call arm_aapcs_vfpcc void @take_i32(i32 0)
59  call arm_aapcs_vfpcc void @take_i32(i32 0)
60; CHECK-CYCLONE-NOT: vmov.f64 [[ZEROREG:d[0-9]+]],
61; CHECK-CYCLONE: mov r0, #0
62; CHECK-CYCLONE: bl
63; CHECK-CYCLONE: mov r0, #0
64; CHECK-CYCLONE: bl
65
66; It doesn't particularly matter what Swift does here, there isn't carefully
67; crafted behaviour that we might break in Cyclone.
68
69  ret void
70}
71